rooty/dxvk
1
0
Fork 0
mirror of https://github.com/doitsujin/dxvk.git synced 2025-01-19 14:52:10 +01:00
Code Issues Projects Releases Wiki Activity

[dxbc] Drop workarounds for unsupported drivers

Browse Source
This commit is contained in:
Philip Rebohle 2022-07-14 20:32:30 +02:00
parent 223a4fd186
commit 1dd3f24b43
No known key found for this signature in database
GPG Key ID: C8CC613427A31C99
3 changed files with 4 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/dxbc/dxbc_compiler.cpp
View File

@ -5366,11 +5366,8 @@ namespace dxvk {
result.type.ctype = DxbcScalarType::Sint32; result.type.ctype = DxbcScalarType::Sint32;
result.type.ccount = 1; result.type.ccount = 1;
const uint32_t typeId = getVectorTypeId(result.type); uint32_t typeId = getVectorTypeId(result.type);
uint32_t offset = m_module.opShiftRightLogical(typeId, structOffset.id, m_module.consti32(2));
uint32_t offset = m_moduleInfo.options.useSdivForBufferIndex
? m_module.opSDiv (typeId, structOffset.id, m_module.consti32(4))
: m_module.opShiftRightLogical(typeId, structOffset.id, m_module.consti32(2));
result.id = m_module.opIAdd(typeId, result.id = m_module.opIAdd(typeId,
m_module.opIMul(typeId, structId.id, m_module.consti32(structStride / 4)), m_module.opIMul(typeId, structId.id, m_module.consti32(structStride / 4)),
@ -5386,10 +5383,7 @@ namespace dxvk {
result.type.ccount = 1; result.type.ccount = 1;
uint32_t typeId = getVectorTypeId(result.type); uint32_t typeId = getVectorTypeId(result.type);
result.id = m_module.opShiftRightLogical(typeId, byteOffset.id, m_module.consti32(2));
result.id = m_moduleInfo.options.useSdivForBufferIndex
? m_module.opSDiv (typeId, byteOffset.id, m_module.consti32(4))
: m_module.opShiftRightLogical(typeId, byteOffset.id, m_module.consti32(2));
return result; return result;
} }

9
src/dxbc/dxbc_options.cpp
View File

@ -28,8 +28,6 @@ namespace dxvk {
= (devInfo.vk11.subgroupSize >= 4) = (devInfo.vk11.subgroupSize >= 4)
&& (devInfo.vk11.subgroupSupportedStages & VK_SHADER_STAGE_FRAGMENT_BIT) && (devInfo.vk11.subgroupSupportedStages & VK_SHADER_STAGE_FRAGMENT_BIT)
&& (devInfo.vk11.subgroupSupportedOperations & VK_SUBGROUP_FEATURE_BALLOT_BIT); && (devInfo.vk11.subgroupSupportedOperations & VK_SUBGROUP_FEATURE_BALLOT_BIT);
useSdivForBufferIndex
= adapter->matchesDriver(VK_DRIVER_ID_NVIDIA_PROPRIETARY_KHR, 0, 0);
switch (device->config().useRawSsbo) { switch (device->config().useRawSsbo) {
case Tristate::Auto: minSsboAlignment = devInfo.core.properties.limits.minStorageBufferOffsetAlignment; break; case Tristate::Auto: minSsboAlignment = devInfo.core.properties.limits.minStorageBufferOffsetAlignment; break;
@ -43,10 +41,6 @@ namespace dxvk {
forceTgsmBarriers = options.forceTgsmBarriers; forceTgsmBarriers = options.forceTgsmBarriers;
disableMsaa = options.disableMsaa; disableMsaa = options.disableMsaa;
// Disable subgroup early discard on Nvidia because it may hurt performance
if (adapter->matchesDriver(VK_DRIVER_ID_NVIDIA_PROPRIETARY_KHR, 0, 0))
useSubgroupOpsForEarlyDiscard = false;
// Figure out float control flags to match D3D11 rules // Figure out float control flags to match D3D11 rules
if (options.floatControls) { if (options.floatControls) {
if (devInfo.vk12.shaderSignedZeroInfNanPreserveFloat32) if (devInfo.vk12.shaderSignedZeroInfNanPreserveFloat32)
@ -62,8 +56,7 @@ namespace dxvk {
} }
} }
if (!devInfo.vk12.shaderSignedZeroInfNanPreserveFloat32 if (!devInfo.vk12.shaderSignedZeroInfNanPreserveFloat32)
|| adapter->matchesDriver(VK_DRIVER_ID_MESA_RADV_KHR, 0, VK_MAKE_VERSION(20, 3, 0)))
enableRtOutputNanFixup = true; enableRtOutputNanFixup = true;
} }

4
src/dxbc/dxbc_options.h
View File

@ -37,10 +37,6 @@ namespace dxvk {
/// shader invocations if derivatives remain valid. /// shader invocations if derivatives remain valid.
bool useSubgroupOpsForEarlyDiscard = false; bool useSubgroupOpsForEarlyDiscard = false;
/// Use SDiv instead of SHR to converte byte offsets to
/// dword offsets. Fixes RE2 and DMC5 on Nvidia drivers.
bool useSdivForBufferIndex = false;
/// Enables NaN fixup for render target outputs /// Enables NaN fixup for render target outputs
bool enableRtOutputNanFixup = false; bool enableRtOutputNanFixup = false;