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[dxbc] Implement workaround to replace NaN render target outputs by zero
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@ -126,6 +126,14 @@
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# d3d11.strictDivision = False
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# Replaces NaN outputs from fragment shaders with zeroes for floating
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# point render target. Used in some games to prevent artifacting.
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#
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# Supported values: True, False
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# d3d11.enableRtOutputNanFixup = False
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# Clears workgroup memory in compute shaders to zero. Some games don't do
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# this and rely on undefined behaviour. Enabling may reduce performance.
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#
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@ -9,6 +9,7 @@ namespace dxvk {
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this->dcSingleUseMode = config.getOption<bool>("d3d11.dcSingleUseMode", true);
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this->strictDivision = config.getOption<bool>("d3d11.strictDivision", false);
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this->enableRtOutputNanFixup = config.getOption<bool>("d3d11.enableRtOutputNanFixup", false);
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this->zeroInitWorkgroupMemory = config.getOption<bool>("d3d11.zeroInitWorkgroupMemory", false);
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this->relaxedBarriers = config.getOption<bool>("d3d11.relaxedBarriers", false);
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this->maxTessFactor = config.getOption<int32_t>("d3d11.maxTessFactor", 0);
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@ -25,6 +25,10 @@ namespace dxvk {
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/// games may expect correct behaviour.
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bool strictDivision;
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/// Enables workaround to replace NaN render target
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/// outputs with zero
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bool enableRtOutputNanFixup;
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/// Enables out-of-bounds access check for constant
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/// buffers. Workaround for a few broken games that
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/// access random data inside their shaders.
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@ -5834,10 +5834,21 @@ namespace dxvk {
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scalars[c] = m_module.opVectorExtractDynamic(compTypeId, vector.id, specId);
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}
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vector.id = m_module.opCompositeConstruct(
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getVectorTypeId(vector.type),
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vector.type.ccount,
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scalars.data());
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uint32_t typeId = getVectorTypeId(vector.type);
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vector.id = m_module.opCompositeConstruct(typeId, vector.type.ccount, scalars.data());
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// Replace NaN by zero if requested
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if (m_moduleInfo.options.enableRtOutputNanFixup && vector.type.ctype == DxbcScalarType::Float32) {
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uint32_t boolType = m_module.defBoolType();
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if (vector.type.ccount > 1)
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boolType = m_module.defVectorType(boolType, vector.type.ccount);
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uint32_t zero = emitBuildConstVecf32(0.0f, 0.0f, 0.0f, 0.0f,
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DxbcRegMask((1u << vector.type.ccount) - 1)).id;
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uint32_t isNan = m_module.opIsNan(boolType, vector.id);
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vector.id = m_module.opSelect(typeId, isNan, zero, vector.id);
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}
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emitValueStore(m_oRegs[i], vector,
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DxbcRegMask::firstN(vector.type.ccount));
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@ -37,6 +37,7 @@ namespace dxvk {
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case Tristate::False: minSsboAlignment = ~0u; break;
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}
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enableRtOutputNanFixup = options.enableRtOutputNanFixup;
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strictDivision = options.strictDivision;
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zeroInitWorkgroupMemory = options.zeroInitWorkgroupMemory;
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dynamicIndexedConstantBufferAsSsbo = options.constantBufferRangeCheck;
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@ -32,6 +32,9 @@ namespace dxvk {
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/// dword offsets. Fixes RE2 and DMC5 on Nvidia drivers.
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bool useSdivForBufferIndex = false;
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/// Enables NaN fixup for render target outputs
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bool enableRtOutputNanFixup = false;
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/// Enables sm4-compliant division-by-zero behaviour
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bool strictDivision = false;
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