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mirror of https://github.com/doitsujin/dxvk.git synced 2024-12-01 16:24:12 +01:00

[dxbc] Implemented unsigned comparators and sample_l

This commit is contained in:
Philip Rebohle 2017-12-21 17:14:11 +01:00
parent 289da8065d
commit 46717529fa
5 changed files with 119 additions and 8 deletions

View File

@ -1404,10 +1404,8 @@ namespace dxvk {
: nullptr; : nullptr;
} }
if (ppDepthStencilView != nullptr) { if (ppDepthStencilView != nullptr)
Logger::err("D3D11DeviceContext::OMGetRenderTargets: Stencil view not supported"); *ppDepthStencilView = m_state.om.depthStencilView.ref();
*ppDepthStencilView = nullptr;
}
} }

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@ -975,6 +975,16 @@ namespace dxvk {
conditionType, src.at(0).id, src.at(1).id); conditionType, src.at(0).id, src.at(1).id);
break; break;
case DxbcOpcode::UGe:
condition = m_module.opUGreaterThanEqual(
conditionType, src.at(0).id, src.at(1).id);
break;
case DxbcOpcode::ULt:
condition = m_module.opULessThan(
conditionType, src.at(0).id, src.at(1).id);
break;
default: default:
Logger::warn(str::format( Logger::warn(str::format(
"DxbcCompiler: Unhandled instruction: ", "DxbcCompiler: Unhandled instruction: ",
@ -1331,16 +1341,23 @@ namespace dxvk {
: DxbcRegisterValue(); : DxbcRegisterValue();
// Load explicit gradients for sample operations that require them // Load explicit gradients for sample operations that require them
const bool explicitGradients = ins.op == DxbcOpcode::SampleD; const bool hasExplicitGradients = ins.op == DxbcOpcode::SampleD;
const DxbcRegisterValue explicitGradientX = explicitGradients const DxbcRegisterValue explicitGradientX = hasExplicitGradients
? emitRegisterLoad(ins.src[3], coordLayerMask) ? emitRegisterLoad(ins.src[3], coordLayerMask)
: DxbcRegisterValue(); : DxbcRegisterValue();
const DxbcRegisterValue explicitGradientY = explicitGradients const DxbcRegisterValue explicitGradientY = hasExplicitGradients
? emitRegisterLoad(ins.src[4], coordLayerMask) ? emitRegisterLoad(ins.src[4], coordLayerMask)
: DxbcRegisterValue(); : DxbcRegisterValue();
// Explicit LOD value for certain sample operations
const bool hasExplicitLod = ins.op == DxbcOpcode::SampleL;
const DxbcRegisterValue explicitLod = hasExplicitLod
? emitRegisterLoad(ins.src[3], DxbcRegMask(true, false, false, false))
: DxbcRegisterValue();
// Determine the sampled image type based on the opcode. // Determine the sampled image type based on the opcode.
// FIXME while this is in line what the officla glsl compiler // FIXME while this is in line what the officla glsl compiler
// does, this might actually violate the SPIR-V specification. // does, this might actually violate the SPIR-V specification.
@ -1418,6 +1435,16 @@ namespace dxvk {
imageOperands); imageOperands);
} break; } break;
// Sample operation with explicit LOD
case DxbcOpcode::SampleL: {
imageOperands.flags |= spv::ImageOperandsLodMask;
imageOperands.sLod = m_module.constf32(explicitLod.id);
result.id = m_module.opImageSampleExplicitLod(
getVectorTypeId(result.type), sampledImageId, coord.id,
imageOperands);
} break;
default: default:
Logger::warn(str::format( Logger::warn(str::format(
"DxbcCompiler: Unhandled instruction: ", "DxbcCompiler: Unhandled instruction: ",

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@ -324,7 +324,13 @@ namespace dxvk {
{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 }, { DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
} }, } },
/* SampleL */ /* SampleL */
{ }, { 5, DxbcInstClass::TextureSample, {
{ DxbcOperandKind::DstReg, DxbcScalarType::Float32 },
{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
} },
/* SampleD */ /* SampleD */
{ 6, DxbcInstClass::TextureSample, { { 6, DxbcInstClass::TextureSample, {
{ DxbcOperandKind::DstReg, DxbcScalarType::Float32 }, { DxbcOperandKind::DstReg, DxbcScalarType::Float32 },

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@ -1324,6 +1324,66 @@ namespace dxvk {
} }
uint32_t SpirvModule::opULessThan(
uint32_t resultType,
uint32_t vector1,
uint32_t vector2) {
uint32_t resultId = this->allocateId();
m_code.putIns (spv::OpULessThan, 5);
m_code.putWord(resultType);
m_code.putWord(resultId);
m_code.putWord(vector1);
m_code.putWord(vector2);
return resultId;
}
uint32_t SpirvModule::opULessThanEqual(
uint32_t resultType,
uint32_t vector1,
uint32_t vector2) {
uint32_t resultId = this->allocateId();
m_code.putIns (spv::OpULessThanEqual, 5);
m_code.putWord(resultType);
m_code.putWord(resultId);
m_code.putWord(vector1);
m_code.putWord(vector2);
return resultId;
}
uint32_t SpirvModule::opUGreaterThan(
uint32_t resultType,
uint32_t vector1,
uint32_t vector2) {
uint32_t resultId = this->allocateId();
m_code.putIns (spv::OpUGreaterThan, 5);
m_code.putWord(resultType);
m_code.putWord(resultId);
m_code.putWord(vector1);
m_code.putWord(vector2);
return resultId;
}
uint32_t SpirvModule::opUGreaterThanEqual(
uint32_t resultType,
uint32_t vector1,
uint32_t vector2) {
uint32_t resultId = this->allocateId();
m_code.putIns (spv::OpUGreaterThanEqual, 5);
m_code.putWord(resultType);
m_code.putWord(resultId);
m_code.putWord(vector1);
m_code.putWord(vector2);
return resultId;
}
uint32_t SpirvModule::opFOrdEqual( uint32_t SpirvModule::opFOrdEqual(
uint32_t resultType, uint32_t resultType,
uint32_t vector1, uint32_t vector1,

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@ -466,6 +466,26 @@ namespace dxvk {
uint32_t vector1, uint32_t vector1,
uint32_t vector2); uint32_t vector2);
uint32_t opULessThan(
uint32_t resultType,
uint32_t vector1,
uint32_t vector2);
uint32_t opULessThanEqual(
uint32_t resultType,
uint32_t vector1,
uint32_t vector2);
uint32_t opUGreaterThan(
uint32_t resultType,
uint32_t vector1,
uint32_t vector2);
uint32_t opUGreaterThanEqual(
uint32_t resultType,
uint32_t vector1,
uint32_t vector2);
uint32_t opFOrdEqual( uint32_t opFOrdEqual(
uint32_t resultType, uint32_t resultType,
uint32_t vector1, uint32_t vector1,