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https://github.com/doitsujin/dxvk.git
synced 2024-12-01 16:24:12 +01:00
[dxbc] Implemented unsigned comparators and sample_l
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289da8065d
commit
46717529fa
@ -1404,10 +1404,8 @@ namespace dxvk {
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: nullptr;
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: nullptr;
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}
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}
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if (ppDepthStencilView != nullptr) {
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if (ppDepthStencilView != nullptr)
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Logger::err("D3D11DeviceContext::OMGetRenderTargets: Stencil view not supported");
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*ppDepthStencilView = m_state.om.depthStencilView.ref();
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*ppDepthStencilView = nullptr;
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}
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}
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}
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@ -975,6 +975,16 @@ namespace dxvk {
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conditionType, src.at(0).id, src.at(1).id);
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conditionType, src.at(0).id, src.at(1).id);
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break;
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break;
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case DxbcOpcode::UGe:
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condition = m_module.opUGreaterThanEqual(
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conditionType, src.at(0).id, src.at(1).id);
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break;
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case DxbcOpcode::ULt:
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condition = m_module.opULessThan(
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conditionType, src.at(0).id, src.at(1).id);
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break;
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default:
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default:
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Logger::warn(str::format(
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Logger::warn(str::format(
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"DxbcCompiler: Unhandled instruction: ",
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"DxbcCompiler: Unhandled instruction: ",
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@ -1331,16 +1341,23 @@ namespace dxvk {
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: DxbcRegisterValue();
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: DxbcRegisterValue();
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// Load explicit gradients for sample operations that require them
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// Load explicit gradients for sample operations that require them
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const bool explicitGradients = ins.op == DxbcOpcode::SampleD;
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const bool hasExplicitGradients = ins.op == DxbcOpcode::SampleD;
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const DxbcRegisterValue explicitGradientX = explicitGradients
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const DxbcRegisterValue explicitGradientX = hasExplicitGradients
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? emitRegisterLoad(ins.src[3], coordLayerMask)
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? emitRegisterLoad(ins.src[3], coordLayerMask)
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: DxbcRegisterValue();
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: DxbcRegisterValue();
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const DxbcRegisterValue explicitGradientY = explicitGradients
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const DxbcRegisterValue explicitGradientY = hasExplicitGradients
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? emitRegisterLoad(ins.src[4], coordLayerMask)
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? emitRegisterLoad(ins.src[4], coordLayerMask)
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: DxbcRegisterValue();
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: DxbcRegisterValue();
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// Explicit LOD value for certain sample operations
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const bool hasExplicitLod = ins.op == DxbcOpcode::SampleL;
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const DxbcRegisterValue explicitLod = hasExplicitLod
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? emitRegisterLoad(ins.src[3], DxbcRegMask(true, false, false, false))
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: DxbcRegisterValue();
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// Determine the sampled image type based on the opcode.
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// Determine the sampled image type based on the opcode.
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// FIXME while this is in line what the officla glsl compiler
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// FIXME while this is in line what the officla glsl compiler
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// does, this might actually violate the SPIR-V specification.
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// does, this might actually violate the SPIR-V specification.
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@ -1418,6 +1435,16 @@ namespace dxvk {
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imageOperands);
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imageOperands);
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} break;
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} break;
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// Sample operation with explicit LOD
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case DxbcOpcode::SampleL: {
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imageOperands.flags |= spv::ImageOperandsLodMask;
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imageOperands.sLod = m_module.constf32(explicitLod.id);
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result.id = m_module.opImageSampleExplicitLod(
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getVectorTypeId(result.type), sampledImageId, coord.id,
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imageOperands);
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} break;
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default:
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default:
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Logger::warn(str::format(
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Logger::warn(str::format(
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"DxbcCompiler: Unhandled instruction: ",
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"DxbcCompiler: Unhandled instruction: ",
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@ -324,7 +324,13 @@ namespace dxvk {
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{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
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{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
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} },
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} },
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/* SampleL */
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/* SampleL */
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{ },
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{ 5, DxbcInstClass::TextureSample, {
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{ DxbcOperandKind::DstReg, DxbcScalarType::Float32 },
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{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
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{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
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{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
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{ DxbcOperandKind::SrcReg, DxbcScalarType::Float32 },
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} },
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/* SampleD */
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/* SampleD */
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{ 6, DxbcInstClass::TextureSample, {
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{ 6, DxbcInstClass::TextureSample, {
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{ DxbcOperandKind::DstReg, DxbcScalarType::Float32 },
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{ DxbcOperandKind::DstReg, DxbcScalarType::Float32 },
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@ -1324,6 +1324,66 @@ namespace dxvk {
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}
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}
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uint32_t SpirvModule::opULessThan(
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector2) {
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uint32_t resultId = this->allocateId();
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m_code.putIns (spv::OpULessThan, 5);
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m_code.putWord(resultType);
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m_code.putWord(resultId);
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m_code.putWord(vector1);
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m_code.putWord(vector2);
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return resultId;
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}
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uint32_t SpirvModule::opULessThanEqual(
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector2) {
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uint32_t resultId = this->allocateId();
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m_code.putIns (spv::OpULessThanEqual, 5);
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m_code.putWord(resultType);
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m_code.putWord(resultId);
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m_code.putWord(vector1);
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m_code.putWord(vector2);
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return resultId;
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}
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uint32_t SpirvModule::opUGreaterThan(
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector2) {
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uint32_t resultId = this->allocateId();
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m_code.putIns (spv::OpUGreaterThan, 5);
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m_code.putWord(resultType);
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m_code.putWord(resultId);
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m_code.putWord(vector1);
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m_code.putWord(vector2);
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return resultId;
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}
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uint32_t SpirvModule::opUGreaterThanEqual(
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector2) {
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uint32_t resultId = this->allocateId();
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m_code.putIns (spv::OpUGreaterThanEqual, 5);
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m_code.putWord(resultType);
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m_code.putWord(resultId);
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m_code.putWord(vector1);
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m_code.putWord(vector2);
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return resultId;
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}
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uint32_t SpirvModule::opFOrdEqual(
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uint32_t SpirvModule::opFOrdEqual(
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uint32_t resultType,
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector1,
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@ -466,6 +466,26 @@ namespace dxvk {
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uint32_t vector1,
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uint32_t vector1,
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uint32_t vector2);
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uint32_t vector2);
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uint32_t opULessThan(
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector2);
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uint32_t opULessThanEqual(
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector2);
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uint32_t opUGreaterThan(
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector2);
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uint32_t opUGreaterThanEqual(
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector2);
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uint32_t opFOrdEqual(
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uint32_t opFOrdEqual(
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uint32_t resultType,
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uint32_t resultType,
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uint32_t vector1,
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uint32_t vector1,
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