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[dxbc] Accurately determine access flags for UAVs
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@ -34,6 +34,7 @@ namespace dxvk {
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if (ins.dst[operandId].type == DxbcOperandType::UnorderedAccessView) {
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const uint32_t registerId = ins.dst[operandId].idx[0].offset;
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m_analysis->uavInfos[registerId].accessAtomicOp = true;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT;
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}
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} break;
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@ -49,9 +50,31 @@ namespace dxvk {
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m_analysis->usesKill = true;
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} break;
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case DxbcInstClass::BufferLoad: {
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uint32_t operandId = ins.op == DxbcOpcode::LdStructured ? 2 : 1;
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if (ins.src[operandId].type == DxbcOperandType::UnorderedAccessView) {
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const uint32_t registerId = ins.src[operandId].idx[0].offset;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_READ_BIT;
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}
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} break;
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case DxbcInstClass::BufferStore: {
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if (ins.dst[0].type == DxbcOperandType::UnorderedAccessView) {
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const uint32_t registerId = ins.dst[0].idx[0].offset;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_WRITE_BIT;
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}
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} break;
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case DxbcInstClass::TypedUavLoad: {
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const uint32_t registerId = ins.src[1].idx[0].offset;
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m_analysis->uavInfos[registerId].accessTypedLoad = true;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_READ_BIT;
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} break;
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case DxbcInstClass::TypedUavStore: {
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const uint32_t registerId = ins.dst[0].idx[0].offset;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_WRITE_BIT;
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} break;
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default:
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@ -19,6 +19,7 @@ namespace dxvk {
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struct DxbcUavInfo {
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bool accessTypedLoad = false;
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bool accessAtomicOp = false;
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VkAccessFlags accessFlags = 0;
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};
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/**
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@ -1003,12 +1003,6 @@ namespace dxvk {
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if (ins.controls.uavFlags().test(DxbcUavFlag::GloballyCoherent))
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m_module.decorate(varId, spv::DecorationCoherent);
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// On GPUs which don't support storageImageReadWithoutFormat,
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// we have to decorate untyped UAVs as write-only
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if (isUav && imageFormat == spv::ImageFormatUnknown
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&& !m_moduleInfo.options.useStorageImageReadWithoutFormat)
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m_module.decorate(varId, spv::DecorationNonReadable);
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// Declare a specialization constant which will
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// store whether or not the resource is bound.
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const uint32_t specConstId = m_module.specConstBool(true);
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@ -1060,19 +1054,24 @@ namespace dxvk {
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DxvkResourceSlot resource;
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resource.slot = bindingId;
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resource.view = typeInfo.vtype;
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resource.access = VK_ACCESS_SHADER_READ_BIT;
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if (isUav) {
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resource.type = resourceType == DxbcResourceDim::Buffer
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? VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
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: VK_DESCRIPTOR_TYPE_STORAGE_IMAGE;
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resource.access |= VK_ACCESS_SHADER_WRITE_BIT;
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resource.access = m_analysis->uavInfos[registerId].accessFlags;
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} else {
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resource.type = resourceType == DxbcResourceDim::Buffer
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? VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
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: VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE;
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resource.access = VK_ACCESS_SHADER_READ_BIT;
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}
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if (!(resource.access & VK_ACCESS_SHADER_WRITE_BIT))
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m_module.decorate(varId, spv::DecorationNonWritable);
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if (!(resource.access & VK_ACCESS_SHADER_READ_BIT))
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m_module.decorate(varId, spv::DecorationNonReadable);
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m_resourceSlots.push_back(resource);
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}
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@ -1137,9 +1136,6 @@ namespace dxvk {
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m_module.setDebugName(structType,
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str::format(isUav ? "u" : "t", registerId, "_t").c_str());
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m_module.setDebugMemberName(structType, 0, "m");
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if (!isUav)
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m_module.decorate(varId, spv::DecorationNonWritable);
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} else {
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// Structured and raw buffers are represented as
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// texel buffers consisting of 32-bit integers.
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@ -1210,10 +1206,14 @@ namespace dxvk {
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? VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
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: VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER);
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resource.view = VK_IMAGE_VIEW_TYPE_MAX_ENUM;
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resource.access = VK_ACCESS_SHADER_READ_BIT;
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resource.access = isUav
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? m_analysis->uavInfos[registerId].accessFlags
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: VK_ACCESS_SHADER_READ_BIT;
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if (isUav)
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resource.access |= VK_ACCESS_SHADER_WRITE_BIT;
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if (!(resource.access & VK_ACCESS_SHADER_WRITE_BIT))
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m_module.decorate(varId, spv::DecorationNonWritable);
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if (!(resource.access & VK_ACCESS_SHADER_READ_BIT))
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m_module.decorate(varId, spv::DecorationNonReadable);
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m_resourceSlots.push_back(resource);
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}
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@ -4939,7 +4939,7 @@ namespace dxvk {
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// Skip write-after-write barriers if explicitly requested
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if ((m_barrierControl.test(DxvkBarrierControl::IgnoreWriteAfterWrite))
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&& (m_execBarriers.getSrcStages() == VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT)
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&& (srcAccess == DxvkAccess::Write) && (dstAccess == DxvkAccess::Write))
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&& ((srcAccess | dstAccess) == DxvkAccess::Write))
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continue;
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requiresBarrier = (srcAccess | dstAccess).test(DxvkAccess::Write);
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@ -5133,7 +5133,7 @@ namespace dxvk {
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// Skip write-after-write barriers if explicitly requested
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if ((m_barrierControl.test(DxvkBarrierControl::IgnoreWriteAfterWrite))
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&& (srcAccess == DxvkAccess::Write) && (dstAccess == DxvkAccess::Write))
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&& ((srcAccess | dstAccess) == DxvkAccess::Write))
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continue;
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requiresBarrier = (srcAccess | dstAccess).test(DxvkAccess::Write);
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