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https://github.com/doitsujin/dxvk.git
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[dxbc] Added indexable temps
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518b469742
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@ -146,6 +146,9 @@ namespace dxvk {
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case DxbcOpcode::DclTemps:
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return this->emitDclTemps(ins);
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case DxbcOpcode::DclIndexableTemp:
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return this->emitDclIndexableTemp(ins);
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case DxbcOpcode::DclInput:
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case DxbcOpcode::DclInputSgv:
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case DxbcOpcode::DclInputSiv:
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@ -212,6 +215,27 @@ namespace dxvk {
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}
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void DxbcCompiler::emitDclIndexableTemp(const DxbcShaderInstruction& ins) {
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// dcl_indexable_temps has three operands:
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// (imm0) Array register index (x#)
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// (imm1) Number of vectors stored in the array
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// (imm2) Component count of each individual vector
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DxbcRegisterInfo info;
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info.type.ctype = DxbcScalarType::Float32;
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info.type.ccount = ins.imm[2].u32;
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info.type.alength = ins.imm[1].u32;
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info.sclass = spv::StorageClassPrivate;
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const uint32_t regId = ins.imm[0].u32;
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if (regId >= m_xRegs.size())
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m_xRegs.resize(regId + 1);
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m_xRegs.at(regId).ccount = info.type.ccount;
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m_xRegs.at(regId).varId = emitNewVariable(info);
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}
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void DxbcCompiler::emitDclInterfaceReg(const DxbcShaderInstruction& ins) {
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switch (ins.dst[0].type) {
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case DxbcOperandType::Input:
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@ -1719,7 +1743,7 @@ namespace dxvk {
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DxbcRegisterPointer DxbcCompiler::emitGetTempPtr(
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const DxbcRegister& operand) {
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const DxbcRegister& operand) {
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// r# regs are indexed as follows:
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// (0) register index (immediate)
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DxbcRegisterPointer result;
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@ -1730,6 +1754,33 @@ namespace dxvk {
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}
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DxbcRegisterPointer DxbcCompiler::emitGetIndexableTempPtr(
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const DxbcRegister& operand) {
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// x# regs are indexed as follows:
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// (0) register index (immediate)
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// (1) element index (relative)
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const uint32_t regId = operand.idx[0].offset;
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const DxbcRegisterValue vectorId
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= emitIndexLoad(operand.idx[1]);
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DxbcRegisterInfo info;
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info.type.ctype = DxbcScalarType::Float32;
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info.type.ccount = m_xRegs[regId].ccount;
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info.type.alength = 0;
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info.sclass = spv::StorageClassPrivate;
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DxbcRegisterPointer result;
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result.type.ctype = info.type.ctype;
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result.type.ccount = info.type.ccount;
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result.id = m_module.opAccessChain(
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getPointerTypeId(info),
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m_xRegs.at(regId).varId,
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1, &vectorId.id);
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return result;
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}
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DxbcRegisterPointer DxbcCompiler::emitGetInputPtr(
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const DxbcRegister& operand) {
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// In the vertex and pixel stages,
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@ -1855,6 +1906,9 @@ namespace dxvk {
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case DxbcOperandType::Temp:
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return emitGetTempPtr(operand);
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case DxbcOperandType::IndexableTemp:
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return emitGetIndexableTempPtr(operand);
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case DxbcOperandType::Input:
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return emitGetInputPtr(operand);
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@ -80,6 +80,12 @@ namespace dxvk {
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};
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struct DxbcXreg {
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uint32_t ccount = 0;
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uint32_t varId = 0;
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};
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/**
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* \brief Vertex shader-specific structure
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*/
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@ -183,9 +189,11 @@ namespace dxvk {
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// be used to map D3D11 bindings to DXVK bindings.
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std::vector<DxvkResourceSlot> m_resourceSlots;
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///////////////////////////////
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// r# registers of type float4
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////////////////////////////////////////////////
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// Temporary r# vector registers with immediate
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// indexing, and x# vector array registers.
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std::vector<uint32_t> m_rRegs;
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std::vector<DxbcXreg> m_xRegs;
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///////////////////////////////////////////////////////////
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// v# registers as defined by the shader. The type of each
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@ -251,6 +259,9 @@ namespace dxvk {
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void emitDclTemps(
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const DxbcShaderInstruction& ins);
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void emitDclIndexableTemp(
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const DxbcShaderInstruction& ins);
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void emitDclInterfaceReg(
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const DxbcShaderInstruction& ins);
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@ -402,6 +413,9 @@ namespace dxvk {
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DxbcRegisterPointer emitGetTempPtr(
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const DxbcRegister& operand);
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DxbcRegisterPointer emitGetIndexableTempPtr(
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const DxbcRegister& operand);
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DxbcRegisterPointer emitGetInputPtr(
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const DxbcRegister& operand);
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@ -441,7 +441,11 @@ namespace dxvk {
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{ DxbcOperandKind::Imm32, DxbcScalarType::Uint32 },
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} },
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/* DclIndexableTemp */
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{ },
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{ 3, DxbcInstClass::Declaration, {
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{ DxbcOperandKind::Imm32, DxbcScalarType::Uint32 },
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{ DxbcOperandKind::Imm32, DxbcScalarType::Uint32 },
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{ DxbcOperandKind::Imm32, DxbcScalarType::Uint32 },
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} },
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/* DclGlobalFlags */
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{ 0, DxbcInstClass::Declaration },
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/* Reserved0 */
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