mirror of
https://github.com/doitsujin/dxvk.git
synced 2024-12-13 16:08:50 +01:00
116 lines
3.9 KiB
C++
116 lines
3.9 KiB
C++
#include "dxbc_analysis.h"
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namespace dxvk {
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DxbcAnalyzer::DxbcAnalyzer(
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const DxbcModuleInfo& moduleInfo,
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const DxbcProgramInfo& programInfo,
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const Rc<DxbcIsgn>& isgn,
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const Rc<DxbcIsgn>& osgn,
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const Rc<DxbcIsgn>& psgn,
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DxbcAnalysisInfo& analysis)
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: m_isgn (isgn),
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m_osgn (osgn),
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m_psgn (psgn),
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m_analysis(&analysis) {
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// Get number of clipping and culling planes from the
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// input and output signatures. We will need this to
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// declare the shader input and output interfaces.
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m_analysis->clipCullIn = getClipCullInfo(m_isgn);
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m_analysis->clipCullOut = getClipCullInfo(m_osgn);
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}
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DxbcAnalyzer::~DxbcAnalyzer() {
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}
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void DxbcAnalyzer::processInstruction(const DxbcShaderInstruction& ins) {
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switch (ins.opClass) {
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case DxbcInstClass::Atomic: {
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const uint32_t operandId = ins.dstCount - 1;
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if (ins.dst[operandId].type == DxbcOperandType::UnorderedAccessView) {
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const uint32_t registerId = ins.dst[operandId].idx[0].offset;
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m_analysis->uavInfos[registerId].accessAtomicOp = true;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT;
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}
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} break;
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case DxbcInstClass::TextureSample:
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case DxbcInstClass::TextureGather:
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case DxbcInstClass::TextureQueryLod:
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case DxbcInstClass::VectorDeriv: {
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m_analysis->usesDerivatives = true;
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} break;
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case DxbcInstClass::ControlFlow: {
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if (ins.op == DxbcOpcode::Discard)
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m_analysis->usesKill = true;
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} break;
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case DxbcInstClass::BufferLoad: {
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uint32_t operandId = ins.op == DxbcOpcode::LdStructured ? 2 : 1;
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bool sparseFeedback = ins.dstCount == 2;
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if (ins.src[operandId].type == DxbcOperandType::UnorderedAccessView) {
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const uint32_t registerId = ins.src[operandId].idx[0].offset;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_READ_BIT;
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m_analysis->uavInfos[registerId].sparseFeedback |= sparseFeedback;
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} else if (ins.src[operandId].type == DxbcOperandType::Resource) {
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const uint32_t registerId = ins.src[operandId].idx[0].offset;
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m_analysis->srvInfos[registerId].sparseFeedback |= sparseFeedback;
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}
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} break;
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case DxbcInstClass::BufferStore: {
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if (ins.dst[0].type == DxbcOperandType::UnorderedAccessView) {
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const uint32_t registerId = ins.dst[0].idx[0].offset;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_WRITE_BIT;
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}
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} break;
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case DxbcInstClass::TypedUavLoad: {
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const uint32_t registerId = ins.src[1].idx[0].offset;
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m_analysis->uavInfos[registerId].accessTypedLoad = true;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_READ_BIT;
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} break;
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case DxbcInstClass::TypedUavStore: {
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const uint32_t registerId = ins.dst[0].idx[0].offset;
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m_analysis->uavInfos[registerId].accessFlags |= VK_ACCESS_SHADER_WRITE_BIT;
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} break;
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default:
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break;
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}
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for (uint32_t i = 0; i < ins.dstCount; i++) {
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if (ins.dst[0].type == DxbcOperandType::IndexableTemp) {
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uint32_t index = ins.dst[0].idx[0].offset;
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m_analysis->xRegMasks[index] |= ins.dst[0].mask;
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}
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}
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}
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DxbcClipCullInfo DxbcAnalyzer::getClipCullInfo(const Rc<DxbcIsgn>& sgn) const {
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DxbcClipCullInfo result;
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if (sgn != nullptr) {
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for (auto e = sgn->begin(); e != sgn->end(); e++) {
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const uint32_t componentCount = e->componentMask.popCount();
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if (e->systemValue == DxbcSystemValue::ClipDistance)
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result.numClipPlanes += componentCount;
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if (e->systemValue == DxbcSystemValue::CullDistance)
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result.numCullPlanes += componentCount;
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}
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}
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return result;
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}
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}
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