/*
 * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the Software),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

#ifndef __lr10_dev_nvlsaw_ip_h__
#define __lr10_dev_nvlsaw_ip_h__
/* This file is autogenerated.  Do not edit */
#define NV_NVLSAW_SW_SCRATCH_3                             0x000004ec      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_3_VALUE                       31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_3_VALUE_INIT                  0x00000000      /* RWE-V */
#define NV_NVLSAW_SW_SCRATCH_13                            0x00000514      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_13_VALUE                      31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_13_VALUE_INIT                 0x00000000      /* RWE-V */
#define NV_NVLSAW_SW_SCRATCH_15                            0x0000051c      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_15_VALUE                      31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_15_VALUE_INIT                 0x00000000      /* RWE-V */
#define NV_NVLSAW_SW_SCRATCH_2                             0x000004e8      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_2_VALUE                       31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_2_VALUE_INIT                  0x00000000      /* RWE-V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY                0x00000864      /* -W-4R */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_PTIMER_0       20:20           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_PTIMER_0_ENABLE 0x00000001     /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_PTIMER_1       21:21           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_PTIMER_1_ENABLE 0x00000001     /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_PMGR_0         22:22           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_PMGR_0_ENABLE  0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_PMGR_1         23:23           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_PMGR_1_ENABLE  0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_SMBUS_MSGBOX   24:24           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_LEGACY_SMBUS_MSGBOX_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE           0x00000880      /* -W-4R */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_0  0:0             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_0_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_1  1:1             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_1_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_2  2:2             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_2_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_3  3:3             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_3_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_4  4:4             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_4_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_5  5:5             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_5_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_6  6:6             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_6_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_7  7:7             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_7_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_8  8:8             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NVLIPT_8_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_0     9:9             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_0_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_1     10:10           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_1_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_2     11:11           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_2_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_3     12:12           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_3_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_4     13:13           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_4_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_5     14:14           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_5_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_6     15:15           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_6_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_7     16:16           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_7_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_8     17:17           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_NPG_8_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SAW_WRITE_LOCKED 25:25    /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SAW_WRITE_LOCKED_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SOE_SHIM_FLUSH 26:26      /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SOE_SHIM_FLUSH_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SOE_SHIM_ILLEGAL 27:27    /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SOE_SHIM_ILLEGAL_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SMR_0     28:28           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SMR_0_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SMR_1     29:29           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_SMR_1_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_OVER_TEMP_ALERT 30:30     /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_OVER_TEMP_ALERT_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_OVER_TEMP 31:31           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_CLR_CORRECTABLE_OVER_TEMP_ENABLE 0x00000001 /* -W--V */

#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE           0x00000870      /* -W-4R */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_0  0:0             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_0_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_1  1:1             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_1_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_2  2:2             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_2_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_3  3:3             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_3_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_4  4:4             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_4_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_5  5:5             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_5_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_6  6:6             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_6_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_7  7:7             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_7_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_8  8:8             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NVLIPT_8_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_0     9:9             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_0_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_1     10:10           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_1_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_2     11:11           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_2_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_3     12:12           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_3_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_4     13:13           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_4_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_5     14:14           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_5_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_6     15:15           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_6_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_7     16:16           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_7_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_8     17:17           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_NPG_8_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SAW_WRITE_LOCKED 25:25    /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SAW_WRITE_LOCKED_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SOE_SHIM_FLUSH 26:26      /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SOE_SHIM_FLUSH_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SOE_SHIM_ILLEGAL 27:27    /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SOE_SHIM_ILLEGAL_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SMR_0     28:28           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SMR_0_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SMR_1     29:29           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_SMR_1_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_OVER_TEMP_ALERT 30:30     /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_OVER_TEMP_ALERT_ENABLE 0x00000001 /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_OVER_TEMP 31:31           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_CORRECTABLE_OVER_TEMP_ENABLE 0x00000001 /* -W--V */

#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL                 0x00000868      /* -W-4R */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_0        0:0             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_0_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_1        1:1             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_1_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_2        2:2             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_2_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_3        3:3             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_3_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_4        4:4             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_4_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_5        5:5             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_5_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_6        6:6             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_6_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_7        7:7             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_7_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_8        8:8             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NVLIPT_8_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_0           9:9             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_0_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_1           10:10           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_1_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_2           11:11           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_2_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_3           12:12           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_3_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_4           13:13           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_4_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_5           14:14           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_5_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_6           15:15           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_6_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_7           16:16           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_7_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_8           17:17           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NPG_8_ENABLE    0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_SOE             18:18           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_SOE_ENABLE      0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NXBAR_0         20:20           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NXBAR_0_ENABLE  0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NXBAR_1         21:21           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NXBAR_1_ENABLE  0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NXBAR_2         22:22           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NXBAR_2_ENABLE  0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NXBAR_3         23:23           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_FATAL_NXBAR_3_ENABLE  0x00000001      /* -W--V */

#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL              0x0000086c      /* -W-4R */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_0     0:0             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_0_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_1     1:1             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_1_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_2     2:2             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_2_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_3     3:3             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_3_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_4     4:4             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_4_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_5     5:5             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_5_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_6     6:6             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_6_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_7     7:7             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_7_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_8     8:8             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NVLIPT_8_ENABLE 0x00000001   /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_0        9:9             /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_0_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_1        10:10           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_1_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_2        11:11           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_2_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_3        12:12           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_3_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_4        13:13           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_4_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_5        14:14           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_5_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_6        15:15           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_6_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_7        16:16           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_7_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_8        17:17           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_NPG_8_ENABLE 0x00000001      /* -W--V */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_SOE          18:18           /* -WXVF */
#define NV_NVLSAW_NVSPMC_INTR_EN_SET_NONFATAL_SOE_ENABLE   0x00000001      /* -W--V */

#define NV_NVLSAW_NVSPMC_INTR_LEGACY                       0x00000840      /* R--4R */
#define NV_NVLSAW_NVSPMC_INTR_LEGACY_PTIMER_0              20:20           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_LEGACY_PTIMER_1              21:21           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_LEGACY_PMGR_0                22:22           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_LEGACY_PMGR_1                23:23           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_LEGACY_SMBUS_MSGBOX          24:24           /* R--VF */

#define NV_NVLSAW_NVSPMC_INTR_NONFATAL                     0x00000848      /* R--4R */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_0            0:0             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_1            1:1             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_2            2:2             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_3            3:3             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_4            4:4             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_5            5:5             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_6            6:6             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_7            7:7             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NVLIPT_8            8:8             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_0               9:9             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_1               10:10           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_2               11:11           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_3               12:12           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_4               13:13           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_5               14:14           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_6               15:15           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_7               16:16           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_NPG_8               17:17           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_NONFATAL_SOE                 18:18           /* R--VF */

#define NV_NVLSAW_NVSPMC_INTR_FATAL                        0x00000844      /* R--4R */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_0               0:0             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_1               1:1             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_2               2:2             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_3               3:3             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_4               4:4             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_5               5:5             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_6               6:6             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_7               7:7             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NVLIPT_8               8:8             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_0                  9:9             /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_1                  10:10           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_2                  11:11           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_3                  12:12           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_4                  13:13           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_5                  14:14           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_6                  15:15           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_7                  16:16           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NPG_8                  17:17           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_SOE                    18:18           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NXBAR_0                20:20           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NXBAR_1                21:21           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NXBAR_2                22:22           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_FATAL_NXBAR_3                23:23           /* R--VF */

#define NV_NVLSAW_NVSPMC_ENABLE                            0x000008d0      /* RW-4R */
#define NV_NVLSAW_NVSPMC_ENABLE_NXBAR                      0:0             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NXBAR_DISABLE              0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NXBAR_ENABLE               0x00000001      /* RWE-V */

#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT                     0x000008c8      /* RW-4R */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_0            0:0             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_0_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_0_ENABLE     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_1            1:1             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_1_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_1_ENABLE     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_2            2:2             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_2_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_2_ENABLE     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_3            3:3             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_3_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_3_ENABLE     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_4            4:4             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_4_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_4_ENABLE     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_5            5:5             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_5_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_5_ENABLE     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_6            6:6             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_6_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_6_ENABLE     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_7            7:7             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_7_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_7_ENABLE     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_8            8:8             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_8_DISABLE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NVLIPT_NVLIPT_8_ENABLE     0x00000001      /* RWE-V */

#define NV_NVLSAW_NVSPMC_ENABLE_NPG                        0x000008cc      /* RW-4R */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_0                  0:0             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_0_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_0_ENABLE           0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_1                  1:1             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_1_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_1_ENABLE           0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_2                  2:2             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_2_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_2_ENABLE           0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_3                  3:3             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_3_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_3_ENABLE           0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_4                  4:4             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_4_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_4_ENABLE           0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_5                  5:5             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_5_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_5_ENABLE           0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_6                  6:6             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_6_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_6_ENABLE           0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_7                  7:7             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_7_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_7_ENABLE           0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_8                  8:8             /* RWEVF */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_8_DISABLE          0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_ENABLE_NPG_NPG_8_ENABLE           0x00000001      /* RWE-V */

#define NV_NVLSAW_GLBLLATENCYTIMERCTRL                     0x00000040      /* RW-4R */
#define NV_NVLSAW_GLBLLATENCYTIMERCTRL_ENABLE              0:0             /* RWEVF */
#define NV_NVLSAW_GLBLLATENCYTIMERCTRL_ENABLE_DISABLE      0x00000000      /* RWE-V */
#define NV_NVLSAW_GLBLLATENCYTIMERCTRL_ENABLE_ENABLE       0x00000001      /* RW--V */
#define NV_NVLSAW_GLBLLATENCYTIMERCTRL_ENABLE__PROD        0x00000001      /* RW--V */

#define NV_NVLSAW_SW_SCRATCH_6                             0x000004f8      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_6_VALUE                       31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_6_VALUE_INIT                  0x00000000      /* RWE-V */

#define NV_NVLSAW_SW_SCRATCH_7                             0x000004fc      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_7_VALUE                       31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_7_VALUE_INIT                  0x00000000      /* RWE-V */

#define NV_NVLSAW_SW_SCRATCH_8                             0x00000500      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_8_VALUE                       31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_8_VALUE_INIT                  0x00000000      /* RWE-V */

#define NV_NVLSAW_SW_SCRATCH_9                             0x00000504      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_9_VALUE                       31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_9_VALUE_INIT                  0x00000000      /* RWE-V */

#define NV_NVLSAW_SW_SCRATCH_10                            0x00000508      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_10_VALUE                      31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_10_VALUE_INIT                 0x00000000      /* RWE-V */

#define NV_NVLSAW_SW_SCRATCH_11                            0x0000050c      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_11_VALUE                      31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_11_VALUE_INIT                 0x00000000      /* RWE-V */

#define NV_NVLSAW_SCRATCH_COLD                             0x000007c4      /* RW-4R */
#define NV_NVLSAW_SCRATCH_COLD_DATA                        31:0            /* RWIVF */
#define NV_NVLSAW_SCRATCH_COLD_DATA_INIT                   0xdeadbaad      /* RWI-V */

#define NV_NVLSAW_SW_SCRATCH_12                            0x00000510      /* RW-4R */
#define NV_NVLSAW_SW_SCRATCH_12_VALUE                      31:0            /* RWEVF */
#define NV_NVLSAW_SW_SCRATCH_12_VALUE_INIT                 0x00000000      /* RWE-V */

#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY                 0x000008d4      /* RW-4R */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PTIMER_0        20:20           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PTIMER_0_HOST   0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PTIMER_0_SOE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PTIMER_1        21:21           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PTIMER_1_HOST   0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PTIMER_1_SOE    0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PMGR_0          22:22           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PMGR_0_HOST     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PMGR_0_SOE      0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PMGR_1          23:23           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PMGR_1_HOST     0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_PMGR_1_SOE      0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_SMBUS_MSGBOX    24:24           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_SMBUS_MSGBOX_HOST 0x00000001    /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_LEGACY_SMBUS_MSGBOX_SOE 0x00000000     /* RW--V */

#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE            0x000008e0      /* RW-4R */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_0   0:0             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_0_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_0_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_1   1:1             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_1_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_1_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_2   2:2             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_2_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_2_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_3   3:3             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_3_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_3_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_4   4:4             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_4_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_4_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_5   5:5             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_5_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_5_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_6   6:6             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_6_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_6_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_7   7:7             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_7_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_7_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_8   8:8             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_8_HOST 0x00000001   /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NVLIPT_8_SOE 0x00000000    /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_0      9:9             /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_0_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_0_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_1      10:10           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_1_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_1_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_2      11:11           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_2_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_2_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_3      12:12           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_3_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_3_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_4      13:13           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_4_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_4_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_5      14:14           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_5_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_5_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_6      15:15           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_6_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_6_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_7      16:16           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_7_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_7_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_8      17:17           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_8_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_NPG_8_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SAW_WRITE_LOCKED 25:25     /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SAW_WRITE_LOCKED_HOST 0x00000001 /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SAW_WRITE_LOCKED_SOE 0x00000000 /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SOE_SHIM_FLUSH 26:26       /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SOE_SHIM_FLUSH_HOST 0x00000001 /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SOE_SHIM_FLUSH_SOE 0x00000000 /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SOE_SHIM_ILLEGAL 27:27     /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SOE_SHIM_ILLEGAL_HOST 0x00000001 /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SOE_SHIM_ILLEGAL_SOE 0x00000000 /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SMR_0      28:28           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SMR_0_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SMR_0_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SMR_1      29:29           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SMR_1_HOST 0x00000001      /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_SMR_1_SOE  0x00000000      /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_OVER_TEMP_ALERT 30:30      /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_OVER_TEMP_ALERT_HOST 0x00000001 /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_OVER_TEMP_ALERT_SOE 0x00000000 /* RW--V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_OVER_TEMP  31:31           /* RWEVF */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_OVER_TEMP_HOST 0x00000001  /* RWE-V */
#define NV_NVLSAW_NVSPMC_STEER_INTR_CORRECTABLE_OVER_TEMP_SOE 0x00000000   /* RW--V */

#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY                0x00000898      /* R--4R */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PTIMER_0       20:20           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PTIMER_0_DISABLE 0x00000000    /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PTIMER_0_ENABLE 0x00000001     /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PTIMER_1       21:21           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PTIMER_1_DISABLE 0x00000000    /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PTIMER_1_ENABLE 0x00000001     /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PMGR_0         22:22           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PMGR_0_DISABLE 0x00000000      /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PMGR_0_ENABLE  0x00000001      /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PMGR_1         23:23           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PMGR_1_DISABLE 0x00000000      /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_PMGR_1_ENABLE  0x00000001      /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_SMBUS_MSGBOX   24:24           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_SMBUS_MSGBOX_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_LEGACY_SMBUS_MSGBOX_ENABLE 0x00000001 /* R---V */

#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE           0x000008a4      /* R--4R */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_0  0:0             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_0_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_0_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_1  1:1             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_1_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_1_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_2  2:2             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_2_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_2_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_3  3:3             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_3_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_3_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_4  4:4             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_4_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_4_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_5  5:5             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_5_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_5_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_6  6:6             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_6_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_6_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_7  7:7             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_7_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_7_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_8  8:8             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_8_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NVLIPT_8_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_0     9:9             /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_0_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_0_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_1     10:10           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_1_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_1_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_2     11:11           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_2_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_2_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_3     12:12           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_3_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_3_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_4     13:13           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_4_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_4_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_5     14:14           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_5_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_5_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_6     15:15           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_6_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_6_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_7     16:16           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_7_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_7_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_8     17:17           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_8_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_NPG_8_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SAW_WRITE_LOCKED 25:25    /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SAW_WRITE_LOCKED_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SAW_WRITE_LOCKED_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SOE_SHIM_FLUSH 26:26      /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SOE_SHIM_FLUSH_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SOE_SHIM_FLUSH_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SOE_SHIM_ILLEGAL 27:27    /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SOE_SHIM_ILLEGAL_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SOE_SHIM_ILLEGAL_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SMR_0     28:28           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SMR_0_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SMR_0_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SMR_1     29:29           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SMR_1_DISABLE 0x00000000  /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_SMR_1_ENABLE 0x00000001   /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_OVER_TEMP_ALERT 30:30     /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_OVER_TEMP_ALERT_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_OVER_TEMP_ALERT_ENABLE 0x00000001 /* R---V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_OVER_TEMP 31:31           /* R-EVF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_OVER_TEMP_DISABLE 0x00000000 /* R-E-V */
#define NV_NVLSAW_NVSPMC_INTR_SOE_EN_CORRECTABLE_OVER_TEMP_ENABLE 0x00000001 /* R---V */

#define NV_NVLSAW_NVSPMC_INTR_SOE_LEGACY                   0x00000884      /* R--4R */
#define NV_NVLSAW_NVSPMC_INTR_SOE_LEGACY_PTIMER_0          20:20           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_LEGACY_PTIMER_1          21:21           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_LEGACY_PMGR_0            22:22           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_LEGACY_PMGR_1            23:23           /* R--VF */
#define NV_NVLSAW_NVSPMC_INTR_SOE_LEGACY_SMBUS_MSGBOX      24:24           /* R--VF */
#endif // __lr10_dev_nvlsaw_ip_h__
