open-gpu-kernel-modules/kernel-open/nvidia-uvm/uvm_maxwell.c

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#include "uvm_hal.h"
#include "uvm_gpu.h"
#include "uvm_mem.h"

void uvm_hal_maxwell_arch_init_properties(uvm_parent_gpu_t *parent_gpu)
{
    parent_gpu->tlb_batch.va_invalidate_supported = false;

    // 128 GB should be enough for all current RM allocations and leaves enough
    // space for UVM internal mappings.
    // A single top level PDE covers 64 or 128 MB on Maxwell so 128 GB is fine to use.
    parent_gpu->rm_va_base = 0;
    parent_gpu->rm_va_size = 128 * UVM_SIZE_1GB;

    parent_gpu->uvm_mem_va_base = 768 * UVM_SIZE_1GB;
    parent_gpu->uvm_mem_va_size = UVM_MEM_VA_SIZE;

    parent_gpu->ce_phys_vidmem_write_supported = true;

    // We don't have a compelling use case in UVM-Lite for direct peer
    // migrations between GPUs, so don't bother setting them up.
    parent_gpu->peer_copy_mode = UVM_GPU_PEER_COPY_MODE_UNSUPPORTED;

    parent_gpu->max_channel_va = 1ULL << 40;

    parent_gpu->max_host_va = 1ULL << 40;

    // Maxwell can only map sysmem with 4K pages
    parent_gpu->can_map_sysmem_with_large_pages = false;

    // Maxwell cannot place GPFIFO in vidmem
    parent_gpu->gpfifo_in_vidmem_supported = false;

    parent_gpu->replayable_faults_supported = false;

    parent_gpu->non_replayable_faults_supported = false;

    parent_gpu->access_counters_supported = false;

    parent_gpu->fault_cancel_va_supported = false;

    parent_gpu->scoped_atomics_supported = false;

    parent_gpu->sparse_mappings_supported = false;

    parent_gpu->map_remap_larger_page_promotion = false;

    parent_gpu->smc.supported = false;

    parent_gpu->plc_supported = false;
}