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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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194 lines
5.3 KiB
C
194 lines
5.3 KiB
C
/*******************************************************************************
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Copyright (c) 2018-2021 NVIDIA Corporation
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to
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deal in the Software without restriction, including without limitation the
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rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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sell copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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*******************************************************************************/
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#include "uvm_va_space.h"
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#include "uvm_ats.h"
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#include "uvm_global.h"
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#include "uvm_gpu.h"
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static int uvm_ats_mode = 1;
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module_param(uvm_ats_mode, int, S_IRUGO);
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MODULE_PARM_DESC(uvm_ats_mode, "Set to 0 to disable ATS (Address Translation Services). "
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"Any other value is ignored. Has no effect unless the "
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"platform supports ATS.");
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void uvm_ats_init(const UvmPlatformInfo *platform_info)
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{
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g_uvm_global.ats.supported = platform_info->atsSupported;
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g_uvm_global.ats.enabled = uvm_ats_mode &&
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g_uvm_global.ats.supported &&
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UVM_ATS_SUPPORTED() &&
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uvm_va_space_mm_enabled_system();
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}
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void uvm_ats_init_va_space(uvm_va_space_t *va_space)
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{
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if (UVM_ATS_IBM_SUPPORTED())
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uvm_ats_ibm_init_va_space(va_space);
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}
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NV_STATUS uvm_ats_add_gpu(uvm_parent_gpu_t *parent_gpu)
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{
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if (UVM_ATS_IBM_SUPPORTED()) {
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// uvm_ibm_add_gpu() needs to be called even if ATS is disabled since it
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// sets parent_gpu->npu. Not setting parent_gpu->npu will result in
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// incorrect NVLink addresses. See dma_addr_to_gpu_addr().
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return uvm_ats_ibm_add_gpu(parent_gpu);
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}
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return NV_OK;
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}
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void uvm_ats_remove_gpu(uvm_parent_gpu_t *parent_gpu)
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{
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if (UVM_ATS_IBM_SUPPORTED()) {
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// uvm_ibm_remove_gpu() needs to be called even if ATS is disabled since
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// uvm_ibm_add_gpu() is called even in that case and
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// uvm_ibm_remove_gpu() needs to undo the work done by
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// uvm_ats_add_gpu() (gpu retained_count etc.).
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uvm_ats_ibm_remove_gpu(parent_gpu);
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}
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}
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NV_STATUS uvm_ats_bind_gpu(uvm_gpu_va_space_t *gpu_va_space)
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{
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NV_STATUS status = NV_OK;
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UVM_ASSERT(gpu_va_space);
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if (!gpu_va_space->ats.enabled)
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return status;
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uvm_assert_lockable_order(UVM_LOCK_ORDER_MMAP_LOCK);
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uvm_assert_lockable_order(UVM_LOCK_ORDER_VA_SPACE);
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if (UVM_ATS_IBM_SUPPORTED())
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status = uvm_ats_ibm_bind_gpu(gpu_va_space);
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return status;
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}
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void uvm_ats_unbind_gpu(uvm_gpu_va_space_t *gpu_va_space)
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{
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UVM_ASSERT(gpu_va_space);
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if (!gpu_va_space->ats.enabled)
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return;
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if (UVM_ATS_IBM_SUPPORTED())
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uvm_ats_ibm_unbind_gpu(gpu_va_space);
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}
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NV_STATUS uvm_ats_register_gpu_va_space(uvm_gpu_va_space_t *gpu_va_space)
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{
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NV_STATUS status = NV_OK;
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uvm_va_space_t *va_space;
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uvm_gpu_id_t gpu_id;
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UVM_ASSERT(gpu_va_space);
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if (!gpu_va_space->ats.enabled)
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return status;
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va_space = gpu_va_space->va_space;
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UVM_ASSERT(va_space);
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uvm_assert_rwsem_locked_write(&va_space->lock);
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gpu_id = gpu_va_space->gpu->id;
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// Prevent multiple registrations of the same gpu_va_space for ATS access.
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if (uvm_processor_mask_test(&va_space->ats.registered_gpu_va_spaces, gpu_id))
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return NV_ERR_INVALID_DEVICE;
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if (UVM_ATS_IBM_SUPPORTED())
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status = uvm_ats_ibm_register_gpu_va_space(gpu_va_space);
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if (status == NV_OK)
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uvm_processor_mask_set(&va_space->ats.registered_gpu_va_spaces, gpu_id);
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return status;
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}
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void uvm_ats_unregister_gpu_va_space(uvm_gpu_va_space_t *gpu_va_space)
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{
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uvm_gpu_id_t gpu_id;
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uvm_va_space_t *va_space;
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UVM_ASSERT(gpu_va_space);
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if (!gpu_va_space->ats.enabled)
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return;
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va_space = gpu_va_space->va_space;
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gpu_id = gpu_va_space->gpu->id;
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if (UVM_ATS_IBM_SUPPORTED())
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uvm_ats_ibm_unregister_gpu_va_space(gpu_va_space);
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uvm_va_space_down_write(va_space);
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uvm_processor_mask_clear(&va_space->ats.registered_gpu_va_spaces, gpu_id);
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uvm_va_space_up_write(va_space);
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}
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void uvm_ats_invalidate(uvm_va_space_t *va_space, NvU64 start, NvU64 end)
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{
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// We can only reach here from the mmu_notifier callbacks and these callbacks
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// wouldn't have been registered if ATS wasn't enabled.
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UVM_ASSERT(g_uvm_global.ats.enabled);
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if (UVM_ATS_IBM_SUPPORTED())
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uvm_ats_ibm_invalidate(va_space, start, end);
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}
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