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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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140 lines
4.6 KiB
C
140 lines
4.6 KiB
C
/*******************************************************************************
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Copyright (c) 2023-2024 NVIDIA Corporation
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to
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deal in the Software without restriction, including without limitation the
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rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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sell copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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*******************************************************************************/
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#include "uvm_linux.h"
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#include "uvm_processors.h"
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#include "uvm_global.h"
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#include "uvm_gpu.h"
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static struct kmem_cache *g_uvm_processor_mask_cache __read_mostly;
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const uvm_processor_mask_t g_uvm_processor_mask_cpu = { .bitmap = { 1 << UVM_PARENT_ID_CPU_VALUE }};
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const uvm_processor_mask_t g_uvm_processor_mask_empty = { };
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NV_STATUS uvm_processor_mask_cache_init(void)
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{
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BUILD_BUG_ON((8 * sizeof(((uvm_sub_processor_mask_t *)0)->bitmap)) < UVM_PARENT_ID_MAX_SUB_PROCESSORS);
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g_uvm_processor_mask_cache = NV_KMEM_CACHE_CREATE("uvm_processor_mask_t", uvm_processor_mask_t);
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if (!g_uvm_processor_mask_cache)
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return NV_ERR_NO_MEMORY;
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return NV_OK;
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}
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void uvm_processor_mask_cache_exit(void)
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{
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kmem_cache_destroy_safe(&g_uvm_processor_mask_cache);
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}
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uvm_processor_mask_t *uvm_processor_mask_cache_alloc(void)
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{
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return kmem_cache_alloc(g_uvm_processor_mask_cache, NV_UVM_GFP_FLAGS);
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}
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void uvm_processor_mask_cache_free(uvm_processor_mask_t *mask)
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{
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if (mask)
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kmem_cache_free(g_uvm_processor_mask_cache, mask);
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}
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int uvm_find_closest_node_mask(int src, const nodemask_t *mask)
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{
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int nid;
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int closest_nid = NUMA_NO_NODE;
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if (node_isset(src, *mask))
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return src;
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for_each_set_bit(nid, mask->bits, MAX_NUMNODES) {
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if (closest_nid == NUMA_NO_NODE || node_distance(src, nid) < node_distance(src, closest_nid))
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closest_nid = nid;
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}
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return closest_nid;
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}
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// This implementation avoids having to dynamically allocate a temporary
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// uvm_processor_mask_t on the stack (due to size) or the heap (due to possible
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// allocation failures).
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bool uvm_processor_mask_gpu_subset(const uvm_processor_mask_t *subset,
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const uvm_processor_mask_t *mask)
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{
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DECLARE_BITMAP(first_word, BITS_PER_LONG);
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BUILD_BUG_ON(UVM_ID_CPU_VALUE > BITS_PER_LONG);
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BUILD_BUG_ON(BITS_PER_LONG > UVM_ID_MAX_PROCESSORS);
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bitmap_copy(first_word, subset->bitmap, BITS_PER_LONG);
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__clear_bit(UVM_ID_CPU_VALUE, first_word);
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return bitmap_subset(first_word, mask->bitmap, BITS_PER_LONG) &&
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bitmap_subset(subset->bitmap + 1, mask->bitmap + 1, UVM_ID_MAX_PROCESSORS - BITS_PER_LONG);
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}
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void uvm_parent_gpus_from_processor_mask(uvm_parent_processor_mask_t *parent_mask,
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const uvm_processor_mask_t *mask)
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{
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uvm_gpu_id_t gpu_id;
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uvm_parent_processor_mask_zero(parent_mask);
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for_each_gpu_id_in_mask(gpu_id, mask)
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uvm_parent_processor_mask_set(parent_mask, uvm_parent_gpu_id_from_gpu_id(gpu_id));
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}
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bool uvm_numa_id_eq(int nid0, int nid1)
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{
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UVM_ASSERT(nid0 >= NUMA_NO_NODE && nid0 < MAX_NUMNODES);
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UVM_ASSERT(nid1 >= NUMA_NO_NODE && nid1 < MAX_NUMNODES);
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return nid0 == nid1;
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}
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const char *uvm_processor_get_name(uvm_processor_id_t id)
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{
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if (UVM_ID_IS_CPU(id))
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return "0: CPU";
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else
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return uvm_gpu_name(uvm_gpu_get(id));
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}
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void uvm_processor_get_uuid(uvm_processor_id_t id, NvProcessorUuid *out_uuid)
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{
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if (UVM_ID_IS_CPU(id)) {
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memcpy(out_uuid, &NV_PROCESSOR_UUID_CPU_DEFAULT, sizeof(*out_uuid));
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}
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else {
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uvm_gpu_t *gpu = uvm_gpu_get(id);
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UVM_ASSERT(gpu);
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memcpy(out_uuid, &gpu->uuid, sizeof(*out_uuid));
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}
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}
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bool uvm_processor_has_memory(uvm_processor_id_t id)
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{
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if (UVM_ID_IS_CPU(id))
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return true;
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return uvm_gpu_get(id)->mem_info.size > 0;
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}
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