mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2024-12-02 00:24:22 +01:00
465 lines
16 KiB
C
465 lines
16 KiB
C
/*******************************************************************************
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Copyright (c) 2015-2023 NVIDIA Corporation
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to
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deal in the Software without restriction, including without limitation the
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rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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sell copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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*******************************************************************************/
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#include "uvm_extern_decl.h"
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#include "uvm_forward_decl.h"
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#include "uvm_push.h"
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#include "uvm_channel.h"
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#include "uvm_hal.h"
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#include "uvm_kvmalloc.h"
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#include "uvm_linux.h"
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#include "nv_stdarg.h"
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// This parameter enables push description tracking in push info. It's enabled
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// by default for debug and develop builds and disabled for release builds.
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static unsigned uvm_debug_enable_push_desc = UVM_IS_DEBUG() || UVM_IS_DEVELOP();
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module_param(uvm_debug_enable_push_desc, uint, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(uvm_debug_enable_push_desc, "Enable push description tracking");
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static unsigned uvm_debug_enable_push_acquire_info = 0;
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module_param(uvm_debug_enable_push_acquire_info, uint, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(uvm_debug_enable_push_acquire_info, "Enable push acquire information tracking");
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static uvm_push_acquire_info_t *push_acquire_info_from_push(uvm_push_t *push)
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{
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uvm_channel_t *channel = push->channel;
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UVM_ASSERT(channel != NULL);
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UVM_ASSERT(push->channel_tracking_value == 0);
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UVM_ASSERT_MSG(push->push_info_index < channel->num_gpfifo_entries, "index %u\n", push->push_info_index);
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if (!uvm_debug_enable_push_acquire_info)
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return NULL;
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return &channel->push_acquire_infos[push->push_info_index];
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}
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// Acquire a single tracker entry. Subsequently pushed GPU work will not start
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// before the work tracked by tracker entry is complete.
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static void push_acquire_tracker_entry(uvm_push_t *push,
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uvm_tracker_entry_t *tracker_entry,
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uvm_push_acquire_info_t *push_acquire_info)
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{
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uvm_channel_t *entry_channel;
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uvm_channel_t *channel;
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NvU64 semaphore_va;
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uvm_gpu_t *gpu;
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UVM_ASSERT(push != NULL);
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UVM_ASSERT(tracker_entry != NULL);
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entry_channel = tracker_entry->channel;
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if (entry_channel == NULL)
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return;
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channel = push->channel;
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if (channel == entry_channel)
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return;
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semaphore_va = uvm_channel_tracking_semaphore_get_gpu_va_in_channel(entry_channel, channel);
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gpu = uvm_channel_get_gpu(channel);
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gpu->parent->host_hal->semaphore_acquire(push, semaphore_va, (NvU32)tracker_entry->value);
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if (push_acquire_info) {
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const NvU32 num_values = push_acquire_info->num_values;
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UVM_ASSERT(uvm_debug_enable_push_acquire_info);
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if (num_values < UVM_PUSH_ACQUIRE_INFO_MAX_ENTRIES) {
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push_acquire_info->values[num_values].value = tracker_entry->value;
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push_acquire_info->values[num_values].gpu_id = uvm_channel_get_gpu(entry_channel)->id;
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push_acquire_info->values[num_values].is_proxy = uvm_channel_is_proxy(channel);
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if (uvm_channel_is_proxy(channel)) {
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push_acquire_info->values[num_values].proxy.pool_index = uvm_channel_index_in_pool(channel);
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}
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else {
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push_acquire_info->values[num_values].runlist_id = entry_channel->channel_info.hwRunlistId;
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push_acquire_info->values[num_values].channel_id = entry_channel->channel_info.hwChannelId;
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}
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}
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++push_acquire_info->num_values;
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}
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}
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void uvm_push_acquire_tracker(uvm_push_t *push, uvm_tracker_t *tracker)
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{
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uvm_tracker_entry_t *entry;
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uvm_push_acquire_info_t *push_acquire_info;
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UVM_ASSERT(push != NULL);
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if (tracker == NULL)
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return;
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uvm_tracker_remove_completed(tracker);
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push_acquire_info = push_acquire_info_from_push(push);
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for_each_tracker_entry(entry, tracker)
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push_acquire_tracker_entry(push, entry, push_acquire_info);
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}
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static NV_STATUS push_reserve_channel(uvm_channel_manager_t *manager,
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uvm_channel_type_t channel_type,
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uvm_gpu_t *dst_gpu,
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uvm_channel_t **channel)
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{
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NV_STATUS status;
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// Pick a channel and reserve a GPFIFO entry
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// TODO: Bug 1764953: use the dependencies in the tracker to pick a channel
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// in a smarter way.
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if (dst_gpu == NULL)
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status = uvm_channel_reserve_type(manager, channel_type, channel);
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else
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status = uvm_channel_reserve_gpu_to_gpu(manager, dst_gpu, channel);
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if (status == NV_OK)
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UVM_ASSERT(*channel);
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return status;
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}
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static void push_set_description(uvm_push_t *push, const char *format, va_list args)
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{
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uvm_push_info_t *push_info;
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UVM_ASSERT(uvm_push_info_is_tracking_descriptions());
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push_info = uvm_push_info_from_push(push);
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vsnprintf(push_info->description, sizeof(push_info->description), format, args);
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}
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void uvm_push_set_description(uvm_push_t *push, const char *format, ...)
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{
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va_list va;
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if (!uvm_push_info_is_tracking_descriptions())
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return;
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va_start(va, format);
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push_set_description(push, format, va);
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va_end(va);
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}
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// Internal helper to fill info push info as part of beginning a push.
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static void push_fill_info(uvm_push_t *push,
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const char *filename,
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const char *function,
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int line,
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const char *format,
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va_list args)
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{
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uvm_push_acquire_info_t *push_acquire_info;
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uvm_push_info_t *push_info = uvm_push_info_from_push(push);
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push_info->filename = kbasename(filename);
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push_info->function = function;
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push_info->line = line;
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push_acquire_info = push_acquire_info_from_push(push);
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if (push_acquire_info)
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push_acquire_info->num_values = 0;
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if (uvm_push_info_is_tracking_descriptions())
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push_set_description(push, format, args);
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}
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static NV_STATUS push_begin_acquire_with_info(uvm_channel_t *channel,
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uvm_tracker_t *tracker,
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uvm_push_t *push,
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const char *filename,
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const char *function,
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int line,
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const char *format,
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va_list args)
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{
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NV_STATUS status;
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memset(push, 0, sizeof(*push));
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push->gpu = uvm_channel_get_gpu(channel);
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status = uvm_channel_begin_push(channel, push);
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if (status != NV_OK)
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return status;
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push_fill_info(push, filename, function, line, format, args);
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uvm_push_acquire_tracker(push, tracker);
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return NV_OK;
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}
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__attribute__ ((format(printf, 9, 10)))
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NV_STATUS __uvm_push_begin_acquire_with_info(uvm_channel_manager_t *manager,
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uvm_channel_type_t type,
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uvm_gpu_t *dst_gpu,
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uvm_tracker_t *tracker,
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uvm_push_t *push,
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const char *filename,
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const char *function,
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int line,
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const char *format, ...)
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{
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va_list args;
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NV_STATUS status;
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uvm_channel_t *channel;
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if (dst_gpu != NULL) {
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UVM_ASSERT(type == UVM_CHANNEL_TYPE_GPU_TO_GPU);
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UVM_ASSERT(dst_gpu != manager->gpu);
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}
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status = push_reserve_channel(manager, type, dst_gpu, &channel);
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if (status != NV_OK)
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return status;
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UVM_ASSERT(channel);
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va_start(args, format);
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status = push_begin_acquire_with_info(channel, tracker, push, filename, function, line, format, args);
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va_end(args);
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return status;
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}
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__attribute__ ((format(printf, 7, 8)))
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NV_STATUS __uvm_push_begin_acquire_on_channel_with_info(uvm_channel_t *channel,
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uvm_tracker_t *tracker,
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uvm_push_t *push,
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const char *filename,
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const char *function,
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int line,
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const char *format, ...)
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{
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va_list args;
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NV_STATUS status;
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status = uvm_channel_reserve(channel, 1);
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if (status != NV_OK)
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return status;
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va_start(args, format);
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status = push_begin_acquire_with_info(channel, tracker, push, filename, function, line, format, args);
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va_end(args);
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return status;
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}
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__attribute__ ((format(printf, 7, 8)))
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NV_STATUS __uvm_push_begin_acquire_on_reserved_channel_with_info(uvm_channel_t *channel,
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uvm_tracker_t *tracker,
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uvm_push_t *push,
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const char *filename,
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const char *function,
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int line,
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const char *format, ...)
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{
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va_list args;
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NV_STATUS status;
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va_start(args, format);
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status = push_begin_acquire_with_info(channel, tracker, push, filename, function, line, format, args);
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va_end(args);
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return status;
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}
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bool uvm_push_info_is_tracking_descriptions(void)
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{
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return uvm_debug_enable_push_desc != 0;
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}
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bool uvm_push_info_is_tracking_acquires(void)
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{
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return uvm_debug_enable_push_acquire_info != 0;
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}
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void uvm_push_end(uvm_push_t *push)
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{
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uvm_push_flag_t flag;
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uvm_channel_end_push(push);
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flag = find_first_bit(push->flags, UVM_PUSH_FLAG_COUNT);
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// All flags should be reset by the end of the push
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UVM_ASSERT_MSG(flag == UVM_PUSH_FLAG_COUNT, "first flag set %d\n", flag);
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}
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NV_STATUS uvm_push_wait(uvm_push_t *push)
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{
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uvm_tracker_entry_t entry;
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uvm_push_get_tracker_entry(push, &entry);
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return uvm_tracker_wait_for_entry(&entry);
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}
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NV_STATUS uvm_push_end_and_wait(uvm_push_t *push)
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{
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uvm_push_end(push);
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return uvm_push_wait(push);
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}
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NV_STATUS uvm_push_begin_fake(uvm_gpu_t *gpu, uvm_push_t *push)
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{
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memset(push, 0, sizeof(*push));
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push->begin = (NvU32 *)uvm_kvmalloc(UVM_MAX_PUSH_SIZE);
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if (!push->begin)
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return NV_ERR_NO_MEMORY;
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push->next = push->begin;
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push->gpu = gpu;
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return NV_OK;
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}
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void uvm_push_end_fake(uvm_push_t *push)
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{
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uvm_kvfree(push->begin);
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push->begin = NULL;
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}
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void *uvm_push_inline_data_get(uvm_push_inline_data_t *data, size_t size)
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{
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void *buffer = data->next_data;
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UVM_ASSERT(!uvm_global_is_suspended());
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UVM_ASSERT_MSG(uvm_push_get_size(data->push) + uvm_push_inline_data_size(data) + UVM_METHOD_SIZE + size <= UVM_MAX_PUSH_SIZE,
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"push size %u inline data size %zu new data size %zu max push %u\n",
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uvm_push_get_size(data->push), uvm_push_inline_data_size(data), size, UVM_MAX_PUSH_SIZE);
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UVM_ASSERT_MSG(uvm_push_inline_data_size(data) + size <= UVM_PUSH_INLINE_DATA_MAX_SIZE,
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"inline data size %zu new data size %zu max %u\n",
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uvm_push_inline_data_size(data), size, UVM_PUSH_INLINE_DATA_MAX_SIZE);
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data->next_data += size;
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return buffer;
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}
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void *uvm_push_inline_data_get_aligned(uvm_push_inline_data_t *data, size_t size, size_t alignment)
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{
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NvU64 next_ptr = (NvU64)(uintptr_t)data->next_data;
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size_t offset = 0;
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char *buffer;
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UVM_ASSERT(alignment <= UVM_PAGE_SIZE_4K);
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UVM_ASSERT_MSG(IS_ALIGNED(alignment, UVM_METHOD_SIZE), "alignment %zu\n", alignment);
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offset = UVM_ALIGN_UP(next_ptr, alignment) - next_ptr;
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buffer = (char *)uvm_push_inline_data_get(data, size + offset);
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return buffer + offset;
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}
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uvm_gpu_address_t uvm_push_inline_data_end(uvm_push_inline_data_t *data)
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{
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NvU64 inline_data_address;
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uvm_push_t *push = data->push;
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uvm_channel_t *channel = push->channel;
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// Round up the inline data size to the method size
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size_t noop_size = roundup(uvm_push_inline_data_size(data), UVM_METHOD_SIZE);
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if (channel == NULL) {
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// Fake push, just return the CPU address.
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inline_data_address = (NvU64) (uintptr_t)(push->next + 1);
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}
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else {
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uvm_pushbuffer_t *pushbuffer = uvm_channel_get_pushbuffer(channel);
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// Offset of the inlined data within the push.
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inline_data_address = (push->next - push->begin + 1) * UVM_METHOD_SIZE;
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// Add GPU VA of the push begin
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inline_data_address += uvm_pushbuffer_get_gpu_va_for_push(pushbuffer, push);
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}
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// This will place a noop right before the inline data that was written.
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// Plus UVM_METHOD_SIZE for the noop method itself.
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uvm_push_get_gpu(push)->parent->host_hal->noop(push, noop_size + UVM_METHOD_SIZE);
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return uvm_gpu_address_virtual(inline_data_address);
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}
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void *uvm_push_get_single_inline_buffer(uvm_push_t *push,
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size_t size,
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size_t alignment,
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uvm_gpu_address_t *gpu_address)
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{
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uvm_push_inline_data_t data;
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void *buffer;
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UVM_ASSERT(IS_ALIGNED(alignment, UVM_METHOD_SIZE));
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uvm_push_inline_data_begin(push, &data);
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buffer = uvm_push_inline_data_get_aligned(&data, size, alignment);
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*gpu_address = uvm_push_inline_data_end(&data);
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gpu_address->address = UVM_ALIGN_UP(gpu_address->address, alignment);
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return buffer;
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}
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NvU64 *uvm_push_timestamp(uvm_push_t *push)
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{
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uvm_gpu_t *gpu = uvm_push_get_gpu(push);
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const size_t timestamp_size = 16;
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NvU64 *timestamp;
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uvm_gpu_address_t address;
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timestamp = (NvU64 *)uvm_push_get_single_inline_buffer(push, timestamp_size, timestamp_size, &address);
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// Timestamp is in the second half of the 16 byte semaphore release
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timestamp += 1;
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if (uvm_channel_is_ce(push->channel))
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gpu->parent->ce_hal->semaphore_timestamp(push, address.address);
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else
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gpu->parent->sec2_hal->semaphore_timestamp(push, address.address);
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return timestamp;
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}
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bool uvm_push_method_is_valid(uvm_push_t *push, NvU8 subch, NvU32 method_address, NvU32 method_data)
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{
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uvm_gpu_t *gpu = uvm_push_get_gpu(push);
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if (subch == UVM_SUBCHANNEL_CE)
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return gpu->parent->ce_hal->method_is_valid(push, method_address, method_data);
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else if (subch == UVM_SUBCHANNEL_HOST)
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return gpu->parent->host_hal->method_is_valid(push, method_address, method_data);
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else if (subch == UVM_SW_OBJ_SUBCHANNEL)
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return gpu->parent->host_hal->sw_method_is_valid(push, method_address, method_data);
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else if (subch == UVM_SUBCHANNEL_SEC2)
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return true;
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UVM_ERR_PRINT("Unsupported subchannel 0x%x\n", subch);
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return false;
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}
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