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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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83 lines
3.8 KiB
C
83 lines
3.8 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _clc076_h_
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#define _clc076_h_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "nvtypes.h"
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#define GP100_UVM_SW (0x0000c076)
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#define NVC076_SET_OBJECT (0x00000000)
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#define NVC076_NO_OPERATION (0x00000100)
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/* Method data fields to support gpu fault cancel. These are pushed in order by UVM */
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#define NVC076_FAULT_CANCEL_A (0x00000104)
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#define NVC076_FAULT_CANCEL_A_INST_APERTURE 1:0
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#define NVC076_FAULT_CANCEL_A_INST_APERTURE_VID_MEM 0x00000000
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#define NVC076_FAULT_CANCEL_A_INST_APERTURE_SYS_MEM_COHERENT 0x00000002
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#define NVC076_FAULT_CANCEL_A_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003
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/* instance pointer is 4k aligned so those bits are reused to store the aperture */
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#define NVC076_FAULT_CANCEL_A_INST_LOW 31:12
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#define NVC076_FAULT_CANCEL_B (0x00000108)
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#define NVC076_FAULT_CANCEL_B_INST_HI 31:0
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#define NVC076_FAULT_CANCEL_C (0x0000010c)
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#define NVC076_FAULT_CANCEL_C_CLIENT_ID 5:0
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#define NVC076_FAULT_CANCEL_C_GPC_ID 10:6
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#define NVC076_FAULT_CANCEL_C_MODE 31:30
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#define NVC076_FAULT_CANCEL_C_MODE_TARGETED 0x00000000
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#define NVC076_FAULT_CANCEL_C_MODE_GLOBAL 0x00000001
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/* Method data fields to support clearing faulted bit. These are pushed in order by UVM */
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#define NVC076_CLEAR_FAULTED_A (0x00000110)
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#define NVC076_CLEAR_FAULTED_A_INST_APERTURE 1:0
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#define NVC076_CLEAR_FAULTED_A_INST_APERTURE_VID_MEM 0x00000000
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#define NVC076_CLEAR_FAULTED_A_INST_APERTURE_SYS_MEM_COHERENT 0x00000002
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#define NVC076_CLEAR_FAULTED_A_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003
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#define NVC076_CLEAR_FAULTED_A_TYPE 2:2
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#define NVC076_CLEAR_FAULTED_A_TYPE_PBDMA_FAULTED 0x00000000
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#define NVC076_CLEAR_FAULTED_A_TYPE_ENG_FAULTED 0x00000001
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/* instance pointer is 4k aligned */
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#define NVC076_CLEAR_FAULTED_A_INST_LOW 31:12
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#define NVC076_CLEAR_FAULTED_B (0x00000114)
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#define NVC076_CLEAR_FAULTED_B_INST_HI 31:0
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#ifdef __cplusplus
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}; /* extern "C" */
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#endif
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#endif /* _clc076_h_ */
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