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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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78 lines
4.5 KiB
C
78 lines
4.5 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _clc369_h_
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#define _clc369_h_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define MMU_FAULT_BUFFER (0xc369)
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#define NVC369_BUF
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#define NVC369_BUF_ENTRY 0x0000001f:0x00000000
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#define NVC369_BUF_SIZE 32
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#define NVC369_BUF_ENTRY_INST_APERTURE MW((9+0*32):(0*32+8))
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#define NVC369_BUF_ENTRY_INST_APERTURE_VID_MEM 0x00000000
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#define NVC369_BUF_ENTRY_INST_APERTURE_SYS_MEM_COHERENT 0x00000002
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#define NVC369_BUF_ENTRY_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003
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#define NVC369_BUF_ENTRY_INST_LO MW((31+0*32):(0*32+12))
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#define NVC369_BUF_ENTRY_INST_HI MW((31+1*32):(1*32+0))
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#define NVC369_BUF_ENTRY_INST MW((31+1*32):(0*32+12))
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#define NVC369_BUF_ENTRY_ADDR_PHYS_APERTURE MW((1+2*32):(2*32+0))
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#define NVC369_BUF_ENTRY_ADDR_LO MW((31+2*32):(2*32+12))
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#define NVC369_BUF_ENTRY_ADDR_HI MW((31+3*32):(3*32+0))
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#define NVC369_BUF_ENTRY_ADDR MW((31+3*32):(2*32+12))
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#define NVC369_BUF_ENTRY_TIMESTAMP_LO MW((31+4*32):(4*32+0))
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#define NVC369_BUF_ENTRY_TIMESTAMP_HI MW((31+5*32):(5*32+0))
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#define NVC369_BUF_ENTRY_TIMESTAMP MW((31+5*32):(4*32+0))
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#define NVC369_BUF_ENTRY_ENGINE_ID MW((8+6*32):(6*32+0))
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#define NVC369_BUF_ENTRY_FAULT_TYPE MW((4+7*32):(7*32+0))
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#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT MW((7+7*32):(7*32+7))
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#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_FALSE 0x00000000
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#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_TRUE 0x00000001
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#define NVC369_BUF_ENTRY_CLIENT MW((14+7*32):(7*32+8))
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#define NVC369_BUF_ENTRY_ACCESS_TYPE MW((19+7*32):(7*32+16))
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#define NVC369_BUF_ENTRY_MMU_CLIENT_TYPE MW((20+7*32):(7*32+20))
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#define NVC369_BUF_ENTRY_GPC_ID MW((28+7*32):(7*32+24))
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#define NVC369_BUF_ENTRY_PROTECTED_MODE MW((29+7*32):(7*32+29))
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#define NVC369_BUF_ENTRY_PROTECTED_MODE_FALSE 0x00000000
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#define NVC369_BUF_ENTRY_PROTECTED_MODE_TRUE 0x00000001
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#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_EN MW((30+7*32):(7*32+30))
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#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_EN_FALSE 0x00000000
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#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_EN_TRUE 0x00000001
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#define NVC369_BUF_ENTRY_VALID MW((31+7*32):(7*32+31))
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#define NVC369_BUF_ENTRY_VALID_FALSE 0x00000000
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#define NVC369_BUF_ENTRY_VALID_TRUE 0x00000001
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#define NVC369_NOTIFIER_MMU_FAULT_NON_REPLAYABLE 0
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#define NVC369_NOTIFIER_MMU_FAULT_REPLAYABLE 1
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#define NVC369_NOTIFIER_MMU_FAULT_ERROR 2
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#define NVC369_NOTIFIER_MMU_FAULT_NON_REPLAYABLE_IN_PRIV 3
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#ifdef __cplusplus
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}; /* extern "C" */
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#endif
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#endif /* _clc369_h_ */
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