2018-05-13 16:29:43 +02:00
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#pragma once
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#if defined (__cplusplus)
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extern "C" {
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#endif
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#include <stdio.h>
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#include "CustomAssert.h"
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#include <string.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <stdint.h>
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#include <sys/mman.h>
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#include <sys/ioctl.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <errno.h>
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#include <stdarg.h>
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#include <drm/drm.h>
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#include <drm/drm_fourcc.h>
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#include <drm/vc4_drm.h>
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2018-05-13 20:47:05 +02:00
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#include <xf86drm.h>
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#include <xf86drmMode.h>
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2018-05-13 16:29:43 +02:00
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2018-08-22 22:20:29 +02:00
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//normal nodes?
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//modesetting can be done
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2018-05-13 16:29:43 +02:00
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#define DRM_IOCTL_CTRL_DEV_FILE_NAME "/dev/dri/card0"
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2018-08-22 22:20:29 +02:00
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//render nodes
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//no modesetting --> so only for offscreen rendering
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#define DRM_IOCTL_RENDER_DEV_FILE_NAME "/dev/dri/renderD128"
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2018-05-13 16:29:43 +02:00
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2018-05-13 18:20:52 +02:00
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#define WAIT_TIMEOUT_INFINITE 0xffffffffffffffffull
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#define ARM_PAGE_SIZE 4096
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2018-11-18 15:21:33 +01:00
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extern int controlFd;
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//extern int renderFd;
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2018-05-13 16:29:43 +02:00
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int openIoctl();
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void closeIoctl();
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2020-02-21 00:51:59 +01:00
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int vc4_get_chip_info(int fd,
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uint32_t* technologyVersion,
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uint32_t* IDstrUINT,
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uint32_t* vpmMemorySize,
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uint32_t* hdrSupported,
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uint32_t* numSemaphores,
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uint32_t* numTMUperSlice,
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uint32_t* numQPUperSlice,
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uint32_t* numSlices,
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uint32_t* v3dRevision,
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uint32_t* tileBufferDoubleBufferModeSupported,
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uint32_t* tileBufferSize,
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uint32_t* vriMemorySize);
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2018-05-13 16:29:43 +02:00
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int vc4_has_feature(int fd, uint32_t feature);
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int vc4_test_tiling(int fd);
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uint64_t vc4_bo_get_tiling(int fd, uint32_t bo, uint64_t mod);
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int vc4_bo_set_tiling(int fd, uint32_t bo, uint64_t mod);
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2018-09-09 16:45:07 +02:00
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void* vc4_bo_map_unsynchronized(int fd, uint32_t bo, uint32_t offset, uint32_t size);
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void vc4_bo_unmap_unsynchronized(int fd, void* ptr, uint32_t size);
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2018-05-13 18:20:52 +02:00
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//int vc4_bo_wait_ioctl(int fd, uint32_t handle, uint64_t timeout_ns);
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int vc4_bo_wait(int fd, uint32_t bo, uint64_t timeout_ns);
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//int vc4_seqno_wait_ioctl(int fd, uint64_t seqno, uint64_t timeout_ns);
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2018-10-17 21:56:13 +02:00
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int vc4_seqno_wait(int fd, uint64_t* lastFinishedSeqno, uint64_t seqno, uint64_t* timeout_ns);
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2018-05-13 16:29:43 +02:00
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int vc4_bo_flink(int fd, uint32_t bo, uint32_t *name);
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uint32_t vc4_bo_alloc_shader(int fd, const void *data, uint32_t* size);
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uint32_t vc4_bo_open_name(int fd, uint32_t name);
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uint32_t vc4_bo_alloc(int fd, uint32_t size, const char *name);
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void vc4_bo_free(int fd, uint32_t bo, void* mappedAddr, uint32_t size);
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2020-02-22 20:59:19 +01:00
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uint32_t vc4_set_madvise(int fd, uint32_t bo, uint32_t needed, int hasMadvise);
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uint32_t vc4_create_perfmon(int fd, uint32_t* counters, uint32_t num_counters);
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void vc4_destroy_perfmon(int fd, uint32_t id);
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void vc4_perfmon_get_values(int fd, uint32_t id, void* ptr);
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2018-05-13 16:29:43 +02:00
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void vc4_bo_label(int fd, uint32_t bo, const char* name);
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2018-05-13 18:20:52 +02:00
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int vc4_bo_get_dmabuf(int fd, uint32_t bo);
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2018-09-09 16:45:07 +02:00
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void* vc4_bo_map(int fd, uint32_t bo, uint32_t offset, uint32_t size);
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2018-05-13 20:47:05 +02:00
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void vc4_cl_submit(int fd, struct drm_vc4_submit_cl* submit, uint64_t* lastEmittedSeqno, uint64_t* lastFinishedSeqno);
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2019-09-08 00:30:52 +02:00
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uint32_t getBOAlignedSize(uint32_t size, uint32_t alignment);
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2020-02-22 20:59:19 +01:00
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void vc4_print_hang_state(int fd);
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2018-05-13 18:20:52 +02:00
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2018-05-13 16:29:43 +02:00
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#if defined (__cplusplus)
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}
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#endif
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