mirror of
https://github.com/Yours3lf/rpi-vk-driver.git
synced 2025-02-20 17:54:17 +01:00
fixed a couple of mistakes in assembler, added assembly shader to tri
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@ -2,6 +2,7 @@
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#include <stdlib.h>
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#include <string.h>
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#include "qpu_assembler.h"
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#include "vc4_qpu_defines.h"
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/*********************************************************************************************************************
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@ -77,7 +78,7 @@ WS bit: ws
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REL bit: rel
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REG bit: reg
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SIGNED bit: signed
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Conditional execution for the ADD pipeline: never, always, zs, zc, ns, nc, cs, cc
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Conditional execution for the ADD pipeline (default is never): never, always, zs, zc, ns, nc, cs, cc
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Unpack modes (from regfile A, or if PM is set from R4): nop, 16a, 16b, 8d_rep, 8a, 8b, 8c, 8d
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6)
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@ -122,11 +123,6 @@ srcA, srcB can be: r0-r5 or a, b for regfiles A and B, or imm for the small imme
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==================================================================
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==================================================================
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dstAdd: rx0-31, r0-5, special regs
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raddr_a_opt: ra0-31, r0-5, special regs
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raddr_b_opt: rb0-31, r0-5, special regs
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Examples:
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sig_none ; rx0.nop = add.pm.sf.always(r0, r1, 0) ; rx0.nop = fmul.always(r2, r3) ;
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sig_branch ; rx0 = branch.pm.rel.reg.always(0xdeadbeef, ra1) ; rx0 = branch() ;
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@ -135,6 +131,8 @@ sig_load_imm ; rx0.nop = load32.pm.sf.always(0xdeadbeef) ; rx0.nop
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sig_load_imm ; rx0.nop = load16.pm.sf.signed.always(1, 2) ; rx0.nop = load16.always() ;
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#mov
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sig_none ; rx0.nop = or(r0, r0) ; rx0 = v8min(r1, r1) ;
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#nop
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sig_none ; nop = nop(nop, nop) ; nop = nop(nop, nop) ;
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*/
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uint64_t encode_alu(qpu_sig_bits sig_bits,
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@ -513,7 +511,7 @@ void parse_dst(char** str, qpu_waddr* waddr, uint8_t* pack_mode, unsigned is_add
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if(dst && dst[0] == 'r' && dst[1] == 'x')
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{
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waddr_res = strtol(dst+2, 0, 0);
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waddr_res = strtoul(dst+2, 0, 0);
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}
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unsigned num_pack_a_str = sizeof(qpu_pack_a_str) / sizeof(const char *);
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@ -642,7 +640,7 @@ void parse_op_modifiers(char** str, uint8_t* signed_or_unsigned, uint8_t* ws, ui
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*str += 1;
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}
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void parse_op(char** str, qpu_alu_type* type, qpu_op_add* op_add, qpu_op_mul* op_mul, uint8_t* is_sem_inc, qpu_load_type* load_type)
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void parse_op(char** str, qpu_alu_type* type, qpu_op_add* op_add, qpu_op_mul* op_mul, uint8_t* is_sem_inc, qpu_load_type* load_type, unsigned is_add)
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{
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char* op = strtok(*str, ".");
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@ -677,21 +675,26 @@ void parse_op(char** str, qpu_alu_type* type, qpu_op_add* op_add, qpu_op_mul* op
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unsigned num_add_ops = sizeof(qpu_op_add_str) / sizeof(const char *);
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unsigned num_mul_ops = sizeof(qpu_op_mul_str) / sizeof(const char *);
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for(unsigned c = 0; c < num_add_ops && op; ++c)
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if(is_add)
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{
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if(qpu_op_add_str[c] && strcmp(op, qpu_op_add_str[c]) == 0)
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for(unsigned c = 0; c < num_add_ops && op; ++c)
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{
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*op_add = c;
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break;
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if(qpu_op_add_str[c] && strcmp(op, qpu_op_add_str[c]) == 0)
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{
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*op_add = c;
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break;
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}
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}
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}
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for(unsigned c = 0; c < num_mul_ops && op; ++c)
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else
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{
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if(qpu_op_mul_str[c] && strcmp(op, qpu_op_mul_str[c]) == 0)
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for(unsigned c = 0; c < num_mul_ops && op; ++c)
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{
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*op_mul = c;
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break;
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if(qpu_op_mul_str[c] && strcmp(op, qpu_op_mul_str[c]) == 0)
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{
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*op_mul = c;
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break;
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}
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}
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}
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}
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@ -757,7 +760,7 @@ void parse_args_alu(char** str, qpu_mux* in_a, qpu_mux* in_b, uint8_t* raddr_a,
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if(!raddr_a_res && arg && arg[0] == 'r' && arg[1] == 'a')
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{
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raddr_a_res = strtol(arg+2, 0, 0);
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raddr_a_res = strtoul(arg+2, 0, 0);
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}
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@ -785,12 +788,12 @@ void parse_args_alu(char** str, qpu_mux* in_a, qpu_mux* in_b, uint8_t* raddr_a,
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if(!raddr_b_res && arg && arg[0] == 'r' && arg[1] == 'b')
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{
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raddr_b_res = strtol(arg+2, 0, 0);
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raddr_b_res = strtoul(arg+2, 0, 0);
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}
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if(is_si)
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{
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uint32_t si = strtol(arg, 0, 0);
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uint32_t si = strtoul(arg, 0, 0);
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raddr_b_res = qpu_encode_small_immediate(si);
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}
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@ -813,7 +816,7 @@ void parse_args_sem(char** str, uint8_t* sem, uint32_t* imm32)
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if(arg)
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{
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*sem = strtol(arg, 0, 0);
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*sem = strtoul(arg, 0, 0);
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*str = arg;
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}
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@ -821,7 +824,7 @@ void parse_args_sem(char** str, uint8_t* sem, uint32_t* imm32)
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if(arg)
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{
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*imm32 = strtol(arg, 0, 0);
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*imm32 = strtoul(arg, 0, 0);
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*str = arg;
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}
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@ -840,7 +843,7 @@ void parse_args_branch(char** str, uint32_t* imm32, qpu_branch_cond* branch_cond
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if(arg)
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{
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*imm32 = strtol(arg, 0, 0);
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*imm32 = strtoul(arg, 0, 0);
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*str = arg;
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}
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@ -881,7 +884,7 @@ void parse_args_branch(char** str, uint32_t* imm32, qpu_branch_cond* branch_cond
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if(!raddr_a_res && arg && arg[0] == 'r' && arg[1] == 'a')
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{
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raddr_a_res = strtol(arg+2, 0, 0);
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raddr_a_res = strtoul(arg+2, 0, 0);
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}
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*raddr_a = raddr_a_res;
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@ -905,7 +908,7 @@ void parse_args_load(char** str, qpu_load_type load_type, uint32_t* imm32, uint1
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{
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if(arg)
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{
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*imm32 = strtol(arg, 0, 0);
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*imm32 = strtoul(arg, 0, 0);
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*str = arg;
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}
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}
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@ -913,7 +916,7 @@ void parse_args_load(char** str, qpu_load_type load_type, uint32_t* imm32, uint1
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{
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if(arg)
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{
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*ms_imm16 = strtol(arg, 0, 0);
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*ms_imm16 = strtoul(arg, 0, 0);
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*str = arg;
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}
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@ -921,7 +924,7 @@ void parse_args_load(char** str, qpu_load_type load_type, uint32_t* imm32, uint1
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if(arg)
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{
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*ls_imm16 = strtol(arg, 0, 0);
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*ls_imm16 = strtoul(arg, 0, 0);
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*str = arg;
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}
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}
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@ -968,8 +971,8 @@ void assemble_qpu_asm(char* str, uint64_t* instructions)
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qpu_mux mul_b = 0;
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qpu_mux add_a = 0;
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qpu_mux add_b = 0;
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qpu_cond cond_mul = QPU_COND_ALWAYS;
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qpu_cond cond_add = QPU_COND_ALWAYS;
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qpu_cond cond_mul = QPU_COND_NEVER;
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qpu_cond cond_add = QPU_COND_NEVER;
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qpu_waddr waddr_add = QPU_W_NOP;
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qpu_waddr waddr_mul = QPU_W_NOP;
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qpu_waddr raddr_a = QPU_R_NOP;
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@ -1003,7 +1006,7 @@ void assemble_qpu_asm(char* str, uint64_t* instructions)
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//check op
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token = strtok(token, " \n\v\f\r\t=(");
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unsigned has_modifiers = strstr(token, ".") != 0;
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parse_op(&token, &type, &op_add, &op_mul, &is_sem_inc, &load_type);
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parse_op(&token, &type, &op_add, &op_mul, &is_sem_inc, &load_type, 1);
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//get modifiers
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if(has_modifiers)
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@ -1044,7 +1047,7 @@ void assemble_qpu_asm(char* str, uint64_t* instructions)
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//check op
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token = strtok(token, " \n\v\f\r\t=(");
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has_modifiers = strstr(token, ".") != 0;
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parse_op(&token, &type, &op_add, &op_mul, &is_sem_inc, &load_type);
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parse_op(&token, &type, &op_add, &op_mul, &is_sem_inc, &load_type, 0);
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//get modifiers
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if(has_modifiers)
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@ -1439,4 +1442,4 @@ void disassemble_qpu_asm(uint64_t instruction)
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}
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printf("\n");
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}
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}
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@ -2,5 +2,13 @@
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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void disassemble_qpu_asm(uint64_t instruction);
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void assemble_qpu_asm(char* str, uint64_t* instructions);
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#ifdef __cplusplus
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}
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#endif
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@ -3,7 +3,7 @@ file(GLOB testSrc
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"*.cpp"
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)
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add_executable(triangle ${testSrc})
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target_compile_options(triangle PRIVATE -Wall -std=c++11)
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add_executable(triangle "../../QPUassembler/qpu_assembler.c" ${testSrc} )
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target_compile_options(triangle PRIVATE -Wall -std=c++11 -std=c11)
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target_link_libraries(triangle vulkan-1-rpi)
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@ -8,6 +8,8 @@
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#include "driver/vkExt.h"
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#include "QPUassembler/qpu_assembler.h"
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//#define GLFW_INCLUDE_VULKAN
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//#define VK_USE_PLATFORM_WIN32_KHR
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//#include <GLFW/glfw3.h>
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@ -846,17 +848,47 @@ VkShaderModule VulkanCreateShaderModule(VkDevice& device, char* byteStream, uint
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void CreateShaders()
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{
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//char* vptr = (char*)malloc(strlen(vertShader) + 1);
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//memcpy(vptr, vertShader, strlen(vertShader) + 1);
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char asm_code[] =
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"sig_none ; nop = nop(r0, r0) ; nop = nop(r0, r0) ;"
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"sig_none ; nop = nop(r0, r0) ; nop = nop(r0, r0) ;"
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"sig_load_imm ; r0 = load32.always(0xffffffff) ; nop = load32() ;"
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"sig_none ; tlb_color_all = or.always(r0, r0) ; nop = nop(r0, r0) ;"
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"sig_end ; nop = nop(r0, r0) ; nop = nop(r0, r0) ;"
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"sig_none ; nop = nop(r0, r0) ; nop = nop(r0, r0) ;"
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"sig_unlock_score ; nop = nop(r0, r0) ; nop = nop(r0, r0) ;"
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"\0";
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//char* fptr = (char*)malloc(strlen(fragShader) + 1);
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//memcpy(fptr, fragShader, strlen(fragShader) + 1);
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unsigned num_instructions = 0;
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char* ptr = asm_code;
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while(ptr && *ptr != '\0')
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{
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ptr = strstr(ptr, ";");
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if(!ptr) break;
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ptr = strstr(ptr+(ptr!=0), ";");
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if(!ptr) break;
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ptr = strstr(ptr+(ptr!=0), ";");
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if(ptr)
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{
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ptr += 1;
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num_instructions += 1;
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}
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}
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uint64_t instruction_size = sizeof(uint64_t)*num_instructions;
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uint64_t* instructions = (uint64_t*)malloc(instruction_size);
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assemble_qpu_asm(asm_code, instructions);
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for(uint64_t c = 0; c < num_instructions; ++c)
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{
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disassemble_qpu_asm(instructions[c]);
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}
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char* vptr = (char*)malloc(sizeof(vertBytes));
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memcpy(vptr, vertBytes, sizeof(vertBytes));
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char* fptr = (char*)malloc(sizeof(fragBytes));
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memcpy(fptr, fragBytes, sizeof(fragBytes));
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//char* fptr = (char*)malloc(sizeof(fragBytes));
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//memcpy(fptr, fragBytes, sizeof(fragBytes));
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char* cptr = (char*)malloc(sizeof(coordinateBytes));
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memcpy(cptr, coordinateBytes, sizeof(coordinateBytes));
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@ -868,7 +900,8 @@ void CreateShaders()
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char* fragStreams[] =
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{
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0, 0, fptr, 0
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//0, 0, fptr, 0
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0, 0, (char*)instructions, 0
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};
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uint32_t vertNumbytes[] =
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@ -878,7 +911,8 @@ void CreateShaders()
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uint32_t fragNumbytes[] =
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{
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0, 0, sizeof(fragBytes), 0
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//0, 0, sizeof(fragBytes), 0
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0, 0, instruction_size, 0
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};
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VkRpiShaderModuleAssemblyCreateInfoKHR vertexShaderModuleCreateInfo;
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@ -896,7 +930,7 @@ void CreateShaders()
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assert(fsModule);
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free(vptr);
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free(fptr);
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//free(fptr);
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free(cptr);
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}
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