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[sam] intermediate step
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dc95506b06
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@ -16,18 +16,18 @@
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#include "Arduino.h"
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const uint8_t _initEndpoints[] =
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const uint32_t _initEndpoints[] =
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{
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0,
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EP_TYPE_CONTROL,
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#ifdef CDC_ENABLED
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EP_TYPE_BULK_IN, // CDC_ENDPOINT_IN
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EP_TYPE_BULK_OUT, // CDC_ENDPOINT_OUT
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EP_TYPE_INTERRUPT_IN, // CDC_ENDPOINT_ACM
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EP_TYPE_BULK_IN, // CDC_ENDPOINT_IN
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EP_TYPE_BULK_OUT, // CDC_ENDPOINT_OUT
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EP_TYPE_INTERRUPT_IN, // CDC_ENDPOINT_ACM
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#endif
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#ifdef HID_ENABLED
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EP_TYPE_INTERRUPT_IN // HID_ENDPOINT_INT
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EP_TYPE_INTERRUPT_IN_HID // HID_ENDPOINT_INT
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#endif
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};
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@ -161,6 +161,9 @@ $(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c
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# "$(CC)" -v -c $(CFLAGS) $< -o $@
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@"$(CC)" -c $(CFLAGS) $< -o $@
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#$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.d: %.o
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# "$(CC)" -M -MF $@.d -c $(CPPFLAGS) $<
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$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp
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"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@
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# @"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@
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@ -24,23 +24,23 @@
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// Control Endpoint
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#define EP_TYPE_CONTROL (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_CTRL | UOTGHS_DEVEPTCFG_EPBK_1_BANK)
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#define EP_TYPE_CONTROL (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_CTRL | UOTGHS_DEVEPTCFG_EPBK_1_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
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// CDC Endpoints
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#ifdef CDC_ENABLED
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#define EP_TYPE_BULK_IN (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_BLK | UOTGHS_DEVEPTCFG_EPBK_2_BANK)
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#define EP_TYPE_BULK_OUT (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_BLK | UOTGHS_DEVEPTCFG_EPBK_2_BANK)
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#define EP_TYPE_INTERRUPT_IN (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_2_BANK)
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#endif
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//#ifdef CDC_ENABLED
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#define EP_TYPE_BULK_IN (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_BLK | UOTGHS_DEVEPTCFG_EPBK_2_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
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#define EP_TYPE_BULK_OUT (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_BLK | UOTGHS_DEVEPTCFG_EPBK_2_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
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#define EP_TYPE_INTERRUPT_IN (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_2_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
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//#endif
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// HID Endpoints
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#ifdef HID_ENABLED
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#define EP_TYPE_INTERRUPT_IN_HID (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_2_BANK)
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#endif
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//#ifdef HID_ENABLED
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#define EP_TYPE_INTERRUPT_IN_HID (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_2_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
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//#endif
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// Various definitions
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#define EP_TYPE_INTERRUPT_OUT (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_1_BANK)
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#define EP_TYPE_ISOCHRONOUS_IN (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_ISO | UOTGHS_DEVEPTCFG_EPBK_3_BANK)
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#define EP_TYPE_ISOCHRONOUS_OUT (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_ISO | UOTGHS_DEVEPTCFG_EPBK_3_BANK)
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#define EP_TYPE_INTERRUPT_OUT (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_1_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
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#define EP_TYPE_ISOCHRONOUS_IN (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_ISO | UOTGHS_DEVEPTCFG_EPBK_3_BANK | UOTGHS_DEVEPTCFG_NBTRANS_3_TRANS)
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#define EP_TYPE_ISOCHRONOUS_OUT (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_ISO | UOTGHS_DEVEPTCFG_EPBK_3_BANK | UOTGHS_DEVEPTCFG_NBTRANS_3_TRANS)
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#endif /* UOTGHS_H_INCLUDED */
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@ -20,21 +20,23 @@
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#if SAM3XA_SERIES
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void USBD_InitEndpoints( uint8_t* puc_EndPoints, uint32_t ul_EndPoints )
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void USBD_InitEndpoints( uint32_t* puc_EndPoints, uint32_t ul_EndPoints )
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{
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for (uint8_t i = 1; i < sizeof(_initEndpoints); i++)
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uint32_t ul_EP ;
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for (ul_EP = 1; ul_EP < sizeof(_initEndpoints); ul_EP++)
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{
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// Reset Endpoint Fifos
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UOTGHS->UOTGHS_DEVEPTISR[i].UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_TOGGLESQ | UDPHS_EPTCLRSTA_FRCESTALL;
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UOTGHS->UDPHS_EPTRST = 1<<i;
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UOTGHS->UOTGHS_DEVEPTISR[ul_EP].UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_TOGGLESQ | UDPHS_EPTCLRSTA_FRCESTALL;
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UOTGHS->UOTGHS_DEVEPT = 1<<ul_EP;
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//UECONX = 1;
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//UECFG0X = pgm_read_byte(_initEndpoints+i);
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UOTGHS->UDPHS_EPT[i].UDPHS_EPTCFG = _initEndpoints[i];
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//UECFG0X = pgm_read_byte(_initEndpoints+ul_EP);
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UOTGHS->UDPHS_EPT[ul_EP].UDPHS_EPTCFG = _initEndpoints[ul_EP];
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while( (signed int)UDPHS_EPTCFG_EPT_MAPD != (signed int)((UOTGHS->UDPHS_EPT[i].UDPHS_EPTCFG) & (unsigned int)UDPHS_EPTCFG_EPT_MAPD) )
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while( (signed int)UDPHS_EPTCFG_EPT_MAPD != (signed int)((UOTGHS->UDPHS_EPT[ul_EP].UDPHS_EPTCFG) & (unsigned int)UDPHS_EPTCFG_EPT_MAPD) )
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;
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UOTGHS->UDPHS_EPT[i].UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_EPT_ENABL;
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UOTGHS->UDPHS_EPT[ul_EP].UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_EPT_ENABL;
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// UECFG1X = EP_DOUBLE_64;
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}
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