rooty/Arduino
1
0
Fork 0
mirror of https://github.com/arduino/Arduino.git synced 2025-03-01 23:29:28 +01:00
Code Issues Releases Activity

[sam] intermediate step

Browse Source
This commit is contained in:
Thibaut VIARD 2012-04-29 00:54:05 +02:00
parent dc95506b06
commit 41ef57b963
4 changed files with 31 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
hardware/arduino/sam/cores/sam/USB/USBCore.cpp
View File

@ -16,9 +16,9 @@
#include "Arduino.h" #include "Arduino.h"
const uint8_t _initEndpoints[] = const uint32_t _initEndpoints[] =
{ {
0, EP_TYPE_CONTROL,
#ifdef CDC_ENABLED #ifdef CDC_ENABLED
EP_TYPE_BULK_IN, // CDC_ENDPOINT_IN EP_TYPE_BULK_IN, // CDC_ENDPOINT_IN
@ -27,7 +27,7 @@ const uint8_t _initEndpoints[] =
#endif #endif
#ifdef HID_ENABLED #ifdef HID_ENABLED
EP_TYPE_INTERRUPT_IN // HID_ENDPOINT_INT EP_TYPE_INTERRUPT_IN_HID // HID_ENDPOINT_INT
#endif #endif
}; };

3
hardware/arduino/sam/cores/sam/build_gcc/libarduino_arduino_due_x.mk
View File

@ -161,6 +161,9 @@ $(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c
# "$(CC)" -v -c $(CFLAGS) $< -o $@ # "$(CC)" -v -c $(CFLAGS) $< -o $@
@"$(CC)" -c $(CFLAGS) $< -o $@ @"$(CC)" -c $(CFLAGS) $< -o $@
#$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.d: %.o
# "$(CC)" -M -MF $@.d -c $(CPPFLAGS) $<
$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp $(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp
"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@ "$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@
# @"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@ # @"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@

24
hardware/arduino/sam/system/libsam/include/uotghs.h
View File

@ -24,23 +24,23 @@
// Control Endpoint // Control Endpoint
#define EP_TYPE_CONTROL (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_CTRL | UOTGHS_DEVEPTCFG_EPBK_1_BANK) #define EP_TYPE_CONTROL (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_CTRL | UOTGHS_DEVEPTCFG_EPBK_1_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
// CDC Endpoints // CDC Endpoints
#ifdef CDC_ENABLED //#ifdef CDC_ENABLED
#define EP_TYPE_BULK_IN (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_BLK | UOTGHS_DEVEPTCFG_EPBK_2_BANK) #define EP_TYPE_BULK_IN (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_BLK | UOTGHS_DEVEPTCFG_EPBK_2_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
#define EP_TYPE_BULK_OUT (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_BLK | UOTGHS_DEVEPTCFG_EPBK_2_BANK) #define EP_TYPE_BULK_OUT (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_BLK | UOTGHS_DEVEPTCFG_EPBK_2_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
#define EP_TYPE_INTERRUPT_IN (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_2_BANK) #define EP_TYPE_INTERRUPT_IN (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_2_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
#endif //#endif
// HID Endpoints // HID Endpoints
#ifdef HID_ENABLED //#ifdef HID_ENABLED
#define EP_TYPE_INTERRUPT_IN_HID (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_2_BANK) #define EP_TYPE_INTERRUPT_IN_HID (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_2_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
#endif //#endif
// Various definitions // Various definitions
#define EP_TYPE_INTERRUPT_OUT (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_1_BANK) #define EP_TYPE_INTERRUPT_OUT (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | UOTGHS_DEVEPTCFG_EPBK_1_BANK | UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS)
#define EP_TYPE_ISOCHRONOUS_IN (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_ISO | UOTGHS_DEVEPTCFG_EPBK_3_BANK) #define EP_TYPE_ISOCHRONOUS_IN (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | UOTGHS_DEVEPTCFG_EPDIR_IN | UOTGHS_DEVEPTCFG_EPTYPE_ISO | UOTGHS_DEVEPTCFG_EPBK_3_BANK | UOTGHS_DEVEPTCFG_NBTRANS_3_TRANS)
#define EP_TYPE_ISOCHRONOUS_OUT (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_ISO | UOTGHS_DEVEPTCFG_EPBK_3_BANK) #define EP_TYPE_ISOCHRONOUS_OUT (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | UOTGHS_DEVEPTCFG_EPTYPE_ISO | UOTGHS_DEVEPTCFG_EPBK_3_BANK | UOTGHS_DEVEPTCFG_NBTRANS_3_TRANS)
#endif /* UOTGHS_H_INCLUDED */ #endif /* UOTGHS_H_INCLUDED */

18
hardware/arduino/sam/system/libsam/source/uotghs.c
View File

@ -20,21 +20,23 @@
#if SAM3XA_SERIES #if SAM3XA_SERIES
void USBD_InitEndpoints( uint8_t* puc_EndPoints, uint32_t ul_EndPoints ) void USBD_InitEndpoints( uint32_t* puc_EndPoints, uint32_t ul_EndPoints )
{ {
for (uint8_t i = 1; i < sizeof(_initEndpoints); i++) uint32_t ul_EP ;
for (ul_EP = 1; ul_EP < sizeof(_initEndpoints); ul_EP++)
{ {
// Reset Endpoint Fifos // Reset Endpoint Fifos
UOTGHS->UOTGHS_DEVEPTISR[i].UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_TOGGLESQ | UDPHS_EPTCLRSTA_FRCESTALL; UOTGHS->UOTGHS_DEVEPTISR[ul_EP].UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_TOGGLESQ | UDPHS_EPTCLRSTA_FRCESTALL;
UOTGHS->UDPHS_EPTRST = 1<<i; UOTGHS->UOTGHS_DEVEPT = 1<<ul_EP;
//UECONX = 1; //UECONX = 1;
//UECFG0X = pgm_read_byte(_initEndpoints+i); //UECFG0X = pgm_read_byte(_initEndpoints+ul_EP);
UOTGHS->UDPHS_EPT[i].UDPHS_EPTCFG = _initEndpoints[i]; UOTGHS->UDPHS_EPT[ul_EP].UDPHS_EPTCFG = _initEndpoints[ul_EP];
while( (signed int)UDPHS_EPTCFG_EPT_MAPD != (signed int)((UOTGHS->UDPHS_EPT[i].UDPHS_EPTCFG) & (unsigned int)UDPHS_EPTCFG_EPT_MAPD) ) while( (signed int)UDPHS_EPTCFG_EPT_MAPD != (signed int)((UOTGHS->UDPHS_EPT[ul_EP].UDPHS_EPTCFG) & (unsigned int)UDPHS_EPTCFG_EPT_MAPD) )
; ;
UOTGHS->UDPHS_EPT[i].UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_EPT_ENABL; UOTGHS->UDPHS_EPT[ul_EP].UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_EPT_ENABL;
// UECFG1X = EP_DOUBLE_64; // UECFG1X = EP_DOUBLE_64;
} }