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Ensure minimum spi pulse width.
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@ -114,6 +114,10 @@ class BitBangedSPI {
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}
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void begin() {
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// slow enough for an attiny85 @ 1MHz
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// (pulseWidth should be > 2 cpu cycles, so take 3 cycles:)
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pulseWidth = 3;
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pinMode(MISO, INPUT);
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pinMode(RESET, OUTPUT);
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pinMode(SCK, OUTPUT);
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@ -126,11 +130,16 @@ class BitBangedSPI {
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for (unsigned int i = 0; i < 8; ++i) {
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digitalWrite(MOSI, b & 0x80);
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digitalWrite(SCK, HIGH);
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delayMicroseconds(pulseWidth);
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b = (b << 1) | digitalRead(MISO);
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digitalWrite(SCK, LOW); // slow pulse
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delayMicroseconds(pulseWidth);
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}
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return b;
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}
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private:
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unsigned long pulseWidth; // in microseconds
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};
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static BitBangedSPI SPI;
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