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Code Issues Releases Activity

sam: updated UART/USART modes

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This commit is contained in:
Chris 2015-01-09 20:25:09 +00:00
parent 5e97168fbc
commit 7e9cf6d612
3 changed files with 46 additions and 12 deletions
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2
hardware/arduino/sam/cores/arduino/UARTClass.cpp
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@ -57,7 +57,7 @@ void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config)
_pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS;
// Configure mode
_pUart->UART_MR = config | US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL;
_pUart->UART_MR = (config & 0x00000E00) | UART_MR_CHMODE_NORMAL;
// Configure baudrate (asynchronous, no oversampling)
_pUart->UART_BRGR = (SystemCoreClock / dwBaudRate) >> 4;

17
hardware/arduino/sam/cores/arduino/UARTClass.h
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@ -26,22 +26,21 @@
#include <chip.h>
#define SERIAL_8N1 UARTClass::Mode_8N1
#define SERIAL_8N2 UARTClass::Mode_8N2
#define SERIAL_8E1 UARTClass::Mode_8E1
#define SERIAL_8E2 UARTClass::Mode_8E2
#define SERIAL_8O1 UARTClass::Mode_8O1
#define SERIAL_8O2 UARTClass::Mode_8O2
#define SERIAL_8M1 UARTClass::Mode_8M1
#define SERIAL_8S1 UARTClass::Mode_8S1
class UARTClass : public HardwareSerial
{
public:
enum UARTModes {
Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_NO,
Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_EVEN,
Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_ODD,
Mode_8M1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_MARK,
Mode_8S1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_SPACE,
};
UARTClass(Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer);

39
hardware/arduino/sam/cores/arduino/USARTClass.h
View File

@ -32,18 +32,36 @@
#define SERIAL_5N2 USARTClass::Mode_5N2
#define SERIAL_6N2 USARTClass::Mode_6N2
#define SERIAL_7N2 USARTClass::Mode_7N2
#define SERIAL_8N2 USARTClass::Mode_8N2
#define SERIAL_5E1 USARTClass::Mode_5E1
#define SERIAL_6E1 USARTClass::Mode_6E1
#define SERIAL_7E1 USARTClass::Mode_7E1
#define SERIAL_5E2 USARTClass::Mode_5E2
#define SERIAL_6E2 USARTClass::Mode_6E2
#define SERIAL_7E2 USARTClass::Mode_7E2
#define SERIAL_8E2 USARTClass::Mode_8E2
#define SERIAL_5O1 USARTClass::Mode_5O1
#define SERIAL_6O1 USARTClass::Mode_6O1
#define SERIAL_7O1 USARTClass::Mode_7O1
#define SERIAL_5O2 USARTClass::Mode_5O2
#define SERIAL_6O2 USARTClass::Mode_6O2
#define SERIAL_7O2 USARTClass::Mode_7O2
#define SERIAL_8O2 USARTClass::Mode_8O2
#define SERIAL_5M1 USARTClass::Mode_5M1
#define SERIAL_6M1 USARTClass::Mode_6M1
#define SERIAL_7M1 USARTClass::Mode_7M1
#define SERIAL_5M2 USARTClass::Mode_5M2
#define SERIAL_6M2 USARTClass::Mode_6M2
#define SERIAL_7M2 USARTClass::Mode_7M2
#define SERIAL_8M2 USARTClass::Mode_8M2
#define SERIAL_5S1 USARTClass::Mode_5S1
#define SERIAL_6S1 USARTClass::Mode_6S1
#define SERIAL_7S1 USARTClass::Mode_7S1
#define SERIAL_5S2 USARTClass::Mode_5S2
#define SERIAL_6S2 USARTClass::Mode_6S2
#define SERIAL_7S2 USARTClass::Mode_7S2
#define SERIAL_8S2 USARTClass::Mode_8S2
class USARTClass : public UARTClass
{
@ -59,19 +77,36 @@ class USARTClass : public UARTClass
Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
};
Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
};
USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer );