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783 lines
20 KiB
C
783 lines
20 KiB
C
/*! \file *********************************************************************
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*
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* \brief API for SAM3 Analog-to-Digital Converter (ADC/ADC12B) controller.
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*
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* ----------------------------------------------------------------------------
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* SAM Software Package License
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* ----------------------------------------------------------------------------
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* Copyright (c) 2011, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* - Compiler: IAR EWARM and CodeSourcery GCC for ARM
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* - Supported devices: All SAM devices with a Analog-to-Digital Converter can be used.
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support and FAQ: http://support.atmel.com/
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*
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*******************************************************************************/
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#include "../chip.h"
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/// @cond 0
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/**INDENT-OFF**/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**INDENT-ON**/
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/// @endcond
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#if SAM3S || SAM3N || SAM3XA
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/**
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* \brief Initializes the given ADC with the specified ADC clock and startup time.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param dw_mck Main clock of the device (value in Hz).
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* \param dw_adc_clock Analog-to-Digital conversion clock (value in Hz).
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* \param uc_startup ADC start up time. Please refer to the product datasheet for details.
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*
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* \retval 0 The initialization operation succeeds.
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* \retval others The initialization operation fails.
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*/
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uint32_t adc_init(Adc *p_adc, uint32_t ul_mck, uint32_t ul_adc_clock, uint8_t uc_startup)
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{
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uint32_t ul_prescal;
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/* Reset the controller */
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p_adc->ADC_CR = ADC_CR_SWRST;
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/* Reset Mode Register */
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p_adc->ADC_MR = 0;
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/* Reset PDC transfer */
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p_adc->ADC_PTCR = (ADC_PTCR_RXTDIS | ADC_PTCR_TXTDIS);
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p_adc->ADC_RCR = 0;
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p_adc->ADC_RNCR = 0;
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p_adc->ADC_TCR = 0;
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p_adc->ADC_TNCR = 0;
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ul_prescal = ul_mck/(2 * ul_adc_clock) - 1;
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p_adc->ADC_MR |= ADC_MR_PRESCAL( ul_prescal ) | ( (uc_startup<<ADC_MR_STARTUP_Pos) & ADC_MR_STARTUP_Msk);
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return 0;
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}
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/**
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* \brief Configures conversion resolution.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param resolution ADC resolution.
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*
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*/
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void adc_set_resolution(Adc *p_adc, adc_resolution_t resolution)
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{
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p_adc->ADC_MR |= (resolution<<4) & ADC_MR_LOWRES;
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}
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/**
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* \brief Configures conversion trigger and free run mode.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param trigger Conversion trigger.
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* \param uc_freerun ADC_MR_FREERUN_ON enables freerun mode
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* ADC_MR_FREERUN_OFF disables freerun mode
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*
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*/
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void adc_configure_trigger(Adc *p_adc, adc_trigger_t trigger, uint8_t uc_freerun)
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{
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p_adc->ADC_MR |= trigger | ((uc_freerun<<7) & ADC_MR_FREERUN);
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}
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/**
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* \brief Configures ADC power saving mode.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference voltage circuitry ON between conversions
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* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry OFF between conversions
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* \param uc_fwup ADC_MR_FWUP_OFF configures sleep mode as uc_sleep setting
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* ADC_MR_FWUP_ON keeps voltage reference ON and ADC Core OFF between conversions
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*
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*/
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void adc_configure_power_save(Adc *p_adc, uint8_t uc_sleep, uint8_t uc_fwup)
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{
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p_adc->ADC_MR |= ( ((uc_sleep<<5) & ADC_MR_SLEEP) | ((uc_fwup<<6) & ADC_MR_FWUP) );
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}
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/**
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* \brief Configures conversion sequence.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param ch_list Channel sequence list.
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* \param number Number of channels in the list.
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*
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*/
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void adc_configure_sequence(Adc *p_adc, adc_channel_num_t ch_list[], uint8_t uc_num)
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{
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uint8_t uc_counter;
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if(uc_num < 8)
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{
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for(uc_counter=0;uc_counter < uc_num;uc_counter++)
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{
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p_adc->ADC_SEQR1 |= ch_list[uc_counter] << (4*uc_counter);
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}
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}
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else
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{
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for(uc_counter=0;uc_counter < 8;uc_counter++)
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{
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p_adc->ADC_SEQR1 |= ch_list[uc_counter] << (4*uc_counter);
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}
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for(uc_counter=0;uc_counter < uc_num-8;uc_counter++)
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{
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p_adc->ADC_SEQR2 |= ch_list[uc_counter] << (4*uc_counter);
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}
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}
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}
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#if SAM3S || SAM3XA
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/**
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* \brief Configures ADC timing.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param uc_tracking ADC tracking time = uc_tracking / ADC clock.
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* \param uc_settling Analog settling time = (uc_settling + 1) / ADC clock.
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* \param uc_transfer Data transfer time = (uc_transfer * 2 + 3) / ADC clock.
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*
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*/
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void adc_configure_timing(Adc *p_adc, uint8_t uc_tracking, adc_settling_time_t settling, uint8_t uc_transfer)
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{
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p_adc->ADC_MR |= ADC_MR_TRANSFER( uc_transfer )
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| settling
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| ADC_MR_TRACKTIM( uc_tracking ) ;
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}
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#elif SAM3N
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/**
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* \brief Configures ADC timing.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param uc_tracking ADC tracking time = uc_tracking / ADC clock.
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*
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*/
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void adc_configure_timing(Adc *p_adc, uint8_t uc_tracking)
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{
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p_adc->ADC_MR |= ADC_MR_TRACKTIM( uc_tracking ) ;
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}
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#endif
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#if SAM3S || SAM3XA
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/**
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* \brief enable analog change.
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*
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* note it allows different analog settings for each channel,
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*
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* \param pAdc Pointer to an Adc instance.
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*/
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void adc_enable_anch( Adc *pAdc )
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{
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pAdc->ADC_MR |= ADC_MR_ANACH;
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}
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#endif
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#if SAM3S || SAM3XA
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/**
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* \brief disable analog change.
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*
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* note DIFF0, GAIN0 and OFF0 are used for all channels.
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*
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* \param pAdc Pointer to an Adc instance.
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*/
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void adc_disable_anch( Adc *pAdc )
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{
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pAdc->ADC_MR &= ~ADC_MR_ANACH;
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}
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#endif
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/**
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* \brief Starts analog-to-digital conversion.
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*
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* \note If one of the hardware event is selected as ADC trigger, this function can NOT start analog to digital conversion.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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*/
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void adc_start(Adc *p_adc)
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{
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p_adc->ADC_CR = ADC_CR_START;
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}
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/**
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* \brief Stop analog-to-digital conversion.
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* \param p_adc Pointer to an ADC instance.
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*
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*/
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void adc_stop(Adc *p_adc)
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{
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p_adc->ADC_CR = ADC_CR_SWRST;
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}
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/**
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* \brief Enables the specified ADC channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param adc_ch ADC channel number.
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*
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*/
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void adc_enable_channel(Adc *p_adc, adc_channel_num_t adc_ch)
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{
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p_adc->ADC_CHER = 1 << adc_ch;
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}
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/**
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* \brief Disables the specified ADC channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param adc_ch ADC channel number.
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*
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*/
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void adc_disable_channel(Adc *p_adc, adc_channel_num_t adc_ch)
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{
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p_adc->ADC_CHDR = 1 << adc_ch;
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}
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/**
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* \brief Reads the ADC channel status.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param adc_ch ADC channel number.
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*
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* \retval 1 means the specified channel is enabled.
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* 0 means the specified channel is disabled.
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*/
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uint32_t adc_get_status(Adc *p_adc, adc_channel_num_t adc_ch)
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{
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return p_adc->ADC_CHSR & (1 << adc_ch);
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}
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/**
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* \brief Reads the ADC result data of the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param adc_ch ADC channel number.
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*
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* \retval ADC data of the specified channel.
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*/
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uint32_t adc_get_value(Adc *p_adc, adc_channel_num_t adc_ch)
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{
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uint32_t dwData = 0;
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if ( 15 >= adc_ch )
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{
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dwData=*(p_adc->ADC_CDR+adc_ch) ;
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}
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return dwData ;
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}
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/**
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* \brief Reads the last ADC result data.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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* \retval ADC data.
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*/
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uint32_t adc_get_latest_value(Adc *p_adc)
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{
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return p_adc->ADC_LCDR;
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}
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/**
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* \brief Enables TAG option so that the number of the last converted channel can be indicated.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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*/
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void adc_enable_tag(Adc *p_adc)
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{
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p_adc->ADC_EMR |= ADC_EMR_TAG;
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}
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/**
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* \brief Disables TAG option.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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*/
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void adc_disable_tag(Adc *p_adc)
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{
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p_adc->ADC_EMR &= ~ADC_EMR_TAG;
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}
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/**
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* \brief Indicates the last converted channel.
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*
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* \note If TAG option is NOT enabled before, an incorrect channel number is returned.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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* \retval The last converted channel number.
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*/
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adc_channel_num_t adc_get_tag(Adc *p_adc)
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{
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return (p_adc->ADC_LCDR & ADC_LCDR_CHNB_Msk) >> ADC_LCDR_CHNB_Pos;
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}
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/**
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* \brief Enables conversion sequencer.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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*/
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void adc_start_sequencer(Adc *p_adc)
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{
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p_adc->ADC_MR |= ADC_MR_USEQ;
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}
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/**
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* \brief Disables conversion sequencer.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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*/
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void adc_stop_sequencer(Adc *p_adc)
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{
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p_adc->ADC_MR &= ~ADC_MR_USEQ;
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}
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/**
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* \brief Configures comparsion mode.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param mode ADC comparsion mode.
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*
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*/
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void adc_set_comparison_mode(Adc *p_adc, uint8_t uc_mode)
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{
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p_adc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPMODE_Msk);
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p_adc->ADC_EMR |= (uc_mode & ADC_EMR_CMPMODE_Msk);
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}
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/**
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* \brief get comparsion mode.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param mode ADC comparsion mode.
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*
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* \retval compare mode value.
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*/
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uint32_t adc_get_comparison_mode(Adc *p_adc)
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{
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return p_adc->ADC_EMR & ADC_EMR_CMPMODE_Msk;
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}
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/**
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* \brief Configures ADC compare window.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param w_low_threshold Low threshold of compare window.
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* \param w_high_threshold High threshold of compare window.
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*
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*/
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void adc_set_comparsion_window(Adc *p_adc, uint16_t us_low_threshold, uint16_t us_high_threshold)
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{
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p_adc->ADC_CWR = ADC_CWR_LOWTHRES(us_low_threshold) | ADC_CWR_HIGHTHRES(us_high_threshold);
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}
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/**
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* \brief Configures comparison selected channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param channel Comparison selected channel.
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*
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*/
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void adc_set_comparison_channel(Adc *p_adc, adc_channel_num_t channel)
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{
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if ( channel < 16 )
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{
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p_adc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPALL);
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p_adc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPSEL_Msk);
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p_adc->ADC_EMR |= (channel << ADC_EMR_CMPSEL_Pos);
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}
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else
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{
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p_adc->ADC_EMR |= ADC_EMR_CMPALL;
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}
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}
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#if SAM3S || SAM3XA
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/**
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* \brief Enables differential input for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param channel Channel number.
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*
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*/
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void adc_enable_differential_input(Adc *p_adc, adc_channel_num_t channel)
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{
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p_adc->ADC_COR |= 0x01u << (16+ channel);
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}
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/**
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* \brief Disables differential input for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param channel Channel number.
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*
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*/
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void adc_disable_differential_input(Adc *p_adc, adc_channel_num_t channel)
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{
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uint32_t ul_temp;
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ul_temp = p_adc->ADC_COR;
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p_adc->ADC_COR &= 0xfffeffffu << channel;
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p_adc->ADC_COR |= ul_temp;
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}
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/**
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* \brief Enables analog signal offset for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param channel Channel number.
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*
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*/
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void adc_enable_input_offset(Adc *p_adc, adc_channel_num_t channel)
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{
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p_adc->ADC_COR |= 0x01u << channel;
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}
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/**
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* \brief Disables analog signal offset for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param channel Channel number.
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*
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*/
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void adc_disable_input_offset(Adc *p_adc, adc_channel_num_t channel)
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{
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uint32_t ul_temp;
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ul_temp = p_adc->ADC_COR;
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p_adc->ADC_COR &= (0xfffffffeu << channel);
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p_adc->ADC_COR |= ul_temp;
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}
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/**
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* \brief Configures input gain for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param channel Channel number.
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* \param gain Gain value for the input.
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*
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*/
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void adc_set_input_gain(Adc *p_adc, adc_channel_num_t channel, adc_gainvalue_t gain)
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{
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p_adc->ADC_CGR |= (0x03u << (2*channel)) & (gain << (2*channel));
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}
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#endif /* SAM3S || SAM3XA */
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#if SAM3S8 || SAM3SD8
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/**
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* \brief set adc auto calibration mode.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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*/
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void adc_set_calibmode(Adc *p_adc)
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{
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p_adc->ADC_CR |= ADC_CR_AUTOCAL;
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}
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#endif /* SAM3S8 || SAM3SD8 */
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/**
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* \brief Returns the actual ADC clock.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param ul_mck Main clock of the device (value in Hz).
|
|
*
|
|
* \retval 0 The actual ADC clock (value in Hz).
|
|
*/
|
|
uint32_t adc_get_actual_adc_clock(Adc *p_adc, uint32_t ul_mck)
|
|
{
|
|
uint32_t ul_adcfreq;
|
|
uint32_t ul_prescal;
|
|
|
|
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
|
|
ul_prescal = (( p_adc->ADC_MR & ADC_MR_PRESCAL_Msk) >> ADC_MR_PRESCAL_Pos);
|
|
ul_adcfreq = ul_mck / ((ul_prescal+1)*2);
|
|
return ul_adcfreq;
|
|
}
|
|
|
|
/**
|
|
* \brief Enables ADC interrupt(s).
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
* \param dw_source Interrupt(s) to be enabled.
|
|
*
|
|
*/
|
|
void adc_enable_interrupt(Adc *p_adc, uint32_t ul_source)
|
|
{
|
|
p_adc->ADC_IER = ul_source;
|
|
}
|
|
|
|
/**
|
|
* \brief Disables ADC interrupt(s).
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
* \param dw_source Interrupt(s) to be disabled.
|
|
*
|
|
*/
|
|
void adc_disable_interrupt(Adc *p_adc, uint32_t ul_source)
|
|
{
|
|
p_adc->ADC_IDR = ul_source;
|
|
}
|
|
|
|
/**
|
|
* \brief Reads ADC interrupt status.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
*
|
|
* \retval ADC interrupt status.
|
|
*/
|
|
uint32_t adc_get_interrupt_status(Adc *p_adc)
|
|
{
|
|
return p_adc->ADC_ISR ;
|
|
}
|
|
|
|
/** \brief Read ADC interrupt mask.
|
|
*
|
|
* \param p_uart pointer to a UART instance.
|
|
*
|
|
* \return The interrupt mask value.
|
|
*/
|
|
uint32_t adc_get_interrupt_mask(Adc *p_adc)
|
|
{
|
|
return p_adc->ADC_IMR;
|
|
}
|
|
|
|
/**
|
|
* \brief Reads overrun status.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
*
|
|
* \retval ADC overrun status.
|
|
*/
|
|
uint32_t adc_check_ovr(Adc *p_adc,adc_channel_num_t adc_ch)
|
|
{
|
|
return p_adc->ADC_OVER & (0x01u << adc_ch);
|
|
}
|
|
|
|
#if SAM3S || SAM3XA
|
|
/**
|
|
* \brief Adapts performance versus power consumption.
|
|
*
|
|
* \note Please refer to ADC Characteristics in the product datasheet for the details.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
* \param ibctl ADC Bias current control.
|
|
*
|
|
*/
|
|
void adc_set_bias_current(Adc *p_adc, uint8_t uc_ibctl)
|
|
{
|
|
p_adc->ADC_ACR |= ADC_ACR_IBCTL(uc_ibctl);
|
|
}
|
|
#endif
|
|
|
|
#if SAM3S || SAM3XA
|
|
/**
|
|
* \brief turn on temperature sensor.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
*
|
|
*/
|
|
void adc_enable_ts(Adc *p_adc)
|
|
{
|
|
p_adc->ADC_ACR |= ADC_ACR_TSON;
|
|
}
|
|
#endif
|
|
|
|
#if SAM3S || SAM3XA
|
|
/**
|
|
* \brief turn off temperature sensor.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
*
|
|
*/
|
|
void adc_disable_ts(Adc *p_adc)
|
|
{
|
|
p_adc->ADC_ACR &= ~ADC_ACR_TSON;
|
|
}
|
|
#endif
|
|
|
|
/**
|
|
* \brief Enables or disables write protection of ADC registers.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
* \param dw_eanble 1 to eanble, 0 to disable.
|
|
*/
|
|
void adc_set_writeprotect(Adc *p_adc, uint32_t ul_enable)
|
|
{
|
|
p_adc->ADC_WPMR |= ADC_WPMR_WPKEY(ul_enable);
|
|
}
|
|
|
|
/**
|
|
* \brief Indicates write protect status.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
*
|
|
* \return 0 if the peripheral is not protected, or 16-bit Write Protect Violation Status.
|
|
*/
|
|
uint32_t adc_get_writeprotect_status(Adc *p_adc)
|
|
{
|
|
return p_adc->ADC_WPSR & ADC_WPSR_WPVS;
|
|
}
|
|
|
|
/**
|
|
* \brief calcul_startup
|
|
*/
|
|
static uint32_t calcul_startup( uint32_t ul_startup )
|
|
{
|
|
uint32_t ul_startup_value=0;
|
|
|
|
if( ul_startup == 0 )
|
|
ul_startup_value = 0;
|
|
else if( ul_startup == 1 )
|
|
ul_startup_value = 8;
|
|
else if( ul_startup == 2 )
|
|
ul_startup_value = 16;
|
|
else if( ul_startup == 3 )
|
|
ul_startup_value = 24;
|
|
else if( ul_startup == 4 )
|
|
ul_startup_value = 64;
|
|
else if( ul_startup == 5 )
|
|
ul_startup_value = 80;
|
|
else if( ul_startup == 6 )
|
|
ul_startup_value = 96;
|
|
else if( ul_startup == 7 )
|
|
ul_startup_value = 112;
|
|
else if( ul_startup == 8 )
|
|
ul_startup_value = 512;
|
|
else if( ul_startup == 9 )
|
|
ul_startup_value = 576;
|
|
else if( ul_startup == 10 )
|
|
ul_startup_value = 640;
|
|
else if( ul_startup == 11 )
|
|
ul_startup_value = 704;
|
|
else if( ul_startup == 12 )
|
|
ul_startup_value = 768;
|
|
else if( ul_startup == 13 )
|
|
ul_startup_value = 832;
|
|
else if( ul_startup == 14 )
|
|
ul_startup_value = 896;
|
|
else if( ul_startup == 15 )
|
|
ul_startup_value = 960;
|
|
|
|
return ul_startup_value;
|
|
}
|
|
|
|
#if 0
|
|
/**
|
|
* \brief Checks ADC configurations.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
* \param dw_mck Main clock of the device (value in Hz).
|
|
*/
|
|
void adc_check(Adc* p_adc, uint32_t ul_mck)
|
|
{
|
|
uint32_t ul_adcfreq;
|
|
uint32_t ul_prescal;
|
|
uint32_t ul_startup;
|
|
|
|
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
|
|
ul_prescal = (( p_adc->ADC_MR & ADC_MR_PRESCAL_Msk) >> ADC_MR_PRESCAL_Pos);
|
|
ul_adcfreq = ul_mck / ((ul_prescal+1)*2);
|
|
printf("ADC clock frequency = %d Hz\r\n", (int)ul_adcfreq );
|
|
|
|
if( ul_adcfreq < ADC_FREQ_MIN )
|
|
{
|
|
printf("adc frequency too low (out of specification: %d Hz)\r\n", (int)ADC_FREQ_MIN);
|
|
}
|
|
if( ul_adcfreq > ADC_FREQ_MAX )
|
|
{
|
|
printf("adc frequency too high (out of specification: %d Hz)\r\n", (int)ADC_FREQ_MAX);
|
|
}
|
|
|
|
ul_startup = (( p_adc->ADC_MR & ADC_MR_STARTUP_Msk) >> ADC_MR_STARTUP_Pos);
|
|
if( !(p_adc->ADC_MR & ADC_MR_SLEEP_SLEEP) )
|
|
{
|
|
/* 40ms */
|
|
if( ADC_STARTUP_NORM * ul_adcfreq / 1000000 > calcul_startup(ul_startup) )
|
|
{
|
|
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * ul_adcfreq / 1000000), (int)calcul_startup(ul_startup));
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if(p_adc->ADC_MR & ADC_MR_FREERUN_ON)
|
|
{
|
|
printf("FreeRun forbidden in sleep mode\n\r");
|
|
}
|
|
if( !(p_adc->ADC_MR & ADC_MR_FWUP_ON) )
|
|
{
|
|
/* Sleep 40ms */
|
|
if( ADC_STARTUP_NORM * ul_adcfreq / 1000000 > calcul_startup(ul_startup) )
|
|
{
|
|
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * ul_adcfreq / 1000000), (int)(calcul_startup(ul_startup)));
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if( p_adc->ADC_MR & ADC_MR_FWUP_ON )
|
|
{
|
|
/* Fast Wake Up Sleep Mode: 12ms */
|
|
if( ADC_STARTUP_FAST * ul_adcfreq / 1000000 > calcul_startup(ul_startup) )
|
|
{
|
|
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * ul_adcfreq / 1000000), (int)(calcul_startup(ul_startup)));
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#endif /* 0 */
|
|
|
|
/**
|
|
* \brief Gets PDC registers base address.
|
|
*
|
|
* \param p_adc Pointer to an ADC instance.
|
|
*
|
|
* \retval PDC registers base for PDC driver to access.
|
|
*/
|
|
Pdc *adc_get_pdc_base(Adc *p_adc)
|
|
{
|
|
return PDC_ADC;
|
|
}
|
|
|
|
/// @cond 0
|
|
/**INDENT-OFF**/
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif // SAM3S || SAM3N || SAM3XA
|
|
/**INDENT-ON**/
|
|
/// @endcond
|
|
|
|
#endif /* SAM3S || SAM3N || SAM3XA */
|
|
|