2011-01-28 10:25:30 +01:00
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/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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2011-11-04 20:40:34 +01:00
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* @addtogroup PIOS_DSM Spektrum/JR DSMx satellite receiver functions
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2011-10-21 22:35:17 +02:00
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* @brief PIOS interface to bind and read Spektrum/JR DSMx satellite receiver
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2011-01-28 10:25:30 +01:00
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* @{
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*
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2011-11-04 20:40:34 +01:00
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* @file pios_dsm_priv.h
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2011-10-21 22:35:17 +02:00
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2011.
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* @brief Spektrum/JR DSMx satellite receiver private structures.
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2011-01-28 10:25:30 +01:00
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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2011-11-04 20:40:34 +01:00
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#ifndef PIOS_DSM_PRIV_H
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#define PIOS_DSM_PRIV_H
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2011-01-28 10:25:30 +01:00
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#include <pios.h>
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#include <pios_stm32.h>
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#include <pios_usart_priv.h>
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2011-10-21 22:35:17 +02:00
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/*
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* Currently known DSMx (DSM2, DSMJ, DSMX) satellite serial port settings:
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* 115200bps serial stream, 8 bits, no parity, 1 stop bit
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* size of each frame: 16 bytes
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* data resolution: 10 or 11 bits
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* number of frames: 1 or 2
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* frame period: 11ms or 22ms
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*
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* Currently known DSMx frame structure:
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* 2 bytes - depend on protocol version:
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* for DSM2/DSMJ:
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* 1 byte - lost frame counter (8 bit)
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* 1 byte - data format (for master receiver bound with 3 or 5 pulses),
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* or unknown (for slave receiver bound with 4 or 6 pulses,
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* some sources call it also the lost frame counter)
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* for DSMX:
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* 1 byte - unknown data (does not look like lost frame counter)
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* 1 byte - unknown data, has been seen only 0xB2 so far
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* 14 bytes - up to 7 channels (16 bit word per channel) with encoded channel
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* number, channel value, the "2nd frame in a sequence" flag.
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* Unused channels have FF FF instead of data bytes.
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*
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* Data format identification:
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* - for DSM2/DSMJ: [0 0 0 R 0 0 N1 N0]
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* where
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* R is data resolution (0 - 10 bits, 1 - 11 bits),
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* N1..N0 is the number of frames required to receive all channel
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* data (01 or 10 are known to the moment, which means 1 or 2 frames).
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* Three values for the transmitter information byte have been seen
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* thus far: 0x01, 0x02, 0x12.
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2011-10-30 18:29:03 +01:00
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* - for DSMX this byte contains just 0xB2 or 0xA2 value for any resolution.
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* It is not known at the moment how to find the exact resolution from the
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* DSMX data stream. The frame number (1 or 2) and 10/11 bit resolution were
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* found in different data streams. So it is safer at the moment to ask user
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* explicitly choose the resolution.
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* Also some weird throttle channel (0) behavior was found in some streams
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* from DX8 transmitter (all zeroes). Thus DSMX needs special processing.
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2011-10-21 22:35:17 +02:00
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*
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* Channel data are:
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* - for 10 bit: [F 0 C3 C2 C1 C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0]
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* - for 11 bit: [F C3 C2 C1 C0 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0]
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* where
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* F is normally 0 but set to 1 for the first channel of the 2nd frame,
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* C3 to C0 is the channel number, 4 bit, zero-based, in any order,
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* Dx..D0 - channel data (10 or 11 bits)
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*
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* DSM2 protocol bug: in some cases in 2-frame format some bytes of the
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* frame can contain invalid values from the previous frame. They usually
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* are the last 5 bytes and can be equal to FF or other data from last
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* frame. There is no explicit workaround currently known.
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*
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* Binding: the number of pulses within bind window after power up defines
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* if this receiver is a master (provides receiver capabilities info to
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* the transmitter to choose data format) or slave (does not respond to
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* the transmitter which falls back to the old DSM mode in that case).
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2011-11-19 16:33:04 +01:00
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* Currently known are 3(4) pulses for low resolution (10 bit) DSM2 mode,
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* 5(6) pulses for high resolution (11 bit) DSM2 mode, and also 7(8) and
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* 9(10) pulses for DSMX modes. Thus only 3, 5, 7 or 9 pulses should be
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* used for stand-alone satellite receiver to be bound correctly as the
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* master.
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2011-10-21 22:35:17 +02:00
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*/
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2011-11-04 20:40:34 +01:00
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#define DSM_CHANNELS_PER_FRAME 7
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#define DSM_FRAME_LENGTH (1+1+DSM_CHANNELS_PER_FRAME*2)
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#define DSM_DSM2_RES_MASK 0x0010
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#define DSM_2ND_FRAME_MASK 0x8000
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2011-10-21 22:35:17 +02:00
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/*
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2011-10-30 18:29:03 +01:00
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* Include lost frame counter and provide it as a last channel value
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* for debugging. Currently is not used by the receiver layer.
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2011-10-21 22:35:17 +02:00
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*/
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2011-11-04 20:40:34 +01:00
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//#define DSM_LOST_FRAME_COUNTER
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2011-10-30 18:29:03 +01:00
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2011-11-04 20:40:34 +01:00
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/* DSM protocol variations */
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2011-10-30 18:29:03 +01:00
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enum pios_dsm_proto {
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PIOS_DSM_PROTO_DSM2,
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PIOS_DSM_PROTO_DSMX10BIT,
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PIOS_DSM_PROTO_DSMX11BIT,
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};
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2011-11-04 20:40:34 +01:00
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/* DSM receiver instance configuration */
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struct pios_dsm_cfg {
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bootcfg: use UAVobj to control boot-time HW config
This should mark an end to the compile-time selection of HW
configurations.
Minor changes in board initialization for all platforms:
- Most config structs are marked static to prevent badly written
drivers from directly referring to config data.
- Adapt to changes in .irq fields in config data.
- Adapt to changes in USART IRQ handling.
Major changes in board initialization for CC:
- Use HwSettings UAVObj to decide which drivers to attach to
the "main" port and the flexi port, and select the appropriate
device configuration data.
- HwSettings allows choosing between Disabled, Telemetry, SBUS,
Spektrum,GPS, and I2C for each of the two ports.
- Use ManualControlSettings.InputMode to init/configure the
appropriate receiver module, and register its available rx channels
with the PIOS_RCVR layer. Can choose between PWM, Spektrum and PPM
at board init time. PPM driver is broken, and SBUS will work once
it is added to this UAVObj as an option.
- CC build now includes code for SBUS, Spektrum and PWM receivers in
every firmware image.
PIOS_USART driver:
- Now handles its own low-level IRQs internally
- If NULL upper-level IRQ handler is bound in at board init time
then rx/tx is satisfied by internal PIOS_USART buffered IO routines
which are (typically) attached to the COM layer.
- If an alternate upper-level IRQ handler is bound in at board init
then that handler is called and expected to clear down the USART
IRQ sources. This is used by Spektrum and SBUS drivers.
PIOS_SBUS and PIOS_SPEKTRUM drivers:
- Improved data/API hiding
- No longer assume they know where their config data is stored which
allows for boot-time alternate configurations for the driver.
- Now registers an upper-level IRQ handlerwith the USART layer to
decouple the driver from which USART it is actually attached to.
2011-07-06 02:21:00 +02:00
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struct stm32_gpio bind;
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2011-01-28 10:25:30 +01:00
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};
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2011-11-04 20:40:34 +01:00
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extern const struct pios_rcvr_driver pios_dsm_rcvr_driver;
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2011-06-25 15:27:28 +02:00
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2011-11-04 20:40:34 +01:00
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extern int32_t PIOS_DSM_Init(uint32_t *dsm_id,
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const struct pios_dsm_cfg *cfg,
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const struct pios_com_driver *driver,
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uint32_t lower_id,
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enum pios_dsm_proto proto,
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uint8_t bind);
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2011-06-25 15:27:28 +02:00
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2011-11-04 20:40:34 +01:00
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#endif /* PIOS_DSM_PRIV_H */
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2011-01-28 10:25:30 +01:00
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/**
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* @}
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* @}
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*/
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