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CC-6 PIOS/SPI: Add semaphore to SPI device structure that can be used to ensure
only one CS line is asserted. No checks are enforced on this by the SPI code as I cant see a clean way of it being aware of the CS lines. We could add another CS mode those which is driver managed per transfer and has a GPIO i line for each device. git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2579 ebee16cc-31ac-478f-84a7-5cbb03baadba
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@ -14,10 +14,8 @@
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*/
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void PIOS_ADXL345_ClaimBus()
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{
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// TODO: Semaphore to lock bus
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PIOS_ADXL_ENABLE;
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PIOS_DELAY_WaituS(1);
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PIOS_SPI_ClaimBus(PIOS_SPI_ACCEL);
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PIOS_ADXL_ENABLE;
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}
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/**
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@ -25,9 +23,8 @@ void PIOS_ADXL345_ClaimBus()
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*/
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void PIOS_ADXL345_ReleaseBus()
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{
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// TODO: Release semaphore
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PIOS_SPI_ReleaseBus(PIOS_SPI_ACCEL);
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PIOS_ADXL_DISABLE;
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PIOS_DELAY_WaituS(1);
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}
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/**
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@ -12,13 +12,13 @@
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void PIOS_FLASH_W25X_ClaimBus()
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{
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// TODO: Semaphore to lock bus
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PIOS_SPI_ClaimBus(PIOS_SPI_FLASH);
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PIOS_FLASH_ENABLE;
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}
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void PIOS_FLASH_W25X_ReleaseBus()
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{
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// TODO: Release semaphore
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PIOS_SPI_ReleaseBus(PIOS_SPI_FLASH);
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PIOS_FLASH_DISABLE;
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}
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@ -65,6 +65,11 @@ int32_t PIOS_SPI_Init(void)
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/* Get a handle for the device configuration */
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spi_dev = find_spi_dev_by_id(i);
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PIOS_DEBUG_Assert(spi_dev);
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#if defined(PIOS_INCLUDE_FREERTOS)
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vSemaphoreCreateBinary(spi_dev->busy);
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xSemaphoreGive(spi_dev->busy);
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#endif
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/* Disable callback function */
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spi_dev->callback = NULL;
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@ -200,6 +205,43 @@ int32_t PIOS_SPI_SetClockSpeed(uint8_t spi, SPIPrescalerTypeDef spi_prescaler)
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return 0;
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}
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/**
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* Claim the SPI bus semaphore. Calling the SPI functions does not require this
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* \param[in] spi SPI number (0 or 1)
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* \return 0 if no error
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* \return -1 if timeout before claiming semaphore
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*/
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int8_t PIOS_SPI_ClaimBus(uint8_t spi)
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{
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#if defined(PIOS_INCLUDE_FREERTOS)
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struct pios_spi_dev *spi_dev;
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/* Get a handle for the device configuration */
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spi_dev = find_spi_dev_by_id(spi);
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if (xSemaphoreTake(spi_dev->busy, 0xffff) != pdTRUE)
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return -1;
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#endif
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return 0;
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}
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/**
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* Release the SPI bus semaphore. Calling the SPI functions does not require this
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* \param[in] spi SPI number (0 or 1)
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* \return 0 if no error
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*/
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int8_t PIOS_SPI_ReleaseBus(uint8_t spi)
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{
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#if defined(PIOS_INCLUDE_FREERTOS)
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struct pios_spi_dev *spi_dev;
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/* Get a handle for the device configuration */
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spi_dev = find_spi_dev_by_id(spi);
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xSemaphoreGive(spi_dev->busy);
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#endif
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return 0;
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}
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/**
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* Controls the RC (Register Clock alias Chip Select) pin of a SPI port
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* \param[in] spi SPI number (0 or 1)
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@ -51,6 +51,8 @@ extern int32_t PIOS_SPI_TransferByte(uint8_t spi, uint8_t b);
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extern int32_t PIOS_SPI_TransferBlock(uint8_t spi, const uint8_t * send_buffer, uint8_t * receive_buffer, uint16_t len, void *callback);
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extern int32_t PIOS_SPI_Busy(uint8_t spi);
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extern void PIOS_SPI_IRQ_Handler(uint8_t spi);
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extern int8_t PIOS_SPI_ClaimBus(uint8_t spi);
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extern int8_t PIOS_SPI_ReleaseBus(uint8_t spi);
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#endif /* PIOS_SPI_H */
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@ -51,6 +51,9 @@ struct pios_spi_dev {
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void (*callback) (uint8_t, uint8_t);
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uint8_t tx_dummy_byte;
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uint8_t rx_dummy_byte;
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#if defined(PIOS_INCLUDE_FREERTOS)
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xSemaphoreHandle busy;
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#endif
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};
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extern struct pios_spi_dev pios_spi_devs[];
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