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Code Issues Releases Activity

CC-6 PIOS/SPI: Add semaphore to SPI device structure that can be used to ensure

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only one CS line is asserted.  No checks are enforced on this by the SPI code
as I cant see a clean way of it being aware of the CS lines.  We could add
another CS mode those which is driver managed per transfer and has a GPIO i
line for each device.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2579 ebee16cc-31ac-478f-84a7-5cbb03baadba
This commit is contained in:
peabody124 2011-01-24 07:52:17 +00:00 committed by peabody124
parent d2f3e0d379
commit 00a3e82c70
5 changed files with 52 additions and 8 deletions
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9
flight/PiOS/Common/pios_adxl345.c
View File

@ -14,10 +14,8 @@
*/
void PIOS_ADXL345_ClaimBus()
{
// TODO: Semaphore to lock bus
PIOS_ADXL_ENABLE;
PIOS_DELAY_WaituS(1);
PIOS_SPI_ClaimBus(PIOS_SPI_ACCEL);
PIOS_ADXL_ENABLE;
}
/**
@ -25,9 +23,8 @@ void PIOS_ADXL345_ClaimBus()
*/
void PIOS_ADXL345_ReleaseBus()
{
// TODO: Release semaphore
PIOS_SPI_ReleaseBus(PIOS_SPI_ACCEL);
PIOS_ADXL_DISABLE;
PIOS_DELAY_WaituS(1);
}
/**

4
flight/PiOS/Common/pios_flash_w25x.c
View File

@ -12,13 +12,13 @@
void PIOS_FLASH_W25X_ClaimBus()
{
// TODO: Semaphore to lock bus
PIOS_SPI_ClaimBus(PIOS_SPI_FLASH);
PIOS_FLASH_ENABLE;
}
void PIOS_FLASH_W25X_ReleaseBus()
{
// TODO: Release semaphore
PIOS_SPI_ReleaseBus(PIOS_SPI_FLASH);
PIOS_FLASH_DISABLE;
}

42
flight/PiOS/STM32F10x/pios_spi.c
View File

@ -65,6 +65,11 @@ int32_t PIOS_SPI_Init(void)
/* Get a handle for the device configuration */
spi_dev = find_spi_dev_by_id(i);
PIOS_DEBUG_Assert(spi_dev);
#if defined(PIOS_INCLUDE_FREERTOS)
vSemaphoreCreateBinary(spi_dev->busy);
xSemaphoreGive(spi_dev->busy);
#endif
/* Disable callback function */
spi_dev->callback = NULL;
@ -200,6 +205,43 @@ int32_t PIOS_SPI_SetClockSpeed(uint8_t spi, SPIPrescalerTypeDef spi_prescaler)
return 0;
}
/**
* Claim the SPI bus semaphore. Calling the SPI functions does not require this
* \param[in] spi SPI number (0 or 1)
* \return 0 if no error
* \return -1 if timeout before claiming semaphore
*/
int8_t PIOS_SPI_ClaimBus(uint8_t spi)
{
#if defined(PIOS_INCLUDE_FREERTOS)
struct pios_spi_dev *spi_dev;
/* Get a handle for the device configuration */
spi_dev = find_spi_dev_by_id(spi);
if (xSemaphoreTake(spi_dev->busy, 0xffff) != pdTRUE)
return -1;
#endif
return 0;
}
/**
* Release the SPI bus semaphore. Calling the SPI functions does not require this
* \param[in] spi SPI number (0 or 1)
* \return 0 if no error
*/
int8_t PIOS_SPI_ReleaseBus(uint8_t spi)
{
#if defined(PIOS_INCLUDE_FREERTOS)
struct pios_spi_dev *spi_dev;
/* Get a handle for the device configuration */
spi_dev = find_spi_dev_by_id(spi);
xSemaphoreGive(spi_dev->busy);
#endif
return 0;
}
/**
* Controls the RC (Register Clock alias Chip Select) pin of a SPI port
* \param[in] spi SPI number (0 or 1)

2
flight/PiOS/inc/pios_spi.h
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@ -51,6 +51,8 @@ extern int32_t PIOS_SPI_TransferByte(uint8_t spi, uint8_t b);
extern int32_t PIOS_SPI_TransferBlock(uint8_t spi, const uint8_t * send_buffer, uint8_t * receive_buffer, uint16_t len, void *callback);
extern int32_t PIOS_SPI_Busy(uint8_t spi);
extern void PIOS_SPI_IRQ_Handler(uint8_t spi);
extern int8_t PIOS_SPI_ClaimBus(uint8_t spi);
extern int8_t PIOS_SPI_ReleaseBus(uint8_t spi);
#endif /* PIOS_SPI_H */

3
flight/PiOS/inc/pios_spi_priv.h
View File

@ -51,6 +51,9 @@ struct pios_spi_dev {
void (*callback) (uint8_t, uint8_t);
uint8_t tx_dummy_byte;
uint8_t rx_dummy_byte;
#if defined(PIOS_INCLUDE_FREERTOS)
xSemaphoreHandle busy;
#endif
};
extern struct pios_spi_dev pios_spi_devs[];