mirror of
https://bitbucket.org/librepilot/librepilot.git
synced 2025-02-18 08:54:15 +01:00
Update drivers for CC to the new EXTI system and SPI calls
This commit is contained in:
parent
a20d654744
commit
11471ff68b
@ -225,7 +225,7 @@ SRC += $(PIOSCOMMON)/pios_crc.c
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SRC += $(PIOSCOMMON)/pios_flashfs_objlist.c
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SRC += $(PIOSCOMMON)/pios_flash_w25x.c
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SRC += $(PIOSCOMMON)/pios_adxl345.c
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SRC += $(PIOSSTM32F10X)/pios_l3gd20.c
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SRC += $(PIOSCOMMON)/pios_l3gd20.c
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SRC += $(PIOSCOMMON)/pios_com.c
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SRC += $(PIOSCOMMON)/pios_i2c_esc.c
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SRC += $(PIOSCOMMON)/pios_bmp085.c
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@ -97,14 +97,6 @@ static const struct pios_spi_cfg pios_spi_gyro_cfg = {
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},
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},
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},
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.ssel = {
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.gpio = GPIOA,
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.init = {
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.GPIO_Pin = GPIO_Pin_4,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_Out_PP,
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},
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},
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.sclk = {
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.gpio = GPIOA,
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.init = {
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@ -129,6 +121,14 @@ static const struct pios_spi_cfg pios_spi_gyro_cfg = {
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.GPIO_Mode = GPIO_Mode_AF_PP,
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},
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},
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.ssel = {{
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.gpio = GPIOA,
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.init = {
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.GPIO_Pin = GPIO_Pin_4,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_Out_PP,
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},
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}},
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};
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static uint32_t pios_spi_gyro_id;
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@ -148,93 +148,99 @@ void PIOS_SPI_flash_accel_irq_handler(void);
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void DMA1_Channel4_IRQHandler() __attribute__ ((alias ("PIOS_SPI_flash_accel_irq_handler")));
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void DMA1_Channel5_IRQHandler() __attribute__ ((alias ("PIOS_SPI_flash_accel_irq_handler")));
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static const struct pios_spi_cfg pios_spi_flash_accel_cfg = {
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.regs = SPI2,
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.init = {
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.SPI_Mode = SPI_Mode_Master,
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.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
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.SPI_DataSize = SPI_DataSize_8b,
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.SPI_NSS = SPI_NSS_Soft,
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.SPI_FirstBit = SPI_FirstBit_MSB,
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.SPI_CRCPolynomial = 7,
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.SPI_CPOL = SPI_CPOL_High,
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.SPI_CPHA = SPI_CPHA_2Edge,
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.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2,
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},
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.use_crc = FALSE,
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.dma = {
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.ahb_clk = RCC_AHBPeriph_DMA1,
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.regs = SPI2,
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.init = {
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.SPI_Mode = SPI_Mode_Master,
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.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
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.SPI_DataSize = SPI_DataSize_8b,
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.SPI_NSS = SPI_NSS_Soft,
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.SPI_FirstBit = SPI_FirstBit_MSB,
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.SPI_CRCPolynomial = 7,
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.SPI_CPOL = SPI_CPOL_High,
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.SPI_CPHA = SPI_CPHA_2Edge,
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.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2,
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},
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.use_crc = FALSE,
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.dma = {
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.ahb_clk = RCC_AHBPeriph_DMA1,
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.irq = {
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.flags = (DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 | DMA1_FLAG_GL4),
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.init = {
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.NVIC_IRQChannel = DMA1_Channel4_IRQn,
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.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
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.NVIC_IRQChannelSubPriority = 0,
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.NVIC_IRQChannelCmd = ENABLE,
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},
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},
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.irq = {
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.flags = (DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 | DMA1_FLAG_GL4),
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.init = {
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.NVIC_IRQChannel = DMA1_Channel4_IRQn,
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.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
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.NVIC_IRQChannelSubPriority = 0,
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.NVIC_IRQChannelCmd = ENABLE,
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},
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},
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.rx = {
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.channel = DMA1_Channel4,
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.init = {
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.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
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.DMA_DIR = DMA_DIR_PeripheralSRC,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_High,
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.DMA_M2M = DMA_M2M_Disable,
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},
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},
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.tx = {
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.channel = DMA1_Channel5,
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.init = {
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.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
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.DMA_DIR = DMA_DIR_PeripheralDST,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_High,
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.DMA_M2M = DMA_M2M_Disable,
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},
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},
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},
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.ssel = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_12,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_Out_PP,
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},
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},
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.sclk = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_13,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_AF_PP,
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},
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},
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.miso = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_14,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_IN_FLOATING,
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},
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},
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.mosi = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_15,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_AF_PP,
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},
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},
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.rx = {
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.channel = DMA1_Channel4,
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.init = {
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.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
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.DMA_DIR = DMA_DIR_PeripheralSRC,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_High,
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.DMA_M2M = DMA_M2M_Disable,
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},
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},
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.tx = {
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.channel = DMA1_Channel5,
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.init = {
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.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
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.DMA_DIR = DMA_DIR_PeripheralDST,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_High,
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.DMA_M2M = DMA_M2M_Disable,
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},
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},
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},
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.sclk = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_13,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_AF_PP,
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},
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},
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.miso = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_14,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_IN_FLOATING,
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},
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},
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.mosi = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_15,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_AF_PP,
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},
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},
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.ssel = {{
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.gpio = GPIOA,
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.init = {
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.GPIO_Pin = GPIO_Pin_4,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_Out_PP,
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}},{
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.gpio = GPIOA,
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.init = {
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.GPIO_Pin = GPIO_Pin_7,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_Out_PP,
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},
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}},
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};
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static uint32_t pios_spi_flash_accel_id;
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@ -1135,9 +1141,15 @@ uint32_t pios_com_vcp_id;
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uint32_t pios_com_gps_id;
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uint32_t pios_com_bridge_id;
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/**
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* Configuration for L3GD20 chip
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*/
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#if defined(PIOS_INCLUDE_L3GD20)
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#include "pios_l3gd20.h"
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static const struct pios_l3gd20_cfg pios_l3gd20_cfg = {
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.drdy = {
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static const struct pios_exti_cfg pios_exti_l3gd20_cfg __exti_config = {
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.vector = PIOS_L3GD20_IRQHandler,
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.line = EXTI_Line3,
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.pin = {
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.gpio = GPIOA,
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.init = {
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.GPIO_Pin = GPIO_Pin_3,
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@ -1145,17 +1157,7 @@ static const struct pios_l3gd20_cfg pios_l3gd20_cfg = {
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.GPIO_Mode = GPIO_Mode_IPU,
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},
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},
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.eoc_exti = {
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.pin_source = GPIO_PinSource3,
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.port_source = GPIO_PortSourceGPIOA,
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.init = {
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.EXTI_Line = EXTI_Line3, // matches above GPIO pin
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.EXTI_Mode = EXTI_Mode_Interrupt,
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.EXTI_Trigger = EXTI_Trigger_Rising,
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.EXTI_LineCmd = ENABLE,
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},
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},
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.eoc_irq = {
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.irq = {
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.init = {
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.NVIC_IRQChannel = EXTI3_IRQn,
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.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
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@ -1163,8 +1165,21 @@ static const struct pios_l3gd20_cfg pios_l3gd20_cfg = {
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.NVIC_IRQChannelCmd = ENABLE,
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},
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},
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.exti = {
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.init = {
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.EXTI_Line = EXTI_Line3, // matches above GPIO pin
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.EXTI_Mode = EXTI_Mode_Interrupt,
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.EXTI_Trigger = EXTI_Trigger_Rising,
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.EXTI_LineCmd = ENABLE,
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},
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},
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};
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static const struct pios_l3gd20_cfg pios_l3gd20_cfg = {
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.exti_cfg = &pios_exti_l3gd20_cfg,
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.gyro_range = PIOS_L3GD20_SCALE_500_DEG,
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};
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#endif /* PIOS_INCLUDE_L3GD20 */
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#include <pios_board_info.h>
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@ -1183,8 +1198,8 @@ void PIOS_Board_Init(void) {
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PIOS_Assert(0);
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}
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PIOS_Flash_W25X_Init(pios_spi_flash_accel_id);
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PIOS_ADXL345_Attach(pios_spi_flash_accel_id);
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PIOS_Flash_W25X_Init(pios_spi_flash_accel_id, 1);
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PIOS_ADXL345_Init(pios_spi_flash_accel_id, 0);
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PIOS_FLASHFS_Init();
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@ -178,10 +178,6 @@ static void AttitudeTask(void *parameters)
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PIOS_ADC_Config((PIOS_ADC_RATE / 1000.0f) * UPDATE_RATE);
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// Keep flash CS pin high while talking accel
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PIOS_FLASH_DISABLE;
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PIOS_ADXL345_Init();
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// Set critical error and wait until the accel is producing data
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while(PIOS_ADXL345_FifoElements() == 0) {
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AlarmsSet(SYSTEMALARMS_ALARM_ATTITUDE, SYSTEMALARMS_ALARM_CRITICAL);
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@ -1,32 +1,116 @@
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/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_ADXL345 ADXL345 Functions
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* @brief Deals with the hardware interface to the BMA180 3-axis accelerometer
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* @{
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*
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* @file pios_adxl345.h
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
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* @brief PiOS ADXL345 digital accelerometer driver.
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* pios_adxl345.c
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* OpenPilotOSX
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* Created by James Cotton on 1/16/11.
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* Copyright 2011 OpenPilot. All rights reserved.
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "pios.h"
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static uint32_t PIOS_SPI_ACCEL;
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enum pios_adxl345_dev_magic {
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PIOS_ADXL345_DEV_MAGIC = 0xcb55aa55,
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};
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struct adxl345_dev {
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uint32_t spi_id;
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uint32_t slave_num;
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enum pios_adxl345_dev_magic magic;
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};
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//! Global structure for this device device
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static struct adxl345_dev * dev;
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//! Private functions
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static struct adxl345_dev * PIOS_ADXL345_alloc(void);
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static int32_t PIOS_ADXL345_Validate(struct adxl345_dev * dev);
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static int32_t PIOS_ADXL345_ClaimBus();
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static int32_t PIOS_ADXL345_ReleaseBus();
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static int32_t PIOS_ADXL345_FifoDepth(uint8_t depth);
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/**
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* @brief Allocate a new device
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*/
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static struct adxl345_dev * PIOS_ADXL345_alloc(void)
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{
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struct adxl345_dev * adxl345_dev;
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adxl345_dev = (struct adxl345_dev *)pvPortMalloc(sizeof(*adxl345_dev));
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if (!adxl345_dev) return (NULL);
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adxl345_dev->magic = PIOS_ADXL345_DEV_MAGIC;
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return(adxl345_dev);
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}
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/**
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* @brief Validate the handle to the spi device
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* @returns 0 for valid device or -1 otherwise
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*/
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static int32_t PIOS_ADXL345_Validate(struct adxl345_dev * dev)
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{
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if (dev == NULL)
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return -1;
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if (dev->magic != PIOS_ADXL345_DEV_MAGIC)
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return -2;
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if (dev->spi_id == 0)
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return -3;
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return 0;
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}
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/**
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* @brief Claim the SPI bus for the accel communications and select this chip
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* @return 0 for succesful claiming of bus or -1 otherwise
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*/
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void PIOS_ADXL345_ClaimBus()
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static int32_t PIOS_ADXL345_ClaimBus()
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{
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PIOS_SPI_ClaimBus(PIOS_SPI_ACCEL);
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PIOS_ADXL_ENABLE;
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if(PIOS_ADXL345_Validate(dev) != 0)
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return -1;
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if(PIOS_SPI_ClaimBus(dev->spi_id) != 0)
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return -2;
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PIOS_SPI_RC_PinSet(dev->spi_id, dev->slave_num, 0);
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return 0;
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}
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/**
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* @brief Release the SPI bus for the accel communications and end the transaction
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* @return 0 if success or <0 for failure
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*/
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void PIOS_ADXL345_ReleaseBus()
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static int32_t PIOS_ADXL345_ReleaseBus()
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{
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PIOS_ADXL_DISABLE;
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PIOS_SPI_ReleaseBus(PIOS_SPI_ACCEL);
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if(PIOS_ADXL345_Validate(dev) != 0)
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return -1;
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PIOS_SPI_RC_PinSet(dev->spi_id, dev->slave_num, 1);
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if(PIOS_SPI_ReleaseBus(dev->spi_id) != 0)
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return -2;
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return 0;
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}
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/**
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@ -34,79 +118,133 @@ void PIOS_ADXL345_ReleaseBus()
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*
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* This also puts it into high power mode
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*/
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void PIOS_ADXL345_SelectRate(uint8_t rate)
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int32_t PIOS_ADXL345_SelectRate(uint8_t rate)
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{
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if(PIOS_ADXL345_Validate(dev) != 0)
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return -1;
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if(PIOS_ADXL345_ClaimBus() != 0)
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return -2;
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|
||||
uint8_t out[2] = {ADXL_RATE_ADDR, rate & 0x0F};
|
||||
PIOS_ADXL345_ClaimBus();
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,out,NULL,sizeof(out),NULL);
|
||||
if(PIOS_SPI_TransferBlock(dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
return -3;
|
||||
}
|
||||
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the range of the accelerometer and set the data to be right justified
|
||||
* with sign extension. Also keep device in 4 wire mode.
|
||||
*/
|
||||
void PIOS_ADXL345_SetRange(uint8_t range)
|
||||
int32_t PIOS_ADXL345_SetRange(uint8_t range)
|
||||
{
|
||||
if(PIOS_ADXL345_Validate(dev) != 0)
|
||||
return -1;
|
||||
|
||||
if(PIOS_ADXL345_ClaimBus() != 0)
|
||||
return -2;
|
||||
|
||||
uint8_t out[2] = {ADXL_FORMAT_ADDR, (range & 0x03) | ADXL_FULL_RES | ADXL_4WIRE};
|
||||
PIOS_ADXL345_ClaimBus();
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,out,NULL,sizeof(out),NULL);
|
||||
if(PIOS_SPI_TransferBlock(dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
return -3;
|
||||
}
|
||||
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the fifo depth that triggers an interrupt. This will be matched to the oversampling
|
||||
*/
|
||||
void PIOS_ADXL345_FifoDepth(uint8_t depth)
|
||||
static int32_t PIOS_ADXL345_FifoDepth(uint8_t depth)
|
||||
{
|
||||
if(PIOS_ADXL345_Validate(dev) != 0)
|
||||
return -1;
|
||||
|
||||
if(PIOS_ADXL345_ClaimBus() != 0)
|
||||
return -2;
|
||||
|
||||
uint8_t out[2] = {ADXL_FIFO_ADDR, (depth & 0x1f) | ADXL_FIFO_STREAM};
|
||||
PIOS_ADXL345_ClaimBus();
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,out,NULL,sizeof(out),NULL);
|
||||
if(PIOS_SPI_TransferBlock(dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
return -3;
|
||||
}
|
||||
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable measuring. This also disables the activity sensors (tap or free fall)
|
||||
*/
|
||||
void PIOS_ADXL345_SetMeasure(uint8_t enable)
|
||||
static int32_t PIOS_ADXL345_SetMeasure(uint8_t enable)
|
||||
{
|
||||
uint8_t out[2] = {ADXL_POWER_ADDR, ADXL_MEAURE};
|
||||
PIOS_ADXL345_ClaimBus();
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,out,NULL,sizeof(out),NULL);
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
}
|
||||
if(PIOS_ADXL345_Validate(dev) != 0)
|
||||
return -1;
|
||||
|
||||
/**
|
||||
* @brief Connect to the correct SPI bus
|
||||
*/
|
||||
void PIOS_ADXL345_Attach(uint32_t spi_id)
|
||||
{
|
||||
PIOS_SPI_ACCEL = spi_id;
|
||||
if(PIOS_ADXL345_ClaimBus() != 0)
|
||||
return -2;
|
||||
|
||||
uint8_t out[2] = {ADXL_POWER_ADDR, ADXL_MEAURE};
|
||||
if(PIOS_SPI_TransferBlock(dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
return -3;
|
||||
}
|
||||
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize with good default settings
|
||||
*/
|
||||
void PIOS_ADXL345_Init()
|
||||
int32_t PIOS_ADXL345_Init(uint32_t spi_id, uint32_t slave_num)
|
||||
{
|
||||
dev = PIOS_ADXL345_alloc();
|
||||
if(dev == NULL)
|
||||
return -1;
|
||||
|
||||
dev->spi_id = spi_id;
|
||||
dev->slave_num = slave_num;
|
||||
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
PIOS_ADXL345_SelectRate(ADXL_RATE_3200);
|
||||
PIOS_ADXL345_SetRange(ADXL_RANGE_8G);
|
||||
PIOS_ADXL345_FifoDepth(16);
|
||||
PIOS_ADXL345_SetMeasure(1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return number of entries in the fifo
|
||||
*/
|
||||
uint8_t PIOS_ADXL345_FifoElements()
|
||||
int32_t PIOS_ADXL345_FifoElements()
|
||||
{
|
||||
if(PIOS_ADXL345_Validate(dev) != 0)
|
||||
return -1;
|
||||
|
||||
if(PIOS_ADXL345_ClaimBus() != 0)
|
||||
return -2;
|
||||
|
||||
uint8_t buf[2] = {0,0};
|
||||
uint8_t rec[2] = {0,0};
|
||||
buf[0] = ADXL_FIFOSTATUS_ADDR | ADXL_READ_BIT ; // Read fifo status
|
||||
|
||||
PIOS_ADXL345_ClaimBus();
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,&buf[0],&rec[0],sizeof(buf),NULL);
|
||||
if(PIOS_SPI_TransferBlock(dev->spi_id,&buf[0],&rec[0],sizeof(buf),NULL) < 0) {
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
return -3;
|
||||
}
|
||||
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
|
||||
return rec[1] & 0x3f;
|
||||
@ -118,14 +256,23 @@ uint8_t PIOS_ADXL345_FifoElements()
|
||||
*/
|
||||
uint8_t PIOS_ADXL345_Read(struct pios_adxl345_data * data)
|
||||
{
|
||||
if(PIOS_ADXL345_Validate(dev) != 0)
|
||||
return -1;
|
||||
|
||||
if(PIOS_ADXL345_ClaimBus() != 0)
|
||||
return -2;
|
||||
|
||||
// To save memory use same buffer for in and out but offset by
|
||||
// a byte
|
||||
uint8_t buf[9] = {0,0,0,0,0,0,0,0};
|
||||
uint8_t rec[9] = {0,0,0,0,0,0,0,0};
|
||||
buf[0] = ADXL_X0_ADDR | ADXL_MULTI_BIT | ADXL_READ_BIT ; // Multibyte read starting at X0
|
||||
|
||||
PIOS_ADXL345_ClaimBus();
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,&buf[0],&rec[0],9,NULL);
|
||||
if(PIOS_SPI_TransferBlock(dev->spi_id,&buf[0],&rec[0],9,NULL) < 0) {
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
return -3;
|
||||
}
|
||||
|
||||
PIOS_ADXL345_ReleaseBus();
|
||||
|
||||
data->x = rec[1] + (rec[2] << 8);
|
||||
|
@ -34,6 +34,8 @@
|
||||
|
||||
#if defined(PIOS_INCLUDE_L3GD20)
|
||||
|
||||
#include "fifo_buffer.h"
|
||||
|
||||
/* Global Variables */
|
||||
uint32_t pios_spi_gyro;
|
||||
|
||||
@ -64,9 +66,9 @@ void PIOS_L3GD20_Init(const struct pios_l3gd20_cfg * new_cfg)
|
||||
fifoBuf_init(&pios_l3gd20_fifo, (uint8_t *) pios_l3gd20_buffer, sizeof(pios_l3gd20_buffer));
|
||||
|
||||
/* Configure the MPU6050 Sensor */
|
||||
PIOS_SPI_SetPrescalar(pios_spi_gyro, SPI_BaudRatePrescaler_256);
|
||||
PIOS_SPI_SetClockSpeed(pios_spi_gyro, SPI_BaudRatePrescaler_256);
|
||||
PIOS_L3GD20_Config(cfg);
|
||||
PIOS_SPI_SetPrescalar(pios_spi_gyro, SPI_BaudRatePrescaler_16);
|
||||
PIOS_SPI_SetClockSpeed(pios_spi_gyro, SPI_BaudRatePrescaler_16);
|
||||
|
||||
/* Set up EXTI */
|
||||
PIOS_EXTI_Init(new_cfg->exti_cfg);
|
||||
@ -279,30 +281,6 @@ uint8_t PIOS_L3GD20_Test(void)
|
||||
return -2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Run self-test operation.
|
||||
* \return 0 if test succeeded
|
||||
* \return non-zero value if test succeeded
|
||||
*/
|
||||
static int32_t PIOS_L3GD20_FifoDepth(void)
|
||||
{
|
||||
/* uint8_t l3gd20_send_buf[3] = {PIOS_L3GD20_FIFO_CNT_MSB | 0x80, 0, 0};
|
||||
uint8_t l3gd20_rec_buf[3];
|
||||
|
||||
if(PIOS_L3GD20_ClaimBus() != 0)
|
||||
return -1;
|
||||
|
||||
if(PIOS_SPI_TransferBlock(pios_spi_gyro, &l3gd20_send_buf[0], &l3gd20_rec_buf[0], sizeof(l3gd20_send_buf), NULL) < 0) {
|
||||
PIOS_L3GD20_ReleaseBus();
|
||||
return -1;
|
||||
}
|
||||
|
||||
PIOS_L3GD20_ReleaseBus();
|
||||
|
||||
return (l3gd20_rec_buf[1] << 8) | l3gd20_rec_buf[2];*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IRQ Handler. Read all the data from onboard buffer
|
||||
*/
|
||||
|
@ -66,13 +66,11 @@ struct pios_adxl345_data {
|
||||
int16_t z;
|
||||
};
|
||||
|
||||
void PIOS_ADXL345_SelectRate(uint8_t rate);
|
||||
void PIOS_ADXL345_SetRange(uint8_t range);
|
||||
void PIOS_ADXL345_FifoDepth(uint8_t depth);
|
||||
void PIOS_ADXL345_Attach(uint32_t spi_id);
|
||||
void PIOS_ADXL345_Init();
|
||||
int32_t PIOS_ADXL345_SelectRate(uint8_t rate);
|
||||
int32_t PIOS_ADXL345_SetRange(uint8_t range);
|
||||
int32_t PIOS_ADXL345_Init(uint32_t spi_id, uint32_t slave_num);
|
||||
uint8_t PIOS_ADXL345_Read(struct pios_adxl345_data * data);
|
||||
uint8_t PIOS_ADXL345_FifoElements();
|
||||
int32_t PIOS_ADXL345_FifoElements();
|
||||
|
||||
#endif
|
||||
|
||||
|
@ -1536,6 +1536,7 @@ static const struct pios_mpu6000_cfg pios_mpu6000_cfg = {
|
||||
.filter = PIOS_MPU6000_LOWPASS_256_HZ
|
||||
};
|
||||
#endif /* PIOS_INCLUDE_MPU6000 */
|
||||
|
||||
/**
|
||||
* Configuration for L3GD20 chip
|
||||
*/
|
||||
|
Loading…
x
Reference in New Issue
Block a user