rooty/LibrePilot
1
0
Fork 0
mirror of https://bitbucket.org/librepilot/librepilot.git synced 2024-11-29 07:24:13 +01:00
Code Issues Releases Activity

build: convert all app loads to require bootloaders

Browse Source 
This change is made up of a number of tightly coupled
changes:
 - Deprecate the use of the USE_BOOTLOADER command-line
   option.  It is now hard-coded in each Makefile.
   Overriding it on the command line is not allowed.
 - Split apart the memory declaration and the section
   declaration in all linker files (*_memory.ld and
   *_sections.ld).
 - Describe the split between bootloader and app sections
   of flash in each board's _memory.ld file.
 - Change program target to selectively erase flash so
   that the installed bootloader is preserved across even
   JTAG programming operations.
 - All elf files are built with debug symbols and are not
   stripped.  This should help debugging with gdb.  The
   images programmed on the boards are all .bin files now
   which do not include symbols.
This commit is contained in:
Stacey Sheldon 2011-04-24 18:37:45 -04:00
parent 268522c91b
commit 29ec2f198b
26 changed files with 365 additions and 459 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
Makefile
View File

@ -60,10 +60,6 @@ areyousureyoushouldberunningthis:
@echo " ahrs_program - Program the firmware onto the AHRS board"
@echo " coptercontrol - Build firmware for the CopterControl board"
@echo
@echo " NOTE: To build firmware to be chain loaded from a bootloader, use"
@echo " make openpilot USE_BOOTLOADER=YES"
@echo " Don't forget to do a clean between builds with/without bootloader"
@echo
@echo " [Simulation]"
@echo " sim_posix - Build OpenPilot simulation firmware for"
@echo " a POSIX compatible system (Linux, Mac OS X, ...)"
@ -299,11 +295,11 @@ all_fw: $(addsuffix _bin, $(FW_TARGETS))
all_fw_clean: $(addsuffix _clean, $(FW_TARGETS))
.PHONY: all_bl all_bl_clean
all_bl: $(addsuffix _elf, $(BL_TARGETS))
all_bl: $(addsuffix _bin, $(BL_TARGETS))
all_bl_clean: $(addsuffix _clean, $(BL_TARGETS))
.PHONY: all_blupd all_blupd_clean
all_blupd: $(addsuffix _elf, $(BLUPD_TARGETS))
all_blupd: $(addsuffix _bin, $(BLUPD_TARGETS))
all_blupd_clean: $(addsuffix _clean, $(BLUPD_TARGETS))
.PHONY: all_flight all_flight_clean
@ -326,8 +322,8 @@ openpilot_clean:
$(V1) $(RM) -fr $(BUILD_DIR)/openpilot
.PHONY: bl_openpilot
bl_openpilot: bl_openpilot_elf
bl_openpilot_bino: bl_openpilot_elf
bl_openpilot: bl_openpilot_bin
bl_openpilot_bino: bl_openpilot_bin
bl_openpilot_%:
$(V1) mkdir -p $(BUILD_DIR)/bl_openpilot/dep
@ -341,6 +337,9 @@ bl_openpilot_clean:
$(V0) @echo " CLEAN $@"
$(V1) $(RM) -fr $(BUILD_DIR)/bl_openpilot
.PHONY: blupd_openpilot
blupd_openpilot: blupd_openpilot_bin
blupd_openpilot_%: bl_openpilot_bino
$(V1) mkdir -p $(BUILD_DIR)/blupd_openpilot/dep
$(V1) cd $(ROOT_DIR)/flight/Bootloaders/BootloaderUpdater && \
@ -371,8 +370,8 @@ ahrs_clean:
$(V1) $(RM) -fr $(BUILD_DIR)/ahrs
.PHONY: bl_ahrs
bl_ahrs: bl_ahrs_elf
bl_ahrs_bino: bl_ahrs_elf
bl_ahrs: bl_ahrs_bin
bl_ahrs_bino: bl_ahrs_bin
bl_ahrs_%:
$(V1) mkdir -p $(BUILD_DIR)/bl_ahrs/dep
@ -386,6 +385,9 @@ bl_ahrs_clean:
$(V0) @echo " CLEAN $@"
$(V1) $(RM) -fr $(BUILD_DIR)/bl_ahrs
.PHONY: blupd_ahrs
blupd_ahrs: blupd_ahrs_bin
blupd_ahrs_%: bl_ahrs_bino bl_ahrs
$(V1) mkdir -p $(BUILD_DIR)/blupd_ahrs/dep
$(V1) cd $(ROOT_DIR)/flight/Bootloaders/BootloaderUpdater && \
@ -416,8 +418,8 @@ coptercontrol_clean:
$(V1) $(RM) -fr $(BUILD_DIR)/coptercontrol
.PHONY: bl_coptercontrol
bl_coptercontrol: bl_coptercontrol_elf
bl_coptercontrol_bino: bl_coptercontrol_elf
bl_coptercontrol: bl_coptercontrol_bin
bl_coptercontrol_bino: bl_coptercontrol_bin
bl_coptercontrol_%:
$(V1) mkdir -p $(BUILD_DIR)/bl_coptercontrol/dep
@ -431,6 +433,9 @@ bl_coptercontrol_clean:
$(V0) @echo " CLEAN $@"
$(V1) $(RM) -fr $(BUILD_DIR)/bl_coptercontrol
.PHONY: blupd_coptercontrol
blupd_coptercontrol: blupd_coptercontrol_bin
blupd_coptercontrol_%: bl_coptercontrol_bino
$(V1) mkdir -p $(BUILD_DIR)/blupd_coptercontrol/dep
$(V1) cd $(ROOT_DIR)/flight/Bootloaders/BootloaderUpdater && \
@ -461,8 +466,8 @@ pipxtreme_clean:
$(V1) $(RM) -fr $(BUILD_DIR)/pipxtreme
.PHONY: bl_pipxtreme
bl_pipxtreme: bl_pipxtreme_elf
bl_pipxtreme_bino: bl_pipxtreme_elf
bl_pipxtreme: bl_pipxtreme_bin
bl_pipxtreme_bino: bl_pipxtreme_bin
bl_pipxtreme_%:
$(V1) mkdir -p $(BUILD_DIR)/bl_pipxtreme/dep
@ -476,6 +481,9 @@ bl_pipxtreme_clean:
$(V0) @echo " CLEAN $@"
$(V1) $(RM) -fr $(BUILD_DIR)/bl_pipxtreme
.PHONY: blupd_pipxtreme
blupd_pipxtreme: blupd_pipxtreme_bin
blupd_pipxtreme_%: bl_pipxtreme_bino
$(V1) mkdir -p $(BUILD_DIR)/blupd_pipxtreme/dep
$(V1) cd $(ROOT_DIR)/flight/Bootloaders/BootloaderUpdater && \

29
flight/AHRS/Makefile
View File

@ -29,7 +29,6 @@ include $(TOP)/make/firmware-defs.mk
# Set developer code and compile options
# Set to YES for debugging
DEBUG ?= NO
USE_BOOTLOADER ?= YES
# Set to YES when using Code Sourcery toolchain
CODE_SOURCERY ?= YES
@ -50,11 +49,6 @@ MCU = cortex-m3
CHIP = STM32F103CBT
BOARD = STM32103CB_AHRS
MODEL = MD
ifeq ($(USE_BOOTLOADER), YES)
BOOT_MODEL = $(MODEL)_BL
else
BOOT_MODEL = $(MODEL)_NB
endif
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
OUTDIR = $(TOP)/build/ahrs
@ -229,9 +223,8 @@ CDEFS = -DSTM32F10X_$(MODEL)
CDEFS += -DUSE_STDPERIPH_DRIVER
CDEFS += -DUSE_$(BOARD)
CDEFS += -DIN_AHRS
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
# Place project-specific -D and/or -U options for
# Assembler with preprocessor here.
#ADEFS = -DUSE_IRQ_ASM_WRAPPER
@ -303,16 +296,17 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_$(BOARD)_$(BOOT_MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_sections.ld
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08002000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08002000 bin"
# reset target
OOCD_CL+=-c "reset run"
# # terminate OOCD after programming
# terminate OOCD after programming
OOCD_CL+=-c shutdown
@ -352,19 +346,12 @@ endif
endif
# Program the device.
ifeq ($(USE_BOOTLOADER), YES)
# Program the device with OP Upload Tool".
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OP Upload Tool${quote}
../../ground/src/experimental/upload-build-desktop/debug/OPUploadTool -d 1 -p $(OUTDIR)/$(TARGET).bin
else
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OPENOCD${quote}
$(OOCD_EXE) $(OOCD_CL)
endif
endif
# Link: create ELF output file from object files.
$(eval $(call LINK_TEMPLATE, $(OUTDIR)/$(TARGET).elf, $(ALLOBJ)))

18
flight/Bootloaders/AHRS/Makefile
View File

@ -29,7 +29,6 @@ include $(TOP)/make/firmware-defs.mk
# Set developer code and compile options
# Set to YES for debugging
DEBUG ?= NO
override USE_BOOTLOADER = NO
# Set to YES when using Code Sourcery toolchain
CODE_SOURCERY ?= YES
@ -208,9 +207,7 @@ DEBUGF = dwarf-2
CDEFS = -DSTM32F10X_$(MODEL)
CDEFS += -DUSE_STDPERIPH_DRIVER
CDEFS += -DUSE_$(BOARD)
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
# Place project-specific -D and/or -U options for
# Assembler with preprocessor here.
#ADEFS = -DUSE_IRQ_ASM_WRAPPER
@ -281,7 +278,7 @@ MATH_LIB = -lm
# --cref: add cross reference to map file
LDFLAGS = -nostartfiles -Wl,-Map=$(OUTDIR)/$(TARGET).map,--cref,--gc-sections
ifeq ($(DEBUG),NO)
LDFLAGS += -Wl,-static -Wl,-s
LDFLAGS += -Wl,-static
endif
LDFLAGS += $(patsubst %,-L%,$(EXTRA_LIBDIRS))
LDFLAGS += -lc
@ -290,13 +287,14 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_stm32f10x_$(MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_BL_sections.ld
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08000000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08000000 bin"
# reset target
OOCD_CL+=-c "reset run"
# terminate OOCD after programming
@ -340,7 +338,7 @@ endif
# Program the device.
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo "Programming with OPENOCD"
$(OOCD_EXE) $(OOCD_CL)
endif

35
flight/Bootloaders/BootloaderUpdater/Makefile
View File

@ -36,12 +36,6 @@ ENABLE_DEBUG_PINS ?= NO
# Set to Yes to enable the AUX UART which is mapped on the S1 (Tx) and S2 (Rx) servo outputs
ENABLE_AUX_UART ?= NO
#
USE_BOOTLOADER ?= YES
# Set to the source bootloader binary
SOURCE_BL ?= NULL
# Set to YES when using Code Sourcery toolchain
CODE_SOURCERY ?= NO
@ -66,12 +60,6 @@ CHIP = STM32F103CBT
BOARD ?= NULL
MODEL ?= NULL
ifeq ($(USE_BOOTLOADER), YES)
BOOT_MODEL = $(MODEL)_BL
else
BOOT_MODEL = $(MODEL)_NB
endif
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
OUTDIR = ../../../build/bootloaders/BootloaderUpdater
@ -236,10 +224,7 @@ endif
ifeq ($(ENABLE_AUX_UART), YES)
CDEFS += -DPIOS_ENABLE_AUX_UART
endif
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
# Place project-specific -D and/or -U options for
# Assembler with preprocessor here.
@ -319,21 +304,14 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_$(BOARD)_$(BOOT_MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_sections.ld
# Test if quotes are needed for the echo-command
result = ${shell echo "test"}
ifeq (${result}, test)
quote = '
else
quote =
endif
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08003000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08003000 bin"
# reset target
OOCD_CL+=-c "reset run"
# terminate OOCD after programming
@ -380,7 +358,7 @@ endif
# Program the device.
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OPENOCD${quote}
$(OOCD_EXE) $(OOCD_CL)
endif
@ -416,6 +394,7 @@ $(OUTDIR)/$(TARGET).bin.o: $(OUTDIR)/$(TARGET).bin
.PHONY: elf lss sym hex bin bino
elf: $(OUTDIR)/$(TARGET).elf
elf.stripped: $(OUTDIR)/$(TARGET).elf.stripped
lss: $(OUTDIR)/$(TARGET).lss
sym: $(OUTDIR)/$(TARGET).sym
hex: $(OUTDIR)/$(TARGET).hex

27
flight/Bootloaders/CopterControl/Makefile
View File

@ -36,10 +36,6 @@ ENABLE_DEBUG_PINS ?= NO
# Set to Yes to enable the AUX UART which is mapped on the S1 (Tx) and S2 (Rx) servo outputs
ENABLE_AUX_UART ?= NO
#
override USE_BOOTLOADER = NO
# Set to YES when using Code Sourcery toolchain
CODE_SOURCERY ?= NO
@ -60,12 +56,6 @@ MCU = cortex-m3
CHIP = STM32F103CBT
BOARD = STM32103CB_CC_Rev1
MODEL = MD
ifeq ($(USE_BOOTLOADER), YES)
BOOT_MODEL = $(MODEL)_BL
else
BOOT_MODEL = $(MODEL)_NB
endif
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
OUTDIR = $(TOP)/build/bl_coptercontrol
@ -268,10 +258,6 @@ endif
ifeq ($(ENABLE_AUX_UART), YES)
CDEFS += -DPIOS_ENABLE_AUX_UART
endif
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
# Place project-specific -D and/or -U options for
# Assembler with preprocessor here.
@ -351,13 +337,14 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_stm32f10x_$(MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_BL_sections.ld
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08000000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08000000 bin"
# reset target
OOCD_CL+=-c "reset run"
# terminate OOCD after programming
@ -409,7 +396,7 @@ ${OUTDIR}/InitMods.c: Makefile
# Program the device.
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OPENOCD${quote}
$(OOCD_EXE) $(OOCD_CL)
endif

27
flight/Bootloaders/OpenPilot/Makefile
View File

@ -36,10 +36,6 @@ ENABLE_DEBUG_PINS ?= NO
# Set to Yes to enable the AUX UART which is mapped on the S1 (Tx) and S2 (Rx) servo outputs
ENABLE_AUX_UART ?= NO
#
override USE_BOOTLOADER = NO
# Set to YES when using Code Sourcery toolchain
CODE_SOURCERY ?= NO
@ -60,12 +56,6 @@ MCU = cortex-m3
CHIP = STM32F103RET
BOARD = STM3210E_OP
MODEL = HD
ifeq ($(USE_BOOTLOADER), YES)
BOOT_MODEL = $(MODEL)_BL
else
BOOT_MODEL = $(MODEL)_NB
endif
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
OUTDIR = $(TOP)/build/bl_openpilot
@ -193,7 +183,7 @@ CPPSRCARM =
# Even though the DOS/Win* filesystem matches both .s and .S the same,
# it will preserve the spelling of the filenames, and gcc itself does
# care about how the name is spelled on its command-line.
ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL)$(MODEL_SUFFIX).S
ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL)_OP.S
# List Assembler source files here which must be assembled in ARM-Mode..
ASRCARM =
@ -271,10 +261,6 @@ endif
ifeq ($(ENABLE_AUX_UART), YES)
CDEFS += -DPIOS_ENABLE_AUX_UART
endif
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
# Place project-specific -D and/or -U options for
# Assembler with preprocessor here.
@ -354,13 +340,14 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_stm32f10x_$(MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_BL_sections.ld
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08000000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08000000 bin"
# reset target
OOCD_CL+=-c "reset run"
# terminate OOCD after programming
@ -412,7 +399,7 @@ ${OUTDIR}/InitMods.c: Makefile
# Program the device.
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OPENOCD${quote}
$(OOCD_EXE) $(OOCD_CL)
endif

25
flight/Bootloaders/PipXtreme/Makefile
View File

@ -36,10 +36,6 @@ ENABLE_DEBUG_PINS ?= NO
# Set to Yes to enable the AUX UART which is mapped on the S1 (Tx) and S2 (Rx) servo outputs
ENABLE_AUX_UART ?= NO
#
override USE_BOOTLOADER = NO
# Set to YES when using Code Sourcery toolchain
CODE_SOURCERY ?= NO
@ -60,12 +56,6 @@ MCU = cortex-m3
CHIP = STM32F103CBT
BOARD = STM32103CB_PIPXTREME
MODEL = MD
ifeq ($(USE_BOOTLOADER), YES)
BOOT_MODEL = $(MODEL)_BL
else
BOOT_MODEL = $(MODEL)_NB
endif
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
OUTDIR = $(TOP)/build/bl_pipxtreme
@ -267,10 +257,6 @@ endif
ifeq ($(ENABLE_AUX_UART), YES)
CDEFS += -DPIOS_ENABLE_AUX_UART
endif
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
# Place project-specific -D and/or -U options for
# Assembler with preprocessor here.
@ -350,13 +336,14 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_stm32f10x_$(MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_BL_sections.ld
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08000000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08000000 bin"
# reset target
OOCD_CL+=-c "reset run"
# terminate OOCD after programming
@ -408,7 +395,7 @@ ${OUTDIR}/InitMods.c: Makefile
# Program the device.
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OPENOCD${quote}
$(OOCD_EXE) $(OOCD_CL)
endif

33
flight/CopterControl/Makefile
View File

@ -38,9 +38,6 @@ ENABLE_DEBUG_PINS ?= NO
# Set to Yes to enable the AUX UART which is mapped on the S1 (Tx) and S2 (Rx) servo outputs
ENABLE_AUX_UART ?= NO
#
USE_BOOTLOADER ?= YES
USE_SPEKTRUM ?= NO
USE_I2C ?= NO
@ -68,12 +65,6 @@ MCU = cortex-m3
CHIP = STM32F103CBT
BOARD = STM32103CB_CC_Rev1
MODEL = MD
ifeq ($(USE_BOOTLOADER), YES)
BOOT_MODEL = $(MODEL)_BL
else
BOOT_MODEL = $(MODEL)_NB
endif
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
OUTDIR = $(TOP)/build/coptercontrol
@ -208,7 +199,6 @@ SRC += $(PIOSSTM32F10X)/pios_wdg.c
# PIOS USB related files (seperated to make code maintenance more easy)
SRC += $(PIOSSTM32F10X)/pios_usb_hid.c
#SRC += $(PIOSSTM32F10X)/pios_usb_hid_desc.c
SRC += $(PIOSSTM32F10X)/pios_usb_hid_istr.c
SRC += $(PIOSSTM32F10X)/pios_usb_hid_prop.c
SRC += $(PIOSSTM32F10X)/pios_usb_hid_pwr.c
@ -389,9 +379,7 @@ endif
ifeq ($(ENABLE_AUX_UART), YES)
CDEFS += -DPIOS_ENABLE_AUX_UART
endif
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
ifeq ($(ERASE_FLASH), YES)
CDEFS += -DERASE_FLASH
endif
@ -481,13 +469,14 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_$(BOARD)_$(BOOT_MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_sections.ld
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08003000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08003000 bin"
# reset target
OOCD_CL+=-c "reset run"
# terminate OOCD after programming
@ -548,20 +537,12 @@ ${OUTDIR}/InitMods.c: Makefile
# @$(PYTHON) $(PYMITETOOLS)/pmGenPmFeatures.py $(PYMITEPLAT)/pmfeatures.py > $(OUTDIR)/pmfeatures.h
# @$(PYTHON) $(PYMITETOOLS)/pmImgCreator.py -f $(PYMITEPLAT)/pmfeatures.py -c -u -o $(OUTDIR)/pmlibusr_img.c --native-file=$(OUTDIR)/pmlibusr_nat.c $(FLIGHTPLANS)/test.py
# Program the device.
ifeq ($(USE_BOOTLOADER), YES)
# Program the device with OP Upload Tool".
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OP Upload Tool${quote}
../../ground/src/experimental/upload-build-desktop/debug/OPUploadTool -d 0 -p $(OUTDIR)/$(TARGET).bin
else
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OPENOCD${quote}
$(OOCD_EXE) $(OOCD_CL)
endif
endif
# Link: create ELF output file from object files.
$(eval $(call LINK_TEMPLATE, $(OUTDIR)/$(TARGET).elf, $(ALLOBJ)))

31
flight/OpenPilot/Makefile
View File

@ -36,9 +36,6 @@ ENABLE_DEBUG_PINS ?= NO
# Set to Yes to enable the AUX UART which is mapped on the S1 (Tx) and S2 (Rx) servo outputs
ENABLE_AUX_UART ?= NO
#
USE_BOOTLOADER ?= YES
USE_SPEKTRUM ?= NO
@ -71,12 +68,6 @@ MCU = cortex-m3
CHIP = STM32F103RET
BOARD = STM3210E_OP
MODEL = HD
ifeq ($(USE_BOOTLOADER), YES)
BOOT_MODEL = $(MODEL)_BL
else
BOOT_MODEL = $(MODEL)_NB
endif
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
OUTDIR = $(TOP)/build/openpilot
@ -377,9 +368,7 @@ endif
ifeq ($(ENABLE_AUX_UART), YES)
CDEFS += -DPIOS_ENABLE_AUX_UART
endif
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
ifeq ($(USE_SPEKTRUM), YES)
CDEFS += -DUSE_SPEKTRUM
@ -458,13 +447,14 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_$(BOARD)_$(BOOT_MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_sections.ld
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08005000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08005000 bin"
# reset target
OOCD_CL+=-c "reset run"
# terminate OOCD after programming
@ -527,19 +517,12 @@ ${OUTDIR}/pmlib_img.c ${OUTDIR}/pmlib_nat.c ${OUTDIR}/pmlibusr_img.c ${OUTDIR}/p
@$(PYTHON) $(PYMITETOOLS)/pmImgCreator.py -f $(PYMITEPLAT)/pmfeatures.py -c -u -o $(OUTDIR)/pmlibusr_img.c --native-file=$(OUTDIR)/pmlibusr_nat.c $(FLIGHTPLANS)/test.py
# Program the device.
ifeq ($(USE_BOOTLOADER), YES)
# Program the device with OP Upload Tool".
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OP Upload Tool${quote}
../../ground/src/experimental/upload-build-desktop/debug/OPUploadTool -d 0 -p $(OUTDIR)/$(TARGET).bin
else
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OPENOCD${quote}
$(OOCD_EXE) $(OOCD_CL)
endif
endif
# Link: create ELF output file from object files.
$(eval $(call LINK_TEMPLATE, $(OUTDIR)/$(TARGET).elf, $(ALLOBJ)))

14
flight/PiOS/STM32F10x/link_STM32103CB_AHRS_MD_NB.ld → flight/PiOS/STM32F10x/link_STM32103CB_AHRS_BL_sections.ld
View File

@ -1,9 +1,3 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00020000
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
}
_estack = 0x20004FF0;
/* Section Definitions */
@ -15,17 +9,17 @@ SECTIONS
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
} > FLASH
} > BL_FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
} > BL_FLASH
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
} > BL_FLASH
. = ALIGN(4);
_etext = .;
@ -51,4 +45,4 @@ SECTIONS
. = ALIGN(4);
_end = . ;
}
}

6
flight/PiOS/STM32F10x/link_STM32103CB_AHRS_memory.ld Normal file
View File

@ -0,0 +1,6 @@
MEMORY
{
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 8K
FLASH (rx) : ORIGIN = 0x08000000 + 8K, LENGTH = 128K - 8K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
}

8
flight/PiOS/STM32F10x/link_STM32103CB_AHRS_MD_BL.ld → flight/PiOS/STM32F10x/link_STM32103CB_AHRS_sections.ld
View File

@ -1,9 +1,3 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08002000, LENGTH = 116K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
}
_estack = 0x20004FF0;
/* Section Definitions */
@ -51,4 +45,4 @@ SECTIONS
. = ALIGN(4);
_end = . ;
}
}

97
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_BL_sections.ld Normal file
View File

@ -0,0 +1,97 @@
/* Stub out these functions since we don't use them anyway */
PROVIDE ( vPortSVCHandler = 0 ) ;
PROVIDE ( xPortPendSVHandler = 0 ) ;
PROVIDE ( xPortSysTickHandler = 0 ) ;
_estack = 0x20004FF0;
/* Section Definitions */
SECTIONS
{
.text :
{
KEEP(*(.isr_vector .isr_vector.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
} > BL_FLASH
/* init sections */
.initcalluavobj.init :
{
. = ALIGN(4);
__uavobj_initcall_start = .;
KEEP(*(.initcalluavobj.init))
. = ALIGN(4);
__uavobj_initcall_end = .;
} > BL_FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > BL_FLASH
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > BL_FLASH
. = ALIGN(4);
_etext = .;
_sidata = .;
.data : AT (_etext)
{
_sdata = .;
*(.data .data.*)
. = ALIGN(4);
_edata = . ;
} > SRAM
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
_sbss = . ;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
} > SRAM
. = ALIGN(4);
_end = . ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}

69
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_MD_BL.ld
View File

@ -1,69 +0,0 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 116K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
}
/* Stub out these functions since we don't use them anyway */
PROVIDE ( vPortSVCHandler = 0 ) ;
PROVIDE ( xPortPendSVHandler = 0 ) ;
PROVIDE ( xPortSysTickHandler = 0 ) ;
_estack = 0x20004FF0;
/* Section Definitions */
SECTIONS
{
.text :
{
KEEP(*(.isr_vector .isr_vector.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
} > FLASH
/* init sections */
.initcalluavobj.init :
{
. = ALIGN(4);
__uavobj_initcall_start = .;
KEEP(*(.initcalluavobj.init))
. = ALIGN(4);
__uavobj_initcall_end = .;
} >FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
. = ALIGN(4);
_etext = .;
_sidata = .;
.data : AT (_etext)
{
_sdata = .;
*(.data .data.*)
. = ALIGN(4);
_edata = . ;
} > SRAM
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
_sbss = . ;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
} > SRAM
. = ALIGN(4);
_end = . ;
}

64
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_MD_NB.ld
View File

@ -1,64 +0,0 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00020000
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
}
_estack = 0x20004FF0;
/* Section Definitions */
SECTIONS
{
.text :
{
KEEP(*(.isr_vector .isr_vector.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
} > FLASH
/* init sections */
.initcalluavobj.init :
{
. = ALIGN(4);
__uavobj_initcall_start = .;
KEEP(*(.initcalluavobj.init))
. = ALIGN(4);
__uavobj_initcall_end = .;
} >FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
. = ALIGN(4);
_etext = .;
_sidata = .;
.data : AT (_etext)
{
_sdata = .;
*(.data .data.*)
. = ALIGN(4);
_edata = . ;
} > SRAM
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
_sbss = . ;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
} > SRAM
. = ALIGN(4);
_end = . ;
}

6
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_memory.ld Normal file
View File

@ -0,0 +1,6 @@
MEMORY
{
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 12K
FLASH (rx) : ORIGIN = 0x08000000 + 12K, LENGTH = 128K - 12K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
}

97
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld Normal file
View File

@ -0,0 +1,97 @@
/* Stub out these functions since we don't use them anyway */
PROVIDE ( vPortSVCHandler = 0 ) ;
PROVIDE ( xPortPendSVHandler = 0 ) ;
PROVIDE ( xPortSysTickHandler = 0 ) ;
_estack = 0x20004FF0;
/* Section Definitions */
SECTIONS
{
.text :
{
KEEP(*(.isr_vector .isr_vector.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
} > FLASH
/* init sections */
.initcalluavobj.init :
{
. = ALIGN(4);
__uavobj_initcall_start = .;
KEEP(*(.initcalluavobj.init))
. = ALIGN(4);
__uavobj_initcall_end = .;
} >FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
. = ALIGN(4);
_etext = .;
_sidata = .;
.data : AT (_etext)
{
_sdata = .;
*(.data .data.*)
. = ALIGN(4);
_edata = . ;
} > SRAM
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
_sbss = . ;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
} > SRAM
. = ALIGN(4);
_end = . ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}

17
flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_MD_NB.ld → flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_BL_sections.ld
View File

@ -1,8 +1,7 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00020000
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
}
/* Stub out these functions since we don't use them anyway */
PROVIDE ( vPortSVCHandler = 0 ) ;
PROVIDE ( xPortPendSVHandler = 0 ) ;
PROVIDE ( xPortSysTickHandler = 0 ) ;
_estack = 0x20004FF0;
@ -15,17 +14,17 @@ SECTIONS
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
} > FLASH
} > BL_FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
} > BL_FLASH
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
} > BL_FLASH
. = ALIGN(4);
_etext = .;
@ -51,4 +50,4 @@ SECTIONS
. = ALIGN(4);
_end = . ;
}
}

6
flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld Normal file
View File

@ -0,0 +1,6 @@
MEMORY
{
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 12K
FLASH (rx) : ORIGIN = 0x08000000 + 12K, LENGTH = 128K - 12K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
}

8
flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_MD_BL.ld → flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld
View File

@ -1,9 +1,3 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 116K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
}
/* Stub out these functions since we don't use them anyway */
PROVIDE ( vPortSVCHandler = 0 ) ;
PROVIDE ( xPortPendSVHandler = 0 ) ;
@ -56,4 +50,4 @@ SECTIONS
. = ALIGN(4);
_end = . ;
}
}

52
flight/PiOS/STM32F10x/link_STM3210E_OP_HD_NB.ld → flight/PiOS/STM32F10x/link_STM3210E_OP_BL_sections.ld
View File

@ -1,41 +1,3 @@
/**
******************************************************************************
*
* @file link_stm32f10x_HD_NB.ld
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2009.
* @brief PiOS linker for the OpenPilot board
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/* Memory Spaces Definitions */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
}
/* This is the size of the stack for early init and for all FreeRTOS IRQs */
_irq_stack_size = 0x400;
@ -59,10 +21,10 @@ PROVIDE ( HardFault_Handler = 0 ) ;
PROVIDE ( MemManage_Handler = 0 ) ;
PROVIDE ( BusFault_Handler = 0 ) ;
PROVIDE ( UsageFault_Handler = 0 ) ;
PROVIDE ( SVC_Handler = 0 ) ;
PROVIDE ( vPortSVCHandler = 0 ) ;
PROVIDE ( DebugMon_Handler = 0 ) ;
PROVIDE ( PendSV_Handler = 0 ) ;
PROVIDE ( SysTick_Handler = 0 ) ;
PROVIDE ( xPortPendSVHandler = 0 ) ;
PROVIDE ( xPortSysTickHandler = 0 ) ;
PROVIDE ( WWDG_IRQHandler = 0 ) ;
PROVIDE ( PVD_IRQHandler = 0 ) ;
@ -207,7 +169,7 @@ SECTIONS
{
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
} > BL_FLASH
/* for some STRx devices, the beginning of the startup code is stored in the .flashtext section, which goes to FLASH */
.flashtext :
@ -215,7 +177,7 @@ SECTIONS
. = ALIGN(4);
*(.flashtext) /* Startup code */
. = ALIGN(4);
} >FLASH
} > BL_FLASH
/* init sections */
@ -226,7 +188,7 @@ SECTIONS
KEEP(*(.initcalluavobj.init))
. = ALIGN(4);
__uavobj_initcall_end = .;
} >FLASH
} > BL_FLASH
/* the program code is stored in the .text section, which goes to Flash */
.text :
@ -244,7 +206,7 @@ SECTIONS
_etext = .;
/* This is used by the startup in order to initialize the .data secion */
_sidata = _etext;
} >FLASH
} > BL_FLASH
/*

11
flight/PiOS/STM32F10x/link_STM3210E_OP_memory.ld Normal file
View File

@ -0,0 +1,11 @@
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 20K
FLASH (rx) : ORIGIN = 0x08000000 + 20K, LENGTH = 512K - 20K
FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
}

38
flight/PiOS/STM32F10x/link_STM3210E_OP_HD_BL.ld → flight/PiOS/STM32F10x/link_STM3210E_OP_sections.ld
View File

@ -1,41 +1,3 @@
/**
******************************************************************************
*
* @file link_stm32f10x_HD_BL.ld
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2009.
* @brief PiOS linker for the OpenPilot board
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/* Memory Spaces Definitions */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
FLASH (rx) : ORIGIN = 0x08005000, LENGTH = 492K
FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
}
/* This is the size of the stack for early init and for all FreeRTOS IRQs */
_irq_stack_size = 0x400;

34
flight/PiOS/STM32F10x/link_stm32f10x_MD.ld
View File

@ -51,4 +51,38 @@ SECTIONS
. = ALIGN(4);
_end = . ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}

28
flight/PipXtreme/Makefile
View File

@ -29,9 +29,6 @@ include $(TOP)/make/firmware-defs.mk
# Debugging (YES/NO) ?
DEBUG ?= NO
# Is this code a bootloader (YES/NO) ?
USE_BOOTLOADER ?= NO
# Use Code Sourcery toolchain (YES/NO) ?
CODE_SOURCERY ?= YES
@ -56,11 +53,6 @@ BOARD = STM32103CB_PIPXTREME
#CHIP = STM32F103C8T
#BOARD = STM32103C8_PIPXTREME
MODEL = MD
ifeq ($(USE_BOOTLOADER), YES)
BOOT_MODEL = $(MODEL)_BL
else
BOOT_MODEL = $(MODEL)_NB
endif
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
OUTDIR = $(TOP)/build/pipxtreme
@ -265,9 +257,7 @@ DEBUGF = dwarf-2
CDEFS = -DSTM32F10X_$(MODEL)
CDEFS += -DUSE_STDPERIPH_DRIVER
CDEFS += -DUSE_$(BOARD)
ifeq ($(USE_BOOTLOADER), YES)
CDEFS += -DUSE_BOOTLOADER
endif
# Place project-specific -D and/or -U options for
# Assembler with preprocessor here.
@ -347,13 +337,14 @@ LDFLAGS += $(MATH_LIB)
LDFLAGS += -lc -lgcc
# Set linker-script name depending on selected submodel name
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_$(BOARD)_$(BOOT_MODEL).ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld
LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_sections.ld
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).bin
# Program
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE) 0x08003000 bin"
# Verify
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE) 0x08003000 bin"
# reset target
OOCD_CL+=-c "reset run"
# terminate OOCD after programming
@ -395,19 +386,12 @@ endif
endif
# Program the device.
ifeq ($(USE_BOOTLOADER), YES)
# Program the device with OP Upload Tool".
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OP Upload Tool${quote}
../../ground/src/experimental/upload-build-desktop/debug/OPUploadTool -d 1 -p $(OUTDIR)/$(TARGET).bin
else
ifeq ($(FLASH_TOOL),OPENOCD)
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
program: $(OUTDIR)/$(TARGET).elf
program: $(OUTDIR)/$(TARGET).bin
@echo ${quote}Programming with OPENOCD${quote}
$(OOCD_EXE) $(OOCD_CL)
endif
endif
# Link: create ELF output file from object files.
$(eval $(call LINK_TEMPLATE, $(OUTDIR)/$(TARGET).elf, $(ALLOBJ)))

8
make/firmware-defs.mk
View File

@ -162,10 +162,9 @@ $($(1):.c=.s) : %.s : %.c
endef
# ---------------------------------------------------------------------------
# # Options for OpenOCD flash-programming
# Options for OpenOCD flash-programming
# see openocd.pdf/openocd.texi for further information
# #
# OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
# if OpenOCD is in the $PATH just set OPENOCDEXE=openocd
OOCD_EXE=openocd
# debug level
@ -180,6 +179,3 @@ OOCD_CL+=-c init
OOCD_CL+=-c targets
# commands to prepare flash-write
OOCD_CL+= -c "reset halt"
# flash erase
OOCD_CL+=-c "stm32x mass_erase 0"
# flash-write