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OP-378 INS: Continue getting F2 INS to compile
This commit is contained in:
James Cotton
parent
558bdddeaf
commit
479ba7c21f
@ -574,7 +574,7 @@ WARN_LOGFILE =
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# directories like "/usr/src/myproject". Separate the files or directories
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# with spaces.
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INPUT = OpenPilot PiOS PiOS/STM32F10x
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INPUT = OpenPilot PiOS PiOS/STM32F10x PiOS/STM32F2xx
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# This tag can be used to specify the character encoding of the source files
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# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
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@ -1,26 +1,26 @@
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#####
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# Project: OpenPilot INS
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#
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#
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# Makefile for OpenPilot INS project
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#
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# The OpenPilot Team, http://www.openpilot.org, Copyright (C) 2011.
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#
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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# for more details.
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#
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# You should have received a copy of the GNU General Public License along
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# with this program; if not, write to the Free Software Foundation, Inc.,
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# 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#####
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#####
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# Project: OpenPilot INS
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#
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#
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# Makefile for OpenPilot INS project
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#
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# The OpenPilot Team, http://www.openpilot.org, Copyright (C) 2009.
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#
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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# for more details.
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#
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# You should have received a copy of the GNU General Public License along
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# with this program; if not, write to the Free Software Foundation, Inc.,
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# 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#####
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WHEREAMI := $(dir $(lastword $(MAKEFILE_LIST)))
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TOP := $(realpath $(WHEREAMI)/../../)
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@ -55,13 +55,12 @@ PIOS = ../PiOS
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PIOSINC = $(PIOS)/inc
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FLIGHTLIB = ../Libraries
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FLIGHTLIBINC = ../Libraries/inc
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PIOSSTM32F10X = $(PIOS)/STM32F10x
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PIOSSTM32FXX = $(PIOS)/STM32F2xx
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PIOSCOMMON = $(PIOS)/Common
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PIOSBOARDS = $(PIOS)/Boards
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APPLIBDIR = $(PIOSSTM32F10X)/Libraries
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APPLIBDIR = $(PIOSSTM32FXX)/Libraries
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STMLIBDIR = $(APPLIBDIR)
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STMSPDDIR = $(STMLIBDIR)/STM32F10x_StdPeriph_Driver
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STMUSBDIR = $(STMLIBDIR)/STM32_USB-FS-Device_Driver
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STMSPDDIR = $(STMLIBDIR)/STM32F2xx_StdPeriph_Driver
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STMSPDSRCDIR = $(STMSPDDIR)/src
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STMSPDINCDIR = $(STMSPDDIR)/inc
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CMSISDIR = $(STMLIBDIR)/CMSIS/Core/CM3
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@ -80,7 +79,6 @@ OPUAVSYNTHDIR = $(OUTDIR)/../uavobject-synthetics/flight
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## INS:
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SRC = ins.c
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SRC += pios_board.c
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SRC += ahrs_timer.c
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SRC += insgps13state.c
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SRC += $(FLIGHTLIB)/CoordinateConversions.c
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SRC += $(FLIGHTLIB)/fifo_buffer.c
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@ -91,16 +89,16 @@ SRC += $(BOOT)/ahrs_slave_test.c
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SRC += $(BOOT)/ahrs_spi_program.c
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## PIOS Hardware (STM32F10x)
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SRC += $(PIOSSTM32F10X)/pios_sys.c
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SRC += $(PIOSSTM32F10X)/pios_led.c
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SRC += $(PIOSSTM32F10X)/pios_delay.c
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SRC += $(PIOSSTM32F10X)/pios_usart.c
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SRC += $(PIOSSTM32F10X)/pios_irq.c
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SRC += $(PIOSSTM32F10X)/pios_i2c.c
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SRC += $(PIOSSTM32F10X)/pios_debug.c
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SRC += $(PIOSSTM32F10X)/pios_gpio.c
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SRC += $(PIOSSTM32F10X)/pios_spi.c
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SRC += $(PIOSSTM32F10X)/pios_exti.c
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SRC += $(PIOSSTM32FXX)/pios_sys.c
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SRC += $(PIOSSTM32FXX)/pios_led.c
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SRC += $(PIOSSTM32FXX)/pios_delay.c
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SRC += $(PIOSSTM32FXX)/pios_usart.c
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SRC += $(PIOSSTM32FXX)/pios_irq.c
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SRC += $(PIOSSTM32FXX)/pios_i2c.c
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SRC += $(PIOSSTM32FXX)/pios_debug.c
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SRC += $(PIOSSTM32FXX)/pios_gpio.c
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SRC += $(PIOSSTM32FXX)/pios_spi.c
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SRC += $(PIOSSTM32FXX)/pios_exti.c
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## PIOS Hardware (Common)
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SRC += $(PIOSCOMMON)/pios_com.c
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@ -114,26 +112,24 @@ SRC += $(PIOSCOMMON)/pios_bl_helper.c
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## CMSIS for STM32
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SRC += $(CMSISDIR)/core_cm3.c
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SRC += $(CMSISDIR)/system_stm32f10x.c
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SRC += $(CMSISDIR)/system_stm32f2xx.c
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## Used parts of the STM-Library
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SRC += $(STMSPDSRCDIR)/stm32f10x_adc.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_bkp.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_crc.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_dac.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_dma.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_exti.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_flash.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_gpio.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_i2c.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_pwr.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_rcc.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_rtc.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_spi.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_tim.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_usart.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_adc.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_crc.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_dac.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_dma.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_exti.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_flash.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_gpio.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_i2c.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_pwr.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_rcc.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_rtc.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_spi.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_tim.c
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SRC += $(STMSPDSRCDIR)/stm32f2xx_usart.c
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SRC += $(STMSPDSRCDIR)/misc.c
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# List C source files here which must be compiled in ARM-Mode (no -mthumb).
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# use file-extension c for "c-only"-files
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## just for testing, timer.c could be compiled in thumb-mode too
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@ -155,7 +151,7 @@ CPPSRCARM =
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# Even though the DOS/Win* filesystem matches both .s and .S the same,
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# it will preserve the spelling of the filenames, and gcc itself does
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# care about how the name is spelled on its command-line.
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ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL)$(MODEL_SUFFIX).S
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ASRC = $(PIOSSTM32FXX)/startup_stm32f2xx.S
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# List Assembler source files here which must be assembled in ARM-Mode..
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ASRCARM =
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@ -165,7 +161,7 @@ ASRCARM =
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EXTRAINCDIRS += $(PIOS)
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EXTRAINCDIRS += $(PIOSINC)
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EXTRAINCDIRS += $(FLIGHTLIBINC)
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EXTRAINCDIRS += $(PIOSSTM32F10X)
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EXTRAINCDIRS += $(PIOSSTM32FXX)
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EXTRAINCDIRS += $(PIOSCOMMON)
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EXTRAINCDIRS += $(PIOSBOARDS)
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EXTRAINCDIRS += $(STMSPDINCDIR)
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@ -202,6 +198,8 @@ else
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CFLAGS += -Os
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endif
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CFLAGS += -DHSE_VALUE=$(OSCILLATOR_FREQ)
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# Output format. (can be ihex or binary or both)
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# binary to create a load-image in raw-binary format i.e. for SAM-BA,
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# ihex to create a load-image in Intel hex format
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@ -244,7 +242,6 @@ CSTANDARD = -std=gnu99
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#
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# Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
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CFLAGS += -g$(DEBUGF)
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CFLAGS += -ffast-math
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@ -359,7 +356,7 @@ $(OUTDIR)/$(TARGET).bin.o: $(OUTDIR)/$(TARGET).bin
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$(eval $(call OPFW_TEMPLATE,$(OUTDIR)/$(TARGET).bin,$(BOARD_TYPE),$(BOARD_REVISION)))
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# Add jtag targets (program and wipe)
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$(eval $(call JTAG_TEMPLATE,$(OUTDIR)/$(TARGET).bin,$(FW_BANK_BASE),$(FW_BANK_SIZE)))
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$(eval $(call JTAG_TEMPLATE_F2X,$(OUTDIR)/$(TARGET).bin,$(FW_BANK_BASE),$(FW_BANK_SIZE)))
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.PHONY: elf lss sym hex bin bino opfw
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elf: $(OUTDIR)/$(TARGET).elf
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@ -398,7 +395,7 @@ clean_list :
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$(V1) $(REMOVE) $(OUTDIR)/$(TARGET).bin
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$(V1) $(REMOVE) $(OUTDIR)/$(TARGET).sym
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$(V1) $(REMOVE) $(OUTDIR)/$(TARGET).lss
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$(V1) $(REMOVE) $(OUTDIR)/$(TARGET).bin.o
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$(V1) $(REMOVE) $(OUTDIR)/$(TARGET).bin.o
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$(V1) $(REMOVE) $(ALLOBJ)
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$(V1) $(REMOVE) $(LSTFILES)
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$(V1) $(REMOVE) $(DEPFILES)
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@ -1,61 +0,0 @@
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/**
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******************************************************************************
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* @addtogroup AHRS AHRS
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* @brief The AHRS Modules perform
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*
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* @{
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* @addtogroup AHRS_TIMER AHRS Timer
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* @brief Sets up a simple timer that can be polled to estimate idle time
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* @{
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*
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*
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* @file ahrs.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @brief INSGPS Test Program
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "ahrs_timer.h"
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void timer_start()
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{
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_BKP | RCC_APB1Periph_PWR,
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ENABLE);
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PWR_BackupAccessCmd(ENABLE);
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RCC_RTCCLKConfig(RCC_RTCCLKSource_HSE_Div128);
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RCC_RTCCLKCmd(ENABLE);
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RTC_WaitForLastTask();
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RTC_WaitForSynchro();
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RTC_WaitForLastTask();
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RTC_SetPrescaler(0); // counting at 8e6 / 128
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RTC_WaitForLastTask();
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RTC_SetCounter(0);
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RTC_WaitForLastTask();
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}
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uint32_t timer_count()
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{
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return RTC_GetCounter();
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}
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uint32_t timer_rate()
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{
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return TIMER_RATE;
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}
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@ -36,6 +36,8 @@
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#ifndef PIOS_CONFIG_H
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#define PIOS_CONFIG_H
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#define STM32F2XX
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/* Enable/Disable PiOS Modules */
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#define PIOS_INCLUDE_DELAY
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#define PIOS_INCLUDE_I2C
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@ -45,7 +47,7 @@
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#define PIOS_INCLUDE_SYS
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#define PIOS_INCLUDE_USART
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#define PIOS_INCLUDE_COM
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#define PIOS_INCLUDE_COM_AUX
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//#define PIOS_INCLUDE_COM_AUX
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#define PIOS_INCLUDE_GPS
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#define PIOS_INCLUDE_BMA180
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#define PIOS_INCLUDE_HMC5883
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@ -11,8 +11,7 @@
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*
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*
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* @file ins.c
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* @author David "Buzz" Carlson (buzz@chebuzz.com)
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* The OpenPilot Team, http://www.openpilot.org Copyright (C) 2011.
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2011.
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* @brief INSGPS Test Program
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* @see The GNU Public License (GPL) Version 3
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*
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@ -96,8 +95,6 @@ void affine_rotate(float scale[3][4], float rotation[3]);
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void calibration(float result[3], float scale[3][4], float arg[3]);
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/* Bootloader related functions and var*/
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static uint32_t iap_calc_crc(void);
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static void read_description(uint8_t *);
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void firmwareiapobj_callback(AhrsObjHandle obj);
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volatile uint8_t reset_count=0;
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@ -1041,18 +1038,21 @@ void homelocation_callback(AhrsObjHandle obj)
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INSSetMagNorth(Be);
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}
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void firmwareiapobj_callback(AhrsObjHandle obj)
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void firmwareiapobj_callback(AhrsObjHandle obj)
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{
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#if 0
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const struct pios_board_info * bdinfo = &pios_board_info_blob;
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FirmwareIAPObjData firmwareIAPObj;
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FirmwareIAPObjGet(&firmwareIAPObj);
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if(firmwareIAPObj.ArmReset==0)
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reset_count=0;
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if(firmwareIAPObj.ArmReset==1)
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{
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if((firmwareIAPObj.BoardType==BOARD_TYPE) || (firmwareIAPObj.BoardType==0xFF))
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if((firmwareIAPObj.BoardType==bdinfo->board_type) || (firmwareIAPObj.BoardType==0xFF))
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{
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++reset_count;
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if(reset_count>2)
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{
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@ -1062,36 +1062,16 @@ void firmwareiapobj_callback(AhrsObjHandle obj)
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}
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}
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}
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else if(firmwareIAPObj.BoardType==BOARD_TYPE && firmwareIAPObj.crc!=iap_calc_crc())
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else if(firmwareIAPObj.BoardType==bdinfo->board_type && firmwareIAPObj.crc!=PIOS_BL_HELPER_CRC_Memory_Calc())
|
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{
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read_description(firmwareIAPObj.Description);
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firmwareIAPObj.crc=iap_calc_crc();
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firmwareIAPObj.BoardRevision=BOARD_REVISION;
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PIOS_BL_HELPER_FLASH_Read_Description(firmwareIAPObj.Description,bdinfo->desc_size);
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firmwareIAPObj.crc=PIOS_BL_HELPER_CRC_Memory_Calc();
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firmwareIAPObj.BoardRevision=bdinfo->board_rev;
|
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FirmwareIAPObjSet(&firmwareIAPObj);
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||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static uint32_t iap_calc_crc(void)
|
||||
{
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE);
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CRC_ResetDR();
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||||
CRC_CalcBlockCRC((uint32_t *) START_OF_USER_CODE, (SIZE_OF_CODE) >> 2);
|
||||
return CRC_GetCRC();
|
||||
}
|
||||
|
||||
static uint8_t *FLASH_If_Read(uint32_t SectorAddress)
|
||||
{
|
||||
return (uint8_t *) (SectorAddress);
|
||||
}
|
||||
|
||||
static void read_description(uint8_t * array)
|
||||
{
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||||
uint8_t x = 0;
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||||
for (uint32_t i = START_OF_USER_CODE + SIZE_OF_CODE; i < START_OF_USER_CODE + SIZE_OF_CODE + SIZE_OF_DESCRIPTION; ++i) {
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||||
array[x] = *FLASH_If_Read(i);
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||||
++x;
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||||
}
|
||||
}
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||||
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||||
/**
|
||||
* @}
|
||||
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||||
@ -47,100 +47,106 @@ void DMA1_Channel4_IRQHandler() __attribute__ ((alias("PIOS_SPI_op_irq_handler")
|
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static const struct pios_spi_cfg pios_spi_op_cfg = {
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||||
.regs = SPI2,
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||||
.init = {
|
||||
.SPI_Mode = SPI_Mode_Slave,
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||||
.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
|
||||
.SPI_DataSize = SPI_DataSize_8b,
|
||||
.SPI_NSS = SPI_NSS_Hard,
|
||||
.SPI_FirstBit = SPI_FirstBit_MSB,
|
||||
.SPI_CRCPolynomial = 7,
|
||||
.SPI_CPOL = SPI_CPOL_High,
|
||||
.SPI_CPHA = SPI_CPHA_2Edge,
|
||||
},
|
||||
.use_crc = TRUE,
|
||||
.SPI_Mode = SPI_Mode_Slave,
|
||||
.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
|
||||
.SPI_DataSize = SPI_DataSize_8b,
|
||||
.SPI_NSS = SPI_NSS_Hard,
|
||||
.SPI_FirstBit = SPI_FirstBit_MSB,
|
||||
.SPI_CRCPolynomial = 7,
|
||||
.SPI_CPOL = SPI_CPOL_High,
|
||||
.SPI_CPHA = SPI_CPHA_2Edge,
|
||||
},
|
||||
.use_crc = true,
|
||||
.dma = {
|
||||
.ahb_clk = RCC_AHBPeriph_DMA1,
|
||||
|
||||
.ahb_clk = RCC_AHB1Periph_DMA1,
|
||||
|
||||
.irq = {
|
||||
.flags =
|
||||
(DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 |
|
||||
DMA1_FLAG_GL4),
|
||||
.flags = (DMA_IT_TCIF3 | DMA_IT_TEIF3 | DMA_IT_HTIF3),
|
||||
.init = {
|
||||
.NVIC_IRQChannel = DMA1_Channel4_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
.NVIC_IRQChannel = DMA1_Stream0_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
|
||||
.rx = {
|
||||
.channel = DMA1_Channel4,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr =
|
||||
(uint32_t) & (SPI2->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralSRC,
|
||||
.DMA_PeripheralInc =
|
||||
DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize =
|
||||
DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize =
|
||||
DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.channel = DMA1_Channel5,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr =
|
||||
(uint32_t) & (SPI2->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralDST,
|
||||
.DMA_PeripheralInc =
|
||||
DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize =
|
||||
DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize =
|
||||
DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
},
|
||||
.ssel = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_12,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
},
|
||||
|
||||
.rx = {
|
||||
.channel = DMA1_Stream0,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t) & (SPI2->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralToMemory,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
//TODO: Enable FIFO
|
||||
.DMA_FIFOMode = DMA_FIFOMode_Disable,
|
||||
/* .DMA_FIFOThreshold */
|
||||
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
|
||||
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.channel = DMA1_Stream5,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t) & (SPI2->DR),
|
||||
.DMA_DIR = DMA_DIR_MemoryToPeripheral,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_FIFOMode = DMA_FIFOMode_Disable,
|
||||
/* .DMA_FIFOThreshold */
|
||||
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
|
||||
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
|
||||
},
|
||||
},
|
||||
},
|
||||
.sclk = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_13,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
},
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_13,
|
||||
.GPIO_Speed = GPIO_Speed_100MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_OD,
|
||||
.GPIO_PuPd = GPIO_PuPd_NOPULL
|
||||
},
|
||||
},
|
||||
.miso = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_14,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_14,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_NOPULL
|
||||
},
|
||||
},
|
||||
.mosi = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_15,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
},
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_15,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_OD,
|
||||
.GPIO_PuPd = GPIO_PuPd_NOPULL
|
||||
},
|
||||
},
|
||||
.slave_count = 1,
|
||||
.ssel = { {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_12,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
} },
|
||||
};
|
||||
|
||||
uint32_t pios_spi_op_id;
|
||||
@ -159,97 +165,112 @@ void DMA1_Channel3_IRQHandler() __attribute__ ((alias("PIOS_SPI_accel_irq_handle
|
||||
static const struct pios_spi_cfg pios_spi_accel_cfg = {
|
||||
.regs = SPI1,
|
||||
.init = {
|
||||
.SPI_Mode = SPI_Mode_Master,
|
||||
.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
|
||||
.SPI_DataSize = SPI_DataSize_8b,
|
||||
.SPI_NSS = SPI_NSS_Soft,
|
||||
.SPI_FirstBit = SPI_FirstBit_MSB,
|
||||
.SPI_CRCPolynomial = 7,
|
||||
.SPI_CPOL = SPI_CPOL_High,
|
||||
.SPI_CPHA = SPI_CPHA_2Edge,
|
||||
.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_128,
|
||||
.SPI_Mode = SPI_Mode_Master,
|
||||
.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
|
||||
.SPI_DataSize = SPI_DataSize_8b,
|
||||
.SPI_NSS = SPI_NSS_Soft,
|
||||
.SPI_FirstBit = SPI_FirstBit_MSB,
|
||||
.SPI_CRCPolynomial = 7,
|
||||
.SPI_CPOL = SPI_CPOL_High,
|
||||
.SPI_CPHA = SPI_CPHA_2Edge,
|
||||
.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_128,
|
||||
},
|
||||
.use_crc = FALSE,
|
||||
.use_crc = false,
|
||||
.dma = {
|
||||
.ahb_clk = RCC_AHBPeriph_DMA1,
|
||||
|
||||
.irq = {
|
||||
.flags = (DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_HT2 | DMA1_FLAG_GL2),
|
||||
.init = {
|
||||
.NVIC_IRQChannel = DMA1_Channel2_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
.ahb_clk = RCC_AHB1Periph_DMA1,
|
||||
|
||||
.irq = {
|
||||
.flags = (DMA_IT_TCIF3 | DMA_IT_TEIF3 | DMA_IT_HTIF3),
|
||||
.init = {
|
||||
.NVIC_IRQChannel = DMA1_Stream0_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
|
||||
.rx = {
|
||||
.channel = DMA1_Channel2,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralSRC,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
|
||||
.rx = {
|
||||
.channel = DMA1_Stream2,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralToMemory,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_FIFOMode = DMA_FIFOMode_Disable,
|
||||
/* .DMA_FIFOThreshold */
|
||||
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
|
||||
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
|
||||
},
|
||||
.tx = {
|
||||
.channel = DMA1_Channel3,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralDST,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_High,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
},
|
||||
.ssel = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_4,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_Out_PP,
|
||||
},
|
||||
.tx = {
|
||||
.channel = DMA1_Stream3,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR),
|
||||
.DMA_DIR = DMA_DIR_MemoryToPeripheral,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_High,
|
||||
.DMA_FIFOMode = DMA_FIFOMode_Disable,
|
||||
/* .DMA_FIFOThreshold */
|
||||
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
|
||||
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
|
||||
},
|
||||
},
|
||||
},
|
||||
.sclk = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_5,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_5,
|
||||
.GPIO_Speed = GPIO_Speed_100MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
},
|
||||
.miso = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_6,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_6,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
},
|
||||
.mosi = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_7,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_7,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
},
|
||||
.slave_count = 1,
|
||||
.ssel = { {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_4,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_OUT,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
} },
|
||||
};
|
||||
|
||||
static uint32_t pios_spi_accel_id;
|
||||
void PIOS_SPI_accel_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
PIOS_SPI_IRQ_Handler(pios_spi_accel_id);
|
||||
}
|
||||
|
||||
@ -266,38 +287,42 @@ void PIOS_SPI_accel_irq_handler(void)
|
||||
static const struct pios_usart_cfg pios_usart_gps_cfg = {
|
||||
.regs = USART1,
|
||||
.init = {
|
||||
.USART_BaudRate = 57600,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl =
|
||||
USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx,
|
||||
},
|
||||
.USART_BaudRate = 57600,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl =
|
||||
USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx,
|
||||
},
|
||||
.irq = {
|
||||
.init = {
|
||||
.NVIC_IRQChannel = USART1_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
.NVIC_IRQChannel = USART1_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.rx = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IPU,
|
||||
},
|
||||
},
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_9,
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_9,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
#endif /* PIOS_INCLUDE_GPS */
|
||||
@ -309,38 +334,42 @@ static const struct pios_usart_cfg pios_usart_gps_cfg = {
|
||||
static const struct pios_usart_cfg pios_usart_aux_cfg = {
|
||||
.regs = USART4,
|
||||
.init = {
|
||||
.USART_BaudRate = 57600,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl =
|
||||
USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx,
|
||||
},
|
||||
.USART_BaudRate = 57600,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl =
|
||||
USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx,
|
||||
},
|
||||
.irq = {
|
||||
.init = {
|
||||
.NVIC_IRQChannel = USART4_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
.NVIC_IRQChannel = USART4_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.rx = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_11,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IPU,
|
||||
},
|
||||
},
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_OType = GPIO_OType_PP,
|
||||
.GPIO_PuPd = GPIO_PuPd_UP
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
#endif /* PIOS_COM_AUX */
|
||||
@ -372,55 +401,59 @@ static uint8_t pios_com_gps_rx_buffer[PIOS_COM_GPS_RX_BUF_LEN];
|
||||
void PIOS_I2C_pres_mag_adapter_ev_irq_handler(void);
|
||||
void PIOS_I2C_pres_mag_adapter_er_irq_handler(void);
|
||||
void I2C1_EV_IRQHandler()
|
||||
__attribute__ ((alias("PIOS_I2C_pres_mag_adapter_ev_irq_handler")));
|
||||
__attribute__ ((alias("PIOS_I2C_pres_mag_adapter_ev_irq_handler")));
|
||||
void I2C1_ER_IRQHandler()
|
||||
__attribute__ ((alias("PIOS_I2C_pres_mag_adapter_er_irq_handler")));
|
||||
__attribute__ ((alias("PIOS_I2C_pres_mag_adapter_er_irq_handler")));
|
||||
|
||||
static const struct pios_i2c_adapter_cfg pios_i2c_pres_mag_adapter_cfg = {
|
||||
.regs = I2C1,
|
||||
.init = {
|
||||
.I2C_Mode = I2C_Mode_I2C,
|
||||
.I2C_OwnAddress1 = 0,
|
||||
.I2C_Ack = I2C_Ack_Enable,
|
||||
.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit,
|
||||
.I2C_DutyCycle = I2C_DutyCycle_2,
|
||||
.I2C_ClockSpeed = 200000, /* bits/s */
|
||||
},
|
||||
.I2C_Mode = I2C_Mode_I2C,
|
||||
.I2C_OwnAddress1 = 0,
|
||||
.I2C_Ack = I2C_Ack_Enable,
|
||||
.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit,
|
||||
.I2C_DutyCycle = I2C_DutyCycle_2,
|
||||
.I2C_ClockSpeed = 400000, /* bits/s */
|
||||
},
|
||||
.transfer_timeout_ms = 50,
|
||||
.scl = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_6,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_OD,
|
||||
},
|
||||
.GPIO_Pin = GPIO_Pin_6,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_OType = GPIO_OType_OD,
|
||||
.GPIO_PuPd = GPIO_PuPd_NOPULL,
|
||||
},
|
||||
},
|
||||
.sda = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_7,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_OD,
|
||||
},
|
||||
.GPIO_Pin = GPIO_Pin_7,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_OType = GPIO_OType_OD,
|
||||
.GPIO_PuPd = GPIO_PuPd_NOPULL,
|
||||
},
|
||||
},
|
||||
.event = {
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C1_EV_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C1_EV_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.error = {
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C1_ER_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C1_ER_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
uint32_t pios_i2c_pres_mag_adapter_id;
|
||||
@ -443,50 +476,54 @@ void I2C2_EV_IRQHandler() __attribute__ ((alias ("PIOS_I2C_gyro_adapter_ev_irq_h
|
||||
void I2C2_ER_IRQHandler() __attribute__ ((alias ("PIOS_I2C_gyro_adapter_er_irq_handler")));
|
||||
|
||||
static const struct pios_i2c_adapter_cfg pios_i2c_gyro_adapter_cfg = {
|
||||
.regs = I2C2,
|
||||
.init = {
|
||||
.I2C_Mode = I2C_Mode_I2C,
|
||||
.I2C_OwnAddress1 = 0,
|
||||
.I2C_Ack = I2C_Ack_Enable,
|
||||
.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit,
|
||||
.I2C_DutyCycle = I2C_DutyCycle_2,
|
||||
.I2C_ClockSpeed = 400000, /* bits/s */
|
||||
},
|
||||
.transfer_timeout_ms = 50,
|
||||
.scl = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_OD,
|
||||
},
|
||||
},
|
||||
.sda = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_11,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_OD,
|
||||
},
|
||||
},
|
||||
.event = {
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C2_EV_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.error = {
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C2_ER_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.regs = I2C2,
|
||||
.init = {
|
||||
.I2C_Mode = I2C_Mode_I2C,
|
||||
.I2C_OwnAddress1 = 0,
|
||||
.I2C_Ack = I2C_Ack_Enable,
|
||||
.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit,
|
||||
.I2C_DutyCycle = I2C_DutyCycle_2,
|
||||
.I2C_ClockSpeed = 400000, /* bits/s */
|
||||
},
|
||||
.transfer_timeout_ms = 50,
|
||||
.scl = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_OType = GPIO_OType_OD,
|
||||
.GPIO_PuPd = GPIO_PuPd_NOPULL,
|
||||
},
|
||||
},
|
||||
.sda = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_11,
|
||||
.GPIO_Mode = GPIO_Mode_AF,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_OType = GPIO_OType_OD,
|
||||
.GPIO_PuPd = GPIO_PuPd_NOPULL,
|
||||
},
|
||||
},
|
||||
.event = {
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C2_EV_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.error = {
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C2_ER_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
uint32_t pios_i2c_gyro_adapter_id;
|
||||
@ -498,8 +535,8 @@ void PIOS_I2C_gyro_adapter_ev_irq_handler(void)
|
||||
|
||||
void PIOS_I2C_gyro_adapter_er_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
PIOS_I2C_ER_IRQ_Handler(pios_i2c_gyro_adapter_id);
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
PIOS_I2C_ER_IRQ_Handler(pios_i2c_gyro_adapter_id);
|
||||
}
|
||||
|
||||
#endif /* PIOS_INCLUDE_I2C */
|
||||
@ -519,13 +556,13 @@ uint32_t pios_com_gps_id;
|
||||
void PIOS_Board_Init(void) {
|
||||
/* Brings up System using CMSIS functions, enables the LEDs. */
|
||||
PIOS_SYS_Init();
|
||||
|
||||
|
||||
/* Delay system */
|
||||
PIOS_DELAY_Init();
|
||||
|
||||
|
||||
/* IAP System Setup */
|
||||
PIOS_IAP_Init();
|
||||
|
||||
|
||||
#if defined(PIOS_INCLUDE_COM)
|
||||
#if defined(PIOS_INCLUDE_GPS)
|
||||
uint32_t pios_usart_gps_id;
|
||||
@ -533,12 +570,12 @@ void PIOS_Board_Init(void) {
|
||||
PIOS_DEBUG_Assert(0);
|
||||
}
|
||||
if (PIOS_COM_Init(&pios_com_gps_id, &pios_usart_com_driver, pios_usart_gps_id,
|
||||
pios_com_gps_rx_buffer, sizeof(pios_com_gps_rx_buffer),
|
||||
NULL, 0)) {
|
||||
pios_com_gps_rx_buffer, sizeof(pios_com_gps_rx_buffer),
|
||||
NULL, 0)) {
|
||||
PIOS_DEBUG_Assert(0);
|
||||
}
|
||||
#endif /* PIOS_INCLUDE_GPS */
|
||||
|
||||
|
||||
#if defined(PIOS_INCLUDE_COM_AUX)
|
||||
if (PIOS_USART_Init(&pios_usart_aux_id, &pios_usart_aux_cfg)) {
|
||||
PIOS_DEBUG_Assert(0);
|
||||
@ -548,7 +585,7 @@ void PIOS_Board_Init(void) {
|
||||
}
|
||||
#endif /* PIOS_INCLUDE_COM_AUX */
|
||||
#endif /* PIOS_INCLUDE_COM */
|
||||
|
||||
|
||||
#if defined (PIOS_INCLUDE_I2C)
|
||||
if (PIOS_I2C_Init(&pios_i2c_pres_mag_adapter_id, &pios_i2c_pres_mag_adapter_cfg)) {
|
||||
PIOS_DEBUG_Assert(0);
|
||||
@ -559,7 +596,7 @@ void PIOS_Board_Init(void) {
|
||||
#if defined (PIOS_INCLUDE_HMC5883)
|
||||
PIOS_HMC5883_Init();
|
||||
#endif /* PIOS_INCLUDE_HMC5883 */
|
||||
|
||||
|
||||
#if defined(PIOS_INCLUDE_IMU3000)
|
||||
if (PIOS_I2C_Init(&pios_i2c_gyro_adapter_id, &pios_i2c_gyro_adapter_cfg)) {
|
||||
PIOS_DEBUG_Assert(0);
|
||||
@ -567,24 +604,24 @@ void PIOS_Board_Init(void) {
|
||||
PIOS_IMU3000_Init();
|
||||
#endif /* PIOS_INCLUDE_IMU3000 */
|
||||
#endif /* PIOS_INCLUDE_I2C */
|
||||
|
||||
|
||||
#if defined(PIOS_INCLUDE_SPI)
|
||||
/* Set up the SPI interface to the accelerometer*/
|
||||
if (PIOS_SPI_Init(&pios_spi_accel_id, &pios_spi_accel_cfg)) {
|
||||
PIOS_DEBUG_Assert(0);
|
||||
}
|
||||
|
||||
|
||||
PIOS_BMA180_Attach(pios_spi_accel_id);
|
||||
PIOS_BMA180_Init();
|
||||
|
||||
|
||||
|
||||
|
||||
/* Set up the SPI interface to the OP board */
|
||||
#include "ahrs_spi_comm.h"
|
||||
#include "ahrs_spi_comm.h"
|
||||
AhrsInitComms();
|
||||
if (PIOS_SPI_Init(&pios_spi_op_id, &pios_spi_op_cfg)) {
|
||||
PIOS_DEBUG_Assert(0);
|
||||
}
|
||||
|
||||
|
||||
AhrsConnect(pios_spi_op_id);
|
||||
#endif /* PIOS_INCLUDE_SPI */
|
||||
}
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
#ifndef _FIFO_BUFFER_H_
|
||||
#define _FIFO_BUFFER_H_
|
||||
|
||||
#include "stm32f10x.h"
|
||||
#include "pios.h"
|
||||
|
||||
// *********************
|
||||
|
||||
|
||||
@ -141,7 +141,7 @@ extern uint32_t pios_com_aux_id;
|
||||
//-------------------------
|
||||
// System Settings
|
||||
//-------------------------
|
||||
#define PIOS_MASTER_CLOCK 72000000
|
||||
#define PIOS_MASTER_CLOCK 120000000
|
||||
#define PIOS_PERIPHERAL_CLOCK (PIOS_MASTER_CLOCK / 2)
|
||||
|
||||
//-------------------------
|
||||
|
||||
@ -35,6 +35,21 @@
|
||||
#include <pios.h>
|
||||
#include <pios_stm32.h>
|
||||
|
||||
/* XXX these two should be reconciled - separate for now to avoid breaking other targets */
|
||||
#ifdef STM32F2XX
|
||||
struct pios_spi_cfg {
|
||||
SPI_TypeDef *regs;
|
||||
uint32_t remap; /* GPIO_Remap_* or GPIO_AF_* */
|
||||
SPI_InitTypeDef init;
|
||||
bool use_crc;
|
||||
struct stm32_dma dma;
|
||||
struct stm32_gpio sclk;
|
||||
struct stm32_gpio miso;
|
||||
struct stm32_gpio mosi;
|
||||
uint32_t slave_count;
|
||||
struct stm32_gpio ssel[];
|
||||
};
|
||||
#else
|
||||
struct pios_spi_cfg {
|
||||
SPI_TypeDef *regs;
|
||||
SPI_InitTypeDef init;
|
||||
@ -45,6 +60,7 @@ struct pios_spi_cfg {
|
||||
struct stm32_gpio miso;
|
||||
struct stm32_gpio mosi;
|
||||
};
|
||||
#endif
|
||||
|
||||
struct pios_spi_dev {
|
||||
const struct pios_spi_cfg * cfg;
|
||||
|
||||
@ -242,6 +242,16 @@
|
||||
6560A3AD13EE2E8B00105DA5 /* main.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = main.c; path = INS/main.c; sourceTree = "<group>"; };
|
||||
6560A3AE13EE2E8B00105DA5 /* Makefile */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.make; name = Makefile; path = INS/Makefile; sourceTree = "<group>"; };
|
||||
6560A3AF13EE2E8B00105DA5 /* pios_board.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = pios_board.c; path = INS/pios_board.c; sourceTree = "<group>"; };
|
||||
6560A3B313EE2FCB00105DA5 /* ahrs_timer.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ahrs_timer.h; sourceTree = "<group>"; };
|
||||
6560A3B413EE2FCB00105DA5 /* ins.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ins.h; sourceTree = "<group>"; };
|
||||
6560A3B513EE2FCB00105DA5 /* ins_fsm.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ins_fsm.h; sourceTree = "<group>"; };
|
||||
6560A3B613EE2FCB00105DA5 /* insgps.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = insgps.h; sourceTree = "<group>"; };
|
||||
6560A3B713EE2FCB00105DA5 /* pios_config.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_config.h; sourceTree = "<group>"; };
|
||||
6560A3B813EE2FCB00105DA5 /* ins.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = ins.c; sourceTree = "<group>"; };
|
||||
6560A3B913EE2FCB00105DA5 /* insgps13state.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = insgps13state.c; sourceTree = "<group>"; };
|
||||
6560A3BA13EE2FCB00105DA5 /* Makefile */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.make; path = Makefile; sourceTree = "<group>"; };
|
||||
6560A3BB13EE2FCB00105DA5 /* pios_board.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = pios_board.c; sourceTree = "<group>"; };
|
||||
6560A3BC13EE2FCB00105DA5 /* test.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = test.c; sourceTree = "<group>"; };
|
||||
656268C612DC1923007B0A0F /* nedaccel.xml */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text.xml; path = nedaccel.xml; sourceTree = "<group>"; };
|
||||
6562BE1713CCAD0600C823E8 /* pios_rcvr.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = pios_rcvr.c; sourceTree = "<group>"; };
|
||||
65632DF51251650300469B77 /* pios_board.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_board.h; sourceTree = "<group>"; };
|
||||
@ -4008,6 +4018,32 @@
|
||||
path = INS/inc;
|
||||
sourceTree = "<group>";
|
||||
};
|
||||
6560A3B013EE2FCB00105DA5 /* INS */ = {
|
||||
isa = PBXGroup;
|
||||
children = (
|
||||
6560A3B213EE2FCB00105DA5 /* inc */,
|
||||
6560A3B813EE2FCB00105DA5 /* ins.c */,
|
||||
6560A3B913EE2FCB00105DA5 /* insgps13state.c */,
|
||||
6560A3BA13EE2FCB00105DA5 /* Makefile */,
|
||||
6560A3BB13EE2FCB00105DA5 /* pios_board.c */,
|
||||
6560A3BC13EE2FCB00105DA5 /* test.c */,
|
||||
);
|
||||
name = INS;
|
||||
path = ../../INS;
|
||||
sourceTree = "<group>";
|
||||
};
|
||||
6560A3B213EE2FCB00105DA5 /* inc */ = {
|
||||
isa = PBXGroup;
|
||||
children = (
|
||||
6560A3B313EE2FCB00105DA5 /* ahrs_timer.h */,
|
||||
6560A3B413EE2FCB00105DA5 /* ins.h */,
|
||||
6560A3B513EE2FCB00105DA5 /* ins_fsm.h */,
|
||||
6560A3B613EE2FCB00105DA5 /* insgps.h */,
|
||||
6560A3B713EE2FCB00105DA5 /* pios_config.h */,
|
||||
);
|
||||
path = inc;
|
||||
sourceTree = "<group>";
|
||||
};
|
||||
65632DF41251650300469B77 /* Boards */ = {
|
||||
isa = PBXGroup;
|
||||
children = (
|
||||
@ -4023,6 +4059,7 @@
|
||||
657CEEB5121DBC49007A1FBE /* flight */ = {
|
||||
isa = PBXGroup;
|
||||
children = (
|
||||
6560A3B013EE2FCB00105DA5 /* INS */,
|
||||
65FF4BB313791C3300146BE4 /* Bootloaders */,
|
||||
65F93B9012EE09280047DB36 /* PipXtreme */,
|
||||
65B7E6AC120DF1CD000C1123 /* AHRS */,
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user