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Code Issues Releases Activity

OP-378 INS: Continue getting F2 INS to compile

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This commit is contained in:
James Cotton 2011-08-07 19:03:32 -05:00
parent 558bdddeaf
commit 479ba7c21f
10 changed files with 467 additions and 459 deletions
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2
flight/Doc/Doxygen/doxygen.cfg
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@ -574,7 +574,7 @@ WARN_LOGFILE =
# directories like "/usr/src/myproject". Separate the files or directories # directories like "/usr/src/myproject". Separate the files or directories
# with spaces. # with spaces.
INPUT = OpenPilot PiOS PiOS/STM32F10x INPUT = OpenPilot PiOS PiOS/STM32F10x PiOS/STM32F2xx
# This tag can be used to specify the character encoding of the source files # This tag can be used to specify the character encoding of the source files
# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is # that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is

115
flight/INS/Makefile
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@ -1,26 +1,26 @@
##### #####
# Project: OpenPilot INS # Project: OpenPilot INS
# #
# #
# Makefile for OpenPilot INS project # Makefile for OpenPilot INS project
# #
# The OpenPilot Team, http://www.openpilot.org, Copyright (C) 2011. # The OpenPilot Team, http://www.openpilot.org, Copyright (C) 2009.
# #
# #
# This program is free software; you can redistribute it and/or modify # This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by # it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or # the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version. # (at your option) any later version.
# #
# This program is distributed in the hope that it will be useful, but # This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY # WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License # or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for more details. # for more details.
# #
# You should have received a copy of the GNU General Public License along # You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc., # with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
##### #####
WHEREAMI := $(dir $(lastword $(MAKEFILE_LIST))) WHEREAMI := $(dir $(lastword $(MAKEFILE_LIST)))
TOP := $(realpath $(WHEREAMI)/../../) TOP := $(realpath $(WHEREAMI)/../../)
@ -55,13 +55,12 @@ PIOS = ../PiOS
PIOSINC = $(PIOS)/inc PIOSINC = $(PIOS)/inc
FLIGHTLIB = ../Libraries FLIGHTLIB = ../Libraries
FLIGHTLIBINC = ../Libraries/inc FLIGHTLIBINC = ../Libraries/inc
PIOSSTM32F10X = $(PIOS)/STM32F10x PIOSSTM32FXX = $(PIOS)/STM32F2xx
PIOSCOMMON = $(PIOS)/Common PIOSCOMMON = $(PIOS)/Common
PIOSBOARDS = $(PIOS)/Boards PIOSBOARDS = $(PIOS)/Boards
APPLIBDIR = $(PIOSSTM32F10X)/Libraries APPLIBDIR = $(PIOSSTM32FXX)/Libraries
STMLIBDIR = $(APPLIBDIR) STMLIBDIR = $(APPLIBDIR)
STMSPDDIR = $(STMLIBDIR)/STM32F10x_StdPeriph_Driver STMSPDDIR = $(STMLIBDIR)/STM32F2xx_StdPeriph_Driver
STMUSBDIR = $(STMLIBDIR)/STM32_USB-FS-Device_Driver
STMSPDSRCDIR = $(STMSPDDIR)/src STMSPDSRCDIR = $(STMSPDDIR)/src
STMSPDINCDIR = $(STMSPDDIR)/inc STMSPDINCDIR = $(STMSPDDIR)/inc
CMSISDIR = $(STMLIBDIR)/CMSIS/Core/CM3 CMSISDIR = $(STMLIBDIR)/CMSIS/Core/CM3
@ -80,7 +79,6 @@ OPUAVSYNTHDIR = $(OUTDIR)/../uavobject-synthetics/flight
## INS: ## INS:
SRC = ins.c SRC = ins.c
SRC += pios_board.c SRC += pios_board.c
SRC += ahrs_timer.c
SRC += insgps13state.c SRC += insgps13state.c
SRC += $(FLIGHTLIB)/CoordinateConversions.c SRC += $(FLIGHTLIB)/CoordinateConversions.c
SRC += $(FLIGHTLIB)/fifo_buffer.c SRC += $(FLIGHTLIB)/fifo_buffer.c
@ -91,16 +89,16 @@ SRC += $(BOOT)/ahrs_slave_test.c
SRC += $(BOOT)/ahrs_spi_program.c SRC += $(BOOT)/ahrs_spi_program.c
## PIOS Hardware (STM32F10x) ## PIOS Hardware (STM32F10x)
SRC += $(PIOSSTM32F10X)/pios_sys.c SRC += $(PIOSSTM32FXX)/pios_sys.c
SRC += $(PIOSSTM32F10X)/pios_led.c SRC += $(PIOSSTM32FXX)/pios_led.c
SRC += $(PIOSSTM32F10X)/pios_delay.c SRC += $(PIOSSTM32FXX)/pios_delay.c
SRC += $(PIOSSTM32F10X)/pios_usart.c SRC += $(PIOSSTM32FXX)/pios_usart.c
SRC += $(PIOSSTM32F10X)/pios_irq.c SRC += $(PIOSSTM32FXX)/pios_irq.c
SRC += $(PIOSSTM32F10X)/pios_i2c.c SRC += $(PIOSSTM32FXX)/pios_i2c.c
SRC += $(PIOSSTM32F10X)/pios_debug.c SRC += $(PIOSSTM32FXX)/pios_debug.c
SRC += $(PIOSSTM32F10X)/pios_gpio.c SRC += $(PIOSSTM32FXX)/pios_gpio.c
SRC += $(PIOSSTM32F10X)/pios_spi.c SRC += $(PIOSSTM32FXX)/pios_spi.c
SRC += $(PIOSSTM32F10X)/pios_exti.c SRC += $(PIOSSTM32FXX)/pios_exti.c
## PIOS Hardware (Common) ## PIOS Hardware (Common)
SRC += $(PIOSCOMMON)/pios_com.c SRC += $(PIOSCOMMON)/pios_com.c
@ -114,26 +112,24 @@ SRC += $(PIOSCOMMON)/pios_bl_helper.c
## CMSIS for STM32 ## CMSIS for STM32
SRC += $(CMSISDIR)/core_cm3.c SRC += $(CMSISDIR)/core_cm3.c
SRC += $(CMSISDIR)/system_stm32f10x.c SRC += $(CMSISDIR)/system_stm32f2xx.c
## Used parts of the STM-Library ## Used parts of the STM-Library
SRC += $(STMSPDSRCDIR)/stm32f10x_adc.c SRC += $(STMSPDSRCDIR)/stm32f2xx_adc.c
SRC += $(STMSPDSRCDIR)/stm32f10x_bkp.c SRC += $(STMSPDSRCDIR)/stm32f2xx_crc.c
SRC += $(STMSPDSRCDIR)/stm32f10x_crc.c SRC += $(STMSPDSRCDIR)/stm32f2xx_dac.c
SRC += $(STMSPDSRCDIR)/stm32f10x_dac.c SRC += $(STMSPDSRCDIR)/stm32f2xx_dma.c
SRC += $(STMSPDSRCDIR)/stm32f10x_dma.c SRC += $(STMSPDSRCDIR)/stm32f2xx_exti.c
SRC += $(STMSPDSRCDIR)/stm32f10x_exti.c SRC += $(STMSPDSRCDIR)/stm32f2xx_flash.c
SRC += $(STMSPDSRCDIR)/stm32f10x_flash.c SRC += $(STMSPDSRCDIR)/stm32f2xx_gpio.c
SRC += $(STMSPDSRCDIR)/stm32f10x_gpio.c SRC += $(STMSPDSRCDIR)/stm32f2xx_i2c.c
SRC += $(STMSPDSRCDIR)/stm32f10x_i2c.c SRC += $(STMSPDSRCDIR)/stm32f2xx_pwr.c
SRC += $(STMSPDSRCDIR)/stm32f10x_pwr.c SRC += $(STMSPDSRCDIR)/stm32f2xx_rcc.c
SRC += $(STMSPDSRCDIR)/stm32f10x_rcc.c SRC += $(STMSPDSRCDIR)/stm32f2xx_rtc.c
SRC += $(STMSPDSRCDIR)/stm32f10x_rtc.c SRC += $(STMSPDSRCDIR)/stm32f2xx_spi.c
SRC += $(STMSPDSRCDIR)/stm32f10x_spi.c SRC += $(STMSPDSRCDIR)/stm32f2xx_tim.c
SRC += $(STMSPDSRCDIR)/stm32f10x_tim.c SRC += $(STMSPDSRCDIR)/stm32f2xx_usart.c
SRC += $(STMSPDSRCDIR)/stm32f10x_usart.c
SRC += $(STMSPDSRCDIR)/misc.c SRC += $(STMSPDSRCDIR)/misc.c
# List C source files here which must be compiled in ARM-Mode (no -mthumb). # List C source files here which must be compiled in ARM-Mode (no -mthumb).
# use file-extension c for "c-only"-files # use file-extension c for "c-only"-files
## just for testing, timer.c could be compiled in thumb-mode too ## just for testing, timer.c could be compiled in thumb-mode too
@ -155,7 +151,7 @@ CPPSRCARM =
# Even though the DOS/Win* filesystem matches both .s and .S the same, # Even though the DOS/Win* filesystem matches both .s and .S the same,
# it will preserve the spelling of the filenames, and gcc itself does # it will preserve the spelling of the filenames, and gcc itself does
# care about how the name is spelled on its command-line. # care about how the name is spelled on its command-line.
ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL)$(MODEL_SUFFIX).S ASRC = $(PIOSSTM32FXX)/startup_stm32f2xx.S
# List Assembler source files here which must be assembled in ARM-Mode.. # List Assembler source files here which must be assembled in ARM-Mode..
ASRCARM = ASRCARM =
@ -165,7 +161,7 @@ ASRCARM =
EXTRAINCDIRS += $(PIOS) EXTRAINCDIRS += $(PIOS)
EXTRAINCDIRS += $(PIOSINC) EXTRAINCDIRS += $(PIOSINC)
EXTRAINCDIRS += $(FLIGHTLIBINC) EXTRAINCDIRS += $(FLIGHTLIBINC)
EXTRAINCDIRS += $(PIOSSTM32F10X) EXTRAINCDIRS += $(PIOSSTM32FXX)
EXTRAINCDIRS += $(PIOSCOMMON) EXTRAINCDIRS += $(PIOSCOMMON)
EXTRAINCDIRS += $(PIOSBOARDS) EXTRAINCDIRS += $(PIOSBOARDS)
EXTRAINCDIRS += $(STMSPDINCDIR) EXTRAINCDIRS += $(STMSPDINCDIR)
@ -202,6 +198,8 @@ else
CFLAGS += -Os CFLAGS += -Os
endif endif
CFLAGS += -DHSE_VALUE=$(OSCILLATOR_FREQ)
# Output format. (can be ihex or binary or both) # Output format. (can be ihex or binary or both)
# binary to create a load-image in raw-binary format i.e. for SAM-BA, # binary to create a load-image in raw-binary format i.e. for SAM-BA,
# ihex to create a load-image in Intel hex format # ihex to create a load-image in Intel hex format
@ -244,7 +242,6 @@ CSTANDARD = -std=gnu99
# #
# Flags for C and C++ (arm-elf-gcc/arm-elf-g++) # Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
CFLAGS += -g$(DEBUGF) CFLAGS += -g$(DEBUGF)
CFLAGS += -ffast-math CFLAGS += -ffast-math
@ -359,7 +356,7 @@ $(OUTDIR)/$(TARGET).bin.o: $(OUTDIR)/$(TARGET).bin
$(eval $(call OPFW_TEMPLATE,$(OUTDIR)/$(TARGET).bin,$(BOARD_TYPE),$(BOARD_REVISION))) $(eval $(call OPFW_TEMPLATE,$(OUTDIR)/$(TARGET).bin,$(BOARD_TYPE),$(BOARD_REVISION)))
# Add jtag targets (program and wipe) # Add jtag targets (program and wipe)
$(eval $(call JTAG_TEMPLATE,$(OUTDIR)/$(TARGET).bin,$(FW_BANK_BASE),$(FW_BANK_SIZE))) $(eval $(call JTAG_TEMPLATE_F2X,$(OUTDIR)/$(TARGET).bin,$(FW_BANK_BASE),$(FW_BANK_SIZE)))
.PHONY: elf lss sym hex bin bino opfw .PHONY: elf lss sym hex bin bino opfw
elf: $(OUTDIR)/$(TARGET).elf elf: $(OUTDIR)/$(TARGET).elf

61
flight/INS/ahrs_timer.c
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@ -1,61 +0,0 @@
/**
******************************************************************************
* @addtogroup AHRS AHRS
* @brief The AHRS Modules perform
*
* @{
* @addtogroup AHRS_TIMER AHRS Timer
* @brief Sets up a simple timer that can be polled to estimate idle time
* @{
*
*
* @file ahrs.c
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
* @brief INSGPS Test Program
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "ahrs_timer.h"
void timer_start()
{
RCC_APB1PeriphClockCmd(RCC_APB1Periph_BKP | RCC_APB1Periph_PWR,
ENABLE);
PWR_BackupAccessCmd(ENABLE);
RCC_RTCCLKConfig(RCC_RTCCLKSource_HSE_Div128);
RCC_RTCCLKCmd(ENABLE);
RTC_WaitForLastTask();
RTC_WaitForSynchro();
RTC_WaitForLastTask();
RTC_SetPrescaler(0); // counting at 8e6 / 128
RTC_WaitForLastTask();
RTC_SetCounter(0);
RTC_WaitForLastTask();
}
uint32_t timer_count()
{
return RTC_GetCounter();
}
uint32_t timer_rate()
{
return TIMER_RATE;
}

4
flight/INS/inc/pios_config.h
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@ -36,6 +36,8 @@
#ifndef PIOS_CONFIG_H #ifndef PIOS_CONFIG_H
#define PIOS_CONFIG_H #define PIOS_CONFIG_H
#define STM32F2XX
/* Enable/Disable PiOS Modules */ /* Enable/Disable PiOS Modules */
#define PIOS_INCLUDE_DELAY #define PIOS_INCLUDE_DELAY
#define PIOS_INCLUDE_I2C #define PIOS_INCLUDE_I2C
@ -45,7 +47,7 @@
#define PIOS_INCLUDE_SYS #define PIOS_INCLUDE_SYS
#define PIOS_INCLUDE_USART #define PIOS_INCLUDE_USART
#define PIOS_INCLUDE_COM #define PIOS_INCLUDE_COM
#define PIOS_INCLUDE_COM_AUX //#define PIOS_INCLUDE_COM_AUX
#define PIOS_INCLUDE_GPS #define PIOS_INCLUDE_GPS
#define PIOS_INCLUDE_BMA180 #define PIOS_INCLUDE_BMA180
#define PIOS_INCLUDE_HMC5883 #define PIOS_INCLUDE_HMC5883

40
flight/INS/ins.c
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@ -11,8 +11,7 @@
* *
* *
* @file ins.c * @file ins.c
* @author David "Buzz" Carlson (buzz@chebuzz.com) * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2011.
* The OpenPilot Team, http://www.openpilot.org Copyright (C) 2011.
* @brief INSGPS Test Program * @brief INSGPS Test Program
* @see The GNU Public License (GPL) Version 3 * @see The GNU Public License (GPL) Version 3
* *
@ -96,8 +95,6 @@ void affine_rotate(float scale[3][4], float rotation[3]);
void calibration(float result[3], float scale[3][4], float arg[3]); void calibration(float result[3], float scale[3][4], float arg[3]);
/* Bootloader related functions and var*/ /* Bootloader related functions and var*/
static uint32_t iap_calc_crc(void);
static void read_description(uint8_t *);
void firmwareiapobj_callback(AhrsObjHandle obj); void firmwareiapobj_callback(AhrsObjHandle obj);
volatile uint8_t reset_count=0; volatile uint8_t reset_count=0;
@ -1043,6 +1040,9 @@ void homelocation_callback(AhrsObjHandle obj)
void firmwareiapobj_callback(AhrsObjHandle obj) void firmwareiapobj_callback(AhrsObjHandle obj)
{ {
#if 0
const struct pios_board_info * bdinfo = &pios_board_info_blob;
FirmwareIAPObjData firmwareIAPObj; FirmwareIAPObjData firmwareIAPObj;
FirmwareIAPObjGet(&firmwareIAPObj); FirmwareIAPObjGet(&firmwareIAPObj);
if(firmwareIAPObj.ArmReset==0) if(firmwareIAPObj.ArmReset==0)
@ -1050,7 +1050,7 @@ void firmwareiapobj_callback(AhrsObjHandle obj)
if(firmwareIAPObj.ArmReset==1) if(firmwareIAPObj.ArmReset==1)
{ {
if((firmwareIAPObj.BoardType==BOARD_TYPE) || (firmwareIAPObj.BoardType==0xFF)) if((firmwareIAPObj.BoardType==bdinfo->board_type) || (firmwareIAPObj.BoardType==0xFF))
{ {
++reset_count; ++reset_count;
@ -1062,36 +1062,16 @@ void firmwareiapobj_callback(AhrsObjHandle obj)
} }
} }
} }
else if(firmwareIAPObj.BoardType==BOARD_TYPE && firmwareIAPObj.crc!=iap_calc_crc()) else if(firmwareIAPObj.BoardType==bdinfo->board_type && firmwareIAPObj.crc!=PIOS_BL_HELPER_CRC_Memory_Calc())
{ {
read_description(firmwareIAPObj.Description); PIOS_BL_HELPER_FLASH_Read_Description(firmwareIAPObj.Description,bdinfo->desc_size);
firmwareIAPObj.crc=iap_calc_crc(); firmwareIAPObj.crc=PIOS_BL_HELPER_CRC_Memory_Calc();
firmwareIAPObj.BoardRevision=BOARD_REVISION; firmwareIAPObj.BoardRevision=bdinfo->board_rev;
FirmwareIAPObjSet(&firmwareIAPObj); FirmwareIAPObjSet(&firmwareIAPObj);
} }
#endif
} }
static uint32_t iap_calc_crc(void)
{
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE);
CRC_ResetDR();
CRC_CalcBlockCRC((uint32_t *) START_OF_USER_CODE, (SIZE_OF_CODE) >> 2);
return CRC_GetCRC();
}
static uint8_t *FLASH_If_Read(uint32_t SectorAddress)
{
return (uint8_t *) (SectorAddress);
}
static void read_description(uint8_t * array)
{
uint8_t x = 0;
for (uint32_t i = START_OF_USER_CODE + SIZE_OF_CODE; i < START_OF_USER_CODE + SIZE_OF_CODE + SIZE_OF_DESCRIPTION; ++i) {
array[x] = *FLASH_If_Read(i);
++x;
}
}
/** /**
* @} * @}

201
flight/INS/pios_board.c
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@ -56,16 +56,14 @@ static const struct pios_spi_cfg pios_spi_op_cfg = {
.SPI_CPOL = SPI_CPOL_High, .SPI_CPOL = SPI_CPOL_High,
.SPI_CPHA = SPI_CPHA_2Edge, .SPI_CPHA = SPI_CPHA_2Edge,
}, },
.use_crc = TRUE, .use_crc = true,
.dma = { .dma = {
.ahb_clk = RCC_AHBPeriph_DMA1, .ahb_clk = RCC_AHB1Periph_DMA1,
.irq = { .irq = {
.flags = .flags = (DMA_IT_TCIF3 | DMA_IT_TEIF3 | DMA_IT_HTIF3),
(DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 |
DMA1_FLAG_GL4),
.init = { .init = {
.NVIC_IRQChannel = DMA1_Channel4_IRQn, .NVIC_IRQChannel = DMA1_Stream0_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH, .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelSubPriority = 0, .NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE, .NVIC_IRQChannelCmd = ENABLE,
@ -73,74 +71,82 @@ static const struct pios_spi_cfg pios_spi_op_cfg = {
}, },
.rx = { .rx = {
.channel = DMA1_Channel4, .channel = DMA1_Stream0,
.init = { .init = {
.DMA_PeripheralBaseAddr = .DMA_PeripheralBaseAddr = (uint32_t) & (SPI2->DR),
(uint32_t) & (SPI2->DR), .DMA_DIR = DMA_DIR_PeripheralToMemory,
.DMA_DIR = DMA_DIR_PeripheralSRC, .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_PeripheralInc =
DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable, .DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
DMA_PeripheralDataSize_Byte, .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_MemoryDataSize =
DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal, .DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium, .DMA_Priority = DMA_Priority_Medium,
.DMA_M2M = DMA_M2M_Disable, //TODO: Enable FIFO
.DMA_FIFOMode = DMA_FIFOMode_Disable,
/* .DMA_FIFOThreshold */
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
}, },
}, },
.tx = { .tx = {
.channel = DMA1_Channel5, .channel = DMA1_Stream5,
.init = { .init = {
.DMA_PeripheralBaseAddr = .DMA_PeripheralBaseAddr = (uint32_t) & (SPI2->DR),
(uint32_t) & (SPI2->DR), .DMA_DIR = DMA_DIR_MemoryToPeripheral,
.DMA_DIR = DMA_DIR_PeripheralDST, .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_PeripheralInc =
DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable, .DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
DMA_PeripheralDataSize_Byte, .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_MemoryDataSize =
DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal, .DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium, .DMA_Priority = DMA_Priority_Medium,
.DMA_M2M = DMA_M2M_Disable, .DMA_FIFOMode = DMA_FIFOMode_Disable,
/* .DMA_FIFOThreshold */
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
}, },
}, },
}, },
.ssel = {
.gpio = GPIOB,
.init = {
.GPIO_Pin = GPIO_Pin_12,
.GPIO_Speed = GPIO_Speed_10MHz,
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
},
},
.sclk = { .sclk = {
.gpio = GPIOB, .gpio = GPIOB,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_13, .GPIO_Pin = GPIO_Pin_13,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Speed = GPIO_Speed_100MHz,
.GPIO_Mode = GPIO_Mode_IN_FLOATING, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_OD,
.GPIO_PuPd = GPIO_PuPd_NOPULL
}, },
}, },
.miso = { .miso = {
.gpio = GPIOB, .gpio = GPIOB,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_14, .GPIO_Pin = GPIO_Pin_14,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_Mode = GPIO_Mode_AF_PP, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_NOPULL
}, },
}, },
.mosi = { .mosi = {
.gpio = GPIOB, .gpio = GPIOB,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_15, .GPIO_Pin = GPIO_Pin_15,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_Mode = GPIO_Mode_IN_FLOATING, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_OD,
.GPIO_PuPd = GPIO_PuPd_NOPULL
}, },
}, },
.slave_count = 1,
.ssel = { {
.gpio = GPIOB,
.init = {
.GPIO_Pin = GPIO_Pin_12,
.GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_Mode = GPIO_Mode_IN,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
},
} },
}; };
uint32_t pios_spi_op_id; uint32_t pios_spi_op_id;
@ -169,14 +175,14 @@ static const struct pios_spi_cfg pios_spi_accel_cfg = {
.SPI_CPHA = SPI_CPHA_2Edge, .SPI_CPHA = SPI_CPHA_2Edge,
.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_128, .SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_128,
}, },
.use_crc = FALSE, .use_crc = false,
.dma = { .dma = {
.ahb_clk = RCC_AHBPeriph_DMA1, .ahb_clk = RCC_AHB1Periph_DMA1,
.irq = { .irq = {
.flags = (DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_HT2 | DMA1_FLAG_GL2), .flags = (DMA_IT_TCIF3 | DMA_IT_TEIF3 | DMA_IT_HTIF3),
.init = { .init = {
.NVIC_IRQChannel = DMA1_Channel2_IRQn, .NVIC_IRQChannel = DMA1_Stream0_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH, .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelSubPriority = 0, .NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE, .NVIC_IRQChannelCmd = ENABLE,
@ -184,66 +190,81 @@ static const struct pios_spi_cfg pios_spi_accel_cfg = {
}, },
.rx = { .rx = {
.channel = DMA1_Channel2, .channel = DMA1_Stream2,
.init = { .init = {
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR), .DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR),
.DMA_DIR = DMA_DIR_PeripheralSRC, .DMA_DIR = DMA_DIR_PeripheralToMemory,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable, .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable, .DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte, .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal, .DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium, .DMA_Priority = DMA_Priority_Medium,
.DMA_M2M = DMA_M2M_Disable, .DMA_FIFOMode = DMA_FIFOMode_Disable,
/* .DMA_FIFOThreshold */
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
}, },
}, },
.tx = { .tx = {
.channel = DMA1_Channel3, .channel = DMA1_Stream3,
.init = { .init = {
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR), .DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR),
.DMA_DIR = DMA_DIR_PeripheralDST, .DMA_DIR = DMA_DIR_MemoryToPeripheral,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable, .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable, .DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte, .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal, .DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_High, .DMA_Priority = DMA_Priority_High,
.DMA_M2M = DMA_M2M_Disable, .DMA_FIFOMode = DMA_FIFOMode_Disable,
/* .DMA_FIFOThreshold */
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
}, },
}, },
}, },
.ssel = {
.gpio = GPIOA,
.init = {
.GPIO_Pin = GPIO_Pin_4,
.GPIO_Speed = GPIO_Speed_10MHz,
.GPIO_Mode = GPIO_Mode_Out_PP,
},
},
.sclk = { .sclk = {
.gpio = GPIOA, .gpio = GPIOA,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_5, .GPIO_Pin = GPIO_Pin_5,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Speed = GPIO_Speed_100MHz,
.GPIO_Mode = GPIO_Mode_AF_PP, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
}, },
}, },
.miso = { .miso = {
.gpio = GPIOA, .gpio = GPIOA,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_6, .GPIO_Pin = GPIO_Pin_6,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_Mode = GPIO_Mode_IN_FLOATING, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
}, },
}, },
.mosi = { .mosi = {
.gpio = GPIOA, .gpio = GPIOA,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_7, .GPIO_Pin = GPIO_Pin_7,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_Mode = GPIO_Mode_AF_PP, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
}, },
}, },
.slave_count = 1,
.ssel = { {
.gpio = GPIOA,
.init = {
.GPIO_Pin = GPIO_Pin_4,
.GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_Mode = GPIO_Mode_OUT,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
},
} },
}; };
static uint32_t pios_spi_accel_id; static uint32_t pios_spi_accel_id;
@ -287,7 +308,9 @@ static const struct pios_usart_cfg pios_usart_gps_cfg = {
.init = { .init = {
.GPIO_Pin = GPIO_Pin_10, .GPIO_Pin = GPIO_Pin_10,
.GPIO_Speed = GPIO_Speed_2MHz, .GPIO_Speed = GPIO_Speed_2MHz,
.GPIO_Mode = GPIO_Mode_IPU, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
}, },
}, },
.tx = { .tx = {
@ -295,7 +318,9 @@ static const struct pios_usart_cfg pios_usart_gps_cfg = {
.init = { .init = {
.GPIO_Pin = GPIO_Pin_9, .GPIO_Pin = GPIO_Pin_9,
.GPIO_Speed = GPIO_Speed_2MHz, .GPIO_Speed = GPIO_Speed_2MHz,
.GPIO_Mode = GPIO_Mode_AF_PP, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
}, },
}, },
}; };
@ -330,7 +355,9 @@ static const struct pios_usart_cfg pios_usart_aux_cfg = {
.init = { .init = {
.GPIO_Pin = GPIO_Pin_11, .GPIO_Pin = GPIO_Pin_11,
.GPIO_Speed = GPIO_Speed_2MHz, .GPIO_Speed = GPIO_Speed_2MHz,
.GPIO_Mode = GPIO_Mode_IPU, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
}, },
}, },
.tx = { .tx = {
@ -338,7 +365,9 @@ static const struct pios_usart_cfg pios_usart_aux_cfg = {
.init = { .init = {
.GPIO_Pin = GPIO_Pin_10, .GPIO_Pin = GPIO_Pin_10,
.GPIO_Speed = GPIO_Speed_2MHz, .GPIO_Speed = GPIO_Speed_2MHz,
.GPIO_Mode = GPIO_Mode_AF_PP, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP
}, },
}, },
}; };
@ -372,9 +401,9 @@ static uint8_t pios_com_gps_rx_buffer[PIOS_COM_GPS_RX_BUF_LEN];
void PIOS_I2C_pres_mag_adapter_ev_irq_handler(void); void PIOS_I2C_pres_mag_adapter_ev_irq_handler(void);
void PIOS_I2C_pres_mag_adapter_er_irq_handler(void); void PIOS_I2C_pres_mag_adapter_er_irq_handler(void);
void I2C1_EV_IRQHandler() void I2C1_EV_IRQHandler()
__attribute__ ((alias("PIOS_I2C_pres_mag_adapter_ev_irq_handler"))); __attribute__ ((alias("PIOS_I2C_pres_mag_adapter_ev_irq_handler")));
void I2C1_ER_IRQHandler() void I2C1_ER_IRQHandler()
__attribute__ ((alias("PIOS_I2C_pres_mag_adapter_er_irq_handler"))); __attribute__ ((alias("PIOS_I2C_pres_mag_adapter_er_irq_handler")));
static const struct pios_i2c_adapter_cfg pios_i2c_pres_mag_adapter_cfg = { static const struct pios_i2c_adapter_cfg pios_i2c_pres_mag_adapter_cfg = {
.regs = I2C1, .regs = I2C1,
@ -384,23 +413,27 @@ static const struct pios_i2c_adapter_cfg pios_i2c_pres_mag_adapter_cfg = {
.I2C_Ack = I2C_Ack_Enable, .I2C_Ack = I2C_Ack_Enable,
.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit, .I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit,
.I2C_DutyCycle = I2C_DutyCycle_2, .I2C_DutyCycle = I2C_DutyCycle_2,
.I2C_ClockSpeed = 200000, /* bits/s */ .I2C_ClockSpeed = 400000, /* bits/s */
}, },
.transfer_timeout_ms = 50, .transfer_timeout_ms = 50,
.scl = { .scl = {
.gpio = GPIOB, .gpio = GPIOB,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_6, .GPIO_Pin = GPIO_Pin_6,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_Mode = GPIO_Mode_AF_OD, .GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_OType = GPIO_OType_OD,
.GPIO_PuPd = GPIO_PuPd_NOPULL,
}, },
}, },
.sda = { .sda = {
.gpio = GPIOB, .gpio = GPIOB,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_7, .GPIO_Pin = GPIO_Pin_7,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_Mode = GPIO_Mode_AF_OD, .GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_OType = GPIO_OType_OD,
.GPIO_PuPd = GPIO_PuPd_NOPULL,
}, },
}, },
.event = { .event = {
@ -457,16 +490,20 @@ static const struct pios_i2c_adapter_cfg pios_i2c_gyro_adapter_cfg = {
.gpio = GPIOB, .gpio = GPIOB,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_10, .GPIO_Pin = GPIO_Pin_10,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_Mode = GPIO_Mode_AF_OD, .GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_OType = GPIO_OType_OD,
.GPIO_PuPd = GPIO_PuPd_NOPULL,
}, },
}, },
.sda = { .sda = {
.gpio = GPIOB, .gpio = GPIOB,
.init = { .init = {
.GPIO_Pin = GPIO_Pin_11, .GPIO_Pin = GPIO_Pin_11,
.GPIO_Speed = GPIO_Speed_10MHz, .GPIO_Mode = GPIO_Mode_AF,
.GPIO_Mode = GPIO_Mode_AF_OD, .GPIO_Speed = GPIO_Speed_50MHz,
.GPIO_OType = GPIO_OType_OD,
.GPIO_PuPd = GPIO_PuPd_NOPULL,
}, },
}, },
.event = { .event = {
@ -579,7 +616,7 @@ void PIOS_Board_Init(void) {
/* Set up the SPI interface to the OP board */ /* Set up the SPI interface to the OP board */
#include "ahrs_spi_comm.h" #include "ahrs_spi_comm.h"
AhrsInitComms(); AhrsInitComms();
if (PIOS_SPI_Init(&pios_spi_op_id, &pios_spi_op_cfg)) { if (PIOS_SPI_Init(&pios_spi_op_id, &pios_spi_op_cfg)) {
PIOS_DEBUG_Assert(0); PIOS_DEBUG_Assert(0);

2
flight/Libraries/inc/fifo_buffer.h
View File

@ -26,7 +26,7 @@
#ifndef _FIFO_BUFFER_H_ #ifndef _FIFO_BUFFER_H_
#define _FIFO_BUFFER_H_ #define _FIFO_BUFFER_H_
#include "stm32f10x.h" #include "pios.h"
// ********************* // *********************

2
flight/PiOS/Boards/STM32F2xx_INS.h
View File

@ -141,7 +141,7 @@ extern uint32_t pios_com_aux_id;
//------------------------- //-------------------------
// System Settings // System Settings
//------------------------- //-------------------------
#define PIOS_MASTER_CLOCK 72000000 #define PIOS_MASTER_CLOCK 120000000
#define PIOS_PERIPHERAL_CLOCK (PIOS_MASTER_CLOCK / 2) #define PIOS_PERIPHERAL_CLOCK (PIOS_MASTER_CLOCK / 2)
//------------------------- //-------------------------

16
flight/PiOS/inc/pios_spi_priv.h
View File

@ -35,6 +35,21 @@
#include <pios.h> #include <pios.h>
#include <pios_stm32.h> #include <pios_stm32.h>
/* XXX these two should be reconciled - separate for now to avoid breaking other targets */
#ifdef STM32F2XX
struct pios_spi_cfg {
SPI_TypeDef *regs;
uint32_t remap; /* GPIO_Remap_* or GPIO_AF_* */
SPI_InitTypeDef init;
bool use_crc;
struct stm32_dma dma;
struct stm32_gpio sclk;
struct stm32_gpio miso;
struct stm32_gpio mosi;
uint32_t slave_count;
struct stm32_gpio ssel[];
};
#else
struct pios_spi_cfg { struct pios_spi_cfg {
SPI_TypeDef *regs; SPI_TypeDef *regs;
SPI_InitTypeDef init; SPI_InitTypeDef init;
@ -45,6 +60,7 @@ struct pios_spi_cfg {
struct stm32_gpio miso; struct stm32_gpio miso;
struct stm32_gpio mosi; struct stm32_gpio mosi;
}; };
#endif
struct pios_spi_dev { struct pios_spi_dev {
const struct pios_spi_cfg * cfg; const struct pios_spi_cfg * cfg;

37
flight/Project/OpenPilotOSX/OpenPilotOSX.xcodeproj/project.pbxproj
View File

@ -242,6 +242,16 @@
6560A3AD13EE2E8B00105DA5 /* main.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = main.c; path = INS/main.c; sourceTree = "<group>"; }; 6560A3AD13EE2E8B00105DA5 /* main.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = main.c; path = INS/main.c; sourceTree = "<group>"; };
6560A3AE13EE2E8B00105DA5 /* Makefile */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.make; name = Makefile; path = INS/Makefile; sourceTree = "<group>"; }; 6560A3AE13EE2E8B00105DA5 /* Makefile */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.make; name = Makefile; path = INS/Makefile; sourceTree = "<group>"; };
6560A3AF13EE2E8B00105DA5 /* pios_board.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = pios_board.c; path = INS/pios_board.c; sourceTree = "<group>"; }; 6560A3AF13EE2E8B00105DA5 /* pios_board.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = pios_board.c; path = INS/pios_board.c; sourceTree = "<group>"; };
6560A3B313EE2FCB00105DA5 /* ahrs_timer.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ahrs_timer.h; sourceTree = "<group>"; };
6560A3B413EE2FCB00105DA5 /* ins.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ins.h; sourceTree = "<group>"; };
6560A3B513EE2FCB00105DA5 /* ins_fsm.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ins_fsm.h; sourceTree = "<group>"; };
6560A3B613EE2FCB00105DA5 /* insgps.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = insgps.h; sourceTree = "<group>"; };
6560A3B713EE2FCB00105DA5 /* pios_config.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_config.h; sourceTree = "<group>"; };
6560A3B813EE2FCB00105DA5 /* ins.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = ins.c; sourceTree = "<group>"; };
6560A3B913EE2FCB00105DA5 /* insgps13state.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = insgps13state.c; sourceTree = "<group>"; };
6560A3BA13EE2FCB00105DA5 /* Makefile */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.make; path = Makefile; sourceTree = "<group>"; };
6560A3BB13EE2FCB00105DA5 /* pios_board.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = pios_board.c; sourceTree = "<group>"; };
6560A3BC13EE2FCB00105DA5 /* test.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = test.c; sourceTree = "<group>"; };
656268C612DC1923007B0A0F /* nedaccel.xml */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text.xml; path = nedaccel.xml; sourceTree = "<group>"; }; 656268C612DC1923007B0A0F /* nedaccel.xml */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text.xml; path = nedaccel.xml; sourceTree = "<group>"; };
6562BE1713CCAD0600C823E8 /* pios_rcvr.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = pios_rcvr.c; sourceTree = "<group>"; }; 6562BE1713CCAD0600C823E8 /* pios_rcvr.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = pios_rcvr.c; sourceTree = "<group>"; };
65632DF51251650300469B77 /* pios_board.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_board.h; sourceTree = "<group>"; }; 65632DF51251650300469B77 /* pios_board.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_board.h; sourceTree = "<group>"; };
@ -4008,6 +4018,32 @@
path = INS/inc; path = INS/inc;
sourceTree = "<group>"; sourceTree = "<group>";
}; };
6560A3B013EE2FCB00105DA5 /* INS */ = {
isa = PBXGroup;
children = (
6560A3B213EE2FCB00105DA5 /* inc */,
6560A3B813EE2FCB00105DA5 /* ins.c */,
6560A3B913EE2FCB00105DA5 /* insgps13state.c */,
6560A3BA13EE2FCB00105DA5 /* Makefile */,
6560A3BB13EE2FCB00105DA5 /* pios_board.c */,
6560A3BC13EE2FCB00105DA5 /* test.c */,
);
name = INS;
path = ../../INS;
sourceTree = "<group>";
};
6560A3B213EE2FCB00105DA5 /* inc */ = {
isa = PBXGroup;
children = (
6560A3B313EE2FCB00105DA5 /* ahrs_timer.h */,
6560A3B413EE2FCB00105DA5 /* ins.h */,
6560A3B513EE2FCB00105DA5 /* ins_fsm.h */,
6560A3B613EE2FCB00105DA5 /* insgps.h */,
6560A3B713EE2FCB00105DA5 /* pios_config.h */,
);
path = inc;
sourceTree = "<group>";
};
65632DF41251650300469B77 /* Boards */ = { 65632DF41251650300469B77 /* Boards */ = {
isa = PBXGroup; isa = PBXGroup;
children = ( children = (
@ -4023,6 +4059,7 @@
657CEEB5121DBC49007A1FBE /* flight */ = { 657CEEB5121DBC49007A1FBE /* flight */ = {
isa = PBXGroup; isa = PBXGroup;
children = ( children = (
6560A3B013EE2FCB00105DA5 /* INS */,
65FF4BB313791C3300146BE4 /* Bootloaders */, 65FF4BB313791C3300146BE4 /* Bootloaders */,
65F93B9012EE09280047DB36 /* PipXtreme */, 65F93B9012EE09280047DB36 /* PipXtreme */,
65B7E6AC120DF1CD000C1123 /* AHRS */, 65B7E6AC120DF1CD000C1123 /* AHRS */,