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OP-21/Flight Bootloader - new bootloaders
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1639 ebee16cc-31ac-478f-84a7-5cbb03baadba
This commit is contained in:
zedamota
zedamota
parent
89fb0b8582
commit
50b7931a1c
582
flight/Bootloaders/AHRS/Makefile
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582
flight/Bootloaders/AHRS/Makefile
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@ -0,0 +1,582 @@
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#####
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# Project: OpenPilot AHRS_BOOTLOADER
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#
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#
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# Makefile for OpenPilot AHRS_BOOTLOADER project
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#
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# The OpenPilot Team, http://www.openpilot.org, Copyright (C) 2009.
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#
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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# for more details.
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#
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# You should have received a copy of the GNU General Public License along
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# with this program; if not, write to the Free Software Foundation, Inc.,
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# 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#####
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# Set developer code and compile options
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# Set to YES for debugging
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DEBUG ?= NO
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USE_BOOTLOADER ?= NO
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# Set to YES when using Code Sourcery toolchain
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CODE_SOURCERY ?= YES
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# Toolchain prefix (i.e arm-elf- -> arm-elf-gcc.exe)
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TCHAIN_PREFIX = arm-none-eabi-
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ifeq ($(CODE_SOURCERY), YES)
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REMOVE_CMD = cs-rm
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else
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REMOVE_CMD = rm
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endif
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FLASH_TOOL = OPENOCD
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# YES enables -mthumb option to flags for source-files listed
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# in SRC and CPPSRC
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USE_THUMB_MODE = YES
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# MCU name, submodel and board
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# - MCU used for compiler-option (-mcpu)
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# - MODEL used for linker-script name (-T) and passed as define
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# - BOARD just passed as define (optional)
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MCU = cortex-m3
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CHIP = STM32F103CBT
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BOARD = STM32103CB_AHRS
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ifeq ($(USE_BOOTLOADER), YES)
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MODEL = MD
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else
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MODEL = MD
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endif
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# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
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OUTDIR = Build
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# Target file name (without extension).
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TARGET = AHRS_BL
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# Paths
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AHRS_BL = ./
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AHRS_BLINC = $(AHRS_BL)/inc
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PIOS = ../PiOS
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PIOSINC = $(PIOS)/inc
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FLIGHTLIB = ../Libraries
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FLIGHTLIBINC = ../Libraries/inc
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PIOSSTM32F10X = $(PIOS)/STM32F10x
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PIOSCOMMON = $(PIOS)/Common
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APPLIBDIR = $(PIOSSTM32F10X)/Libraries
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STMLIBDIR = $(APPLIBDIR)
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STMSPDDIR = $(STMLIBDIR)/STM32F10x_StdPeriph_Driver
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STMUSBDIR = $(STMLIBDIR)/STM32_USB-FS-Device_Driver
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STMSPDSRCDIR = $(STMSPDDIR)/src
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STMSPDINCDIR = $(STMSPDDIR)/inc
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CMSISDIR = $(STMLIBDIR)/CMSIS/Core/CM3
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# List C source files here. (C dependencies are automatically generated.)
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# use file-extension c for "c-only"-files
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## BOOTLOADER:
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SRC = main.c
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SRC += pios_board.c
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SRC += bl_fsm.c
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#SRC += insgps.c
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#SRC += $(FLIGHTLIB)/CoordinateConversions.c
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## PIOS Hardware (STM32F10x)
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SRC += $(PIOSSTM32F10X)/pios_sys.c
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SRC += $(PIOSSTM32F10X)/pios_led.c
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SRC += $(PIOSSTM32F10X)/pios_delay.c
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SRC += $(PIOSSTM32F10X)/pios_usart.c
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SRC += $(PIOSSTM32F10X)/pios_irq.c
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#SRC += $(PIOSSTM32F10X)/pios_i2c.c
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SRC += $(PIOSSTM32F10X)/pios_gpio.c
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SRC += $(PIOSSTM32F10X)/pios_spi.c
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## PIOS Hardware (Common)
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#SRC += $(PIOSCOMMON)/pios_com.c
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#SRC += $(PIOSCOMMON)/pios_hmc5843.c
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SRC += $(PIOSCOMMON)/pios_opahrs_proto.c
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SRC += $(PIOSCOMMON)/printf-stdarg.c
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SRC += $(PIOSCOMMON)/pios_bl_helper.c
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## CMSIS for STM32
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SRC += $(CMSISDIR)/core_cm3.c
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SRC += $(CMSISDIR)/system_stm32f10x.c
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## Used parts of the STM-Library
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SRC += $(STMSPDSRCDIR)/stm32f10x_adc.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_bkp.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_crc.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_dac.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_dma.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_exti.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_flash.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_gpio.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_i2c.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_pwr.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_rcc.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_rtc.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_spi.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_tim.c
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SRC += $(STMSPDSRCDIR)/stm32f10x_usart.c
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SRC += $(STMSPDSRCDIR)/misc.c
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# List C source files here which must be compiled in ARM-Mode (no -mthumb).
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# use file-extension c for "c-only"-files
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## just for testing, timer.c could be compiled in thumb-mode too
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SRCARM =
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# List C++ source files here.
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# use file-extension .cpp for C++-files (not .C)
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CPPSRC =
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# List C++ source files here which must be compiled in ARM-Mode.
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# use file-extension .cpp for C++-files (not .C)
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#CPPSRCARM = $(TARGET).cpp
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CPPSRCARM =
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# List Assembler source files here.
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# Make them always end in a capital .S. Files ending in a lowercase .s
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# will not be considered source files but generated files (assembler
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# output from the compiler), and will be deleted upon "make clean"!
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# Even though the DOS/Win* filesystem matches both .s and .S the same,
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# it will preserve the spelling of the filenames, and gcc itself does
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# care about how the name is spelled on its command-line.
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ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL).S
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# List Assembler source files here which must be assembled in ARM-Mode..
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ASRCARM =
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# List any extra directories to look for include files here.
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# Each directory must be seperated by a space.
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EXTRAINCDIRS += $(PIOS)
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EXTRAINCDIRS += $(PIOSINC)
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EXTRAINCDIRS += $(FLIGHTLIBINC)
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EXTRAINCDIRS += $(PIOSSTM32F10X)
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EXTRAINCDIRS += $(PIOSCOMMON)
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EXTRAINCDIRS += $(STMSPDINCDIR)
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EXTRAINCDIRS += $(CMSISDIR)
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EXTRAINCDIRS += $(AHRS_BLINC)
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# List any extra directories to look for library files here.
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# Also add directories where the linker should search for
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# includes from linker-script to the list
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# Each directory must be seperated by a space.
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EXTRA_LIBDIRS =
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# Extra Libraries
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# Each library-name must be seperated by a space.
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# i.e. to link with libxyz.a, libabc.a and libefsl.a:
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# EXTRA_LIBS = xyz abc efsl
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# for newlib-lpc (file: libnewlibc-lpc.a):
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# EXTRA_LIBS = newlib-lpc
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EXTRA_LIBS =
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# Path to Linker-Scripts
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LINKERSCRIPTPATH = $(PIOSSTM32F10X)
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# Optimization level, can be [0, 1, 2, 3, s].
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# 0 = turn off optimization. s = optimize for size.
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# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
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ifeq ($(DEBUG),YES)
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OPT = 0
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else
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OPT = s
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endif
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# Output format. (can be ihex or binary or both)
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# binary to create a load-image in raw-binary format i.e. for SAM-BA,
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# ihex to create a load-image in Intel hex format
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#LOADFORMAT = ihex
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#LOADFORMAT = binary
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LOADFORMAT = both
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# Debugging format.
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DEBUGF = dwarf-2
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# Place project-specific -D (define) and/or
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# -U options for C here.
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CDEFS = -DSTM32F10X_$(MODEL)
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CDEFS += -DUSE_STDPERIPH_DRIVER
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CDEFS += -DUSE_$(BOARD)
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# Place project-specific -D and/or -U options for
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# Assembler with preprocessor here.
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#ADEFS = -DUSE_IRQ_ASM_WRAPPER
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ADEFS = -D__ASSEMBLY__
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# Compiler flag to set the C Standard level.
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# c89 - "ANSI" C
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# gnu89 - c89 plus GCC extensions
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# c99 - ISO C99 standard (not yet fully implemented)
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# gnu99 - c99 plus GCC extensions
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CSTANDARD = -std=gnu99
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#-----
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# Compiler flags.
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# -g*: generate debugging information
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# -O*: optimization level
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# -f...: tuning, see GCC manual and avr-libc documentation
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# -Wall...: warning level
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# -Wa,...: tell GCC to pass this to the assembler.
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# -adhlns...: create assembler listing
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#
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# Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
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ifeq ($(DEBUG),YES)
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CFLAGS = -g$(DEBUGF)
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endif
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CFLAGS += -O$(OPT)
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CFLAGS += -mcpu=$(MCU) -mthumb
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CFLAGS += $(CDEFS)
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CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -I.
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CFLAGS += -mapcs-frame
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CFLAGS += -fomit-frame-pointer
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ifeq ($(CODE_SOURCERY), YES)
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CFLAGS += -fpromote-loop-indices
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endif
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CFLAGS += -Wall
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CFLAGS += -Werror
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CFLAGS += -Wa,-adhlns=$(addprefix $(OUTDIR)/, $(notdir $(addsuffix .lst, $(basename $<))))
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# Compiler flags to generate dependency files:
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CFLAGS += -MD -MP -MF $(OUTDIR)/dep/$(@F).d
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# flags only for C
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#CONLYFLAGS += -Wnested-externs
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CONLYFLAGS += $(CSTANDARD)
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# Assembler flags.
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# -Wa,...: tell GCC to pass this to the assembler.
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# -ahlns: create listing
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ASFLAGS = -mcpu=$(MCU) -mthumb -I. -x assembler-with-cpp
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ASFLAGS += $(ADEFS)
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ASFLAGS += -Wa,-adhlns=$(addprefix $(OUTDIR)/, $(notdir $(addsuffix .lst, $(basename $<))))
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ASFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
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MATH_LIB = -lm
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# Linker flags.
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# -Wl,...: tell GCC to pass this to linker.
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# -Map: create map file
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# --cref: add cross reference to map file
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LDFLAGS = -nostartfiles -Wl,-Map=$(OUTDIR)/$(TARGET).map,--cref,--gc-sections
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LDFLAGS += $(patsubst %,-L%,$(EXTRA_LIBDIRS))
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LDFLAGS += -lc
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LDFLAGS += $(patsubst %,-l%,$(EXTRA_LIBS))
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LDFLAGS += $(MATH_LIB)
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LDFLAGS += -lc -lgcc
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# Set linker-script name depending on selected submodel name
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LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_stm32f10x_$(MODEL).ld
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# ---------------------------------------------------------------------------
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# Options for OpenOCD flash-programming
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# see openocd.pdf/openocd.texi for further information
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#
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OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
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# if OpenOCD is in the $PATH just set OPENOCDEXE=openocd
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OOCD_EXE=openocd
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# debug level
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OOCD_CL=-d0
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# interface and board/target settings (using the OOCD target-library here)
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UNAME := $(shell uname)
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ifeq ($(UNAME), Darwin)
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OOCD_CL+=-f ../Project/OpenOCD/floss-jtag.ahrs.osx.cfg -f ../Project/OpenOCD/stm32.cfg
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else
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OOCD_CL+=-f ../Project/OpenOCD/floss-jtag.ahrs.cfg -f ../Project/OpenOCD/stm32.cfg
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endif
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# initialize
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OOCD_CL+=-c init
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# show the targets
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OOCD_CL+=-c targets
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# commands to prepare flash-write
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OOCD_CL+= -c "reset halt"
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# flash erase
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OOCD_CL+=-c "stm32x mass_erase 0"
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# flash-write
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OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
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# Verify
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OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
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# reset target
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OOCD_CL+=-c "reset run"
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# terminate OOCD after programming
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OOCD_CL+=-c shutdown
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# ---------------------------------------------------------------------------
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# Define programs and commands.
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CC = $(TCHAIN_PREFIX)gcc
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CPP = $(TCHAIN_PREFIX)g++
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AR = $(TCHAIN_PREFIX)ar
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OBJCOPY = $(TCHAIN_PREFIX)objcopy
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OBJDUMP = $(TCHAIN_PREFIX)objdump
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SIZE = $(TCHAIN_PREFIX)size
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NM = $(TCHAIN_PREFIX)nm
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REMOVE = $(REMOVE_CMD) -f
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###SHELL = sh
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###COPY = cp
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# Define Messages
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# English
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MSG_ERRORS_NONE = Errors: none
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MSG_BEGIN = "-------- begin (mode: $(RUN_MODE)) --------"
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MSG_END = -------- end --------
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MSG_SIZE_BEFORE = Size before:
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MSG_SIZE_AFTER = Size after build:
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MSG_LOAD_FILE = Creating load file:
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MSG_EXTENDED_LISTING = Creating Extended Listing/Disassembly:
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MSG_SYMBOL_TABLE = Creating Symbol Table:
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MSG_LINKING = "**** Linking :"
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MSG_COMPILING = "**** Compiling C :"
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MSG_COMPILING_ARM = "**** Compiling C (ARM-only):"
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MSG_COMPILINGCPP = "Compiling C++ :"
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MSG_COMPILINGCPP_ARM = "Compiling C++ (ARM-only):"
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||||
MSG_ASSEMBLING = "**** Assembling:"
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MSG_ASSEMBLING_ARM = "****Assembling (ARM-only):"
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MSG_CLEANING = Cleaning project:
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MSG_FORMATERROR = Can not handle output-format
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MSG_ASMFROMC = "Creating asm-File from C-Source:"
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MSG_ASMFROMC_ARM = "Creating asm-File from C-Source (ARM-only):"
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# List of all source files.
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ALLSRC = $(ASRCARM) $(ASRC) $(SRCARM) $(SRC) $(CPPSRCARM) $(CPPSRC)
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# List of all source files without directory and file-extension.
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||||
ALLSRCBASE = $(notdir $(basename $(ALLSRC)))
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||||
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||||
# Define all object files.
|
||||
ALLOBJ = $(addprefix $(OUTDIR)/, $(addsuffix .o, $(ALLSRCBASE)))
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||||
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||||
# Define all listing files (used for make clean).
|
||||
LSTFILES = $(addprefix $(OUTDIR)/, $(addsuffix .lst, $(ALLSRCBASE)))
|
||||
# Define all depedency-files (used for make clean).
|
||||
DEPFILES = $(addprefix $(OUTDIR)/dep/, $(addsuffix .o.d, $(ALLSRCBASE)))
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||||
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||||
elf: $(OUTDIR)/$(TARGET).elf
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||||
lss: $(OUTDIR)/$(TARGET).lss
|
||||
sym: $(OUTDIR)/$(TARGET).sym
|
||||
hex: $(OUTDIR)/$(TARGET).hex
|
||||
bin: $(OUTDIR)/$(TARGET).bin
|
||||
|
||||
# Default target.
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||||
#all: begin gccversion sizebefore build sizeafter finished end
|
||||
all: begin gccversion build sizeafter finished end
|
||||
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||||
ifeq ($(LOADFORMAT),ihex)
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||||
build: elf hex lss sym
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||||
else
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||||
ifeq ($(LOADFORMAT),binary)
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||||
build: elf bin lss sym
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||||
else
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||||
ifeq ($(LOADFORMAT),both)
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||||
build: elf hex bin lss sym
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||||
else
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||||
$(error "$(MSG_FORMATERROR) $(FORMAT)")
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||||
endif
|
||||
endif
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||||
endif
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||||
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||||
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||||
# Eye candy.
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||||
begin:
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||||
## @echo
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||||
@echo $(MSG_BEGIN)
|
||||
|
||||
finished:
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||||
## @echo $(MSG_ERRORS_NONE)
|
||||
|
||||
end:
|
||||
@echo $(MSG_END)
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||||
## @echo
|
||||
|
||||
# Display sizes of sections.
|
||||
ELFSIZE = $(SIZE) -A $(OUTDIR)/$(TARGET).elf
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||||
##ELFSIZE = $(SIZE) --format=Berkeley --common $(OUTDIR)/$(TARGET).elf
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||||
sizebefore:
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||||
# @if [ -f $(OUTDIR)/$(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
|
||||
|
||||
sizeafter:
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||||
# @if [ -f $(OUTDIR)/$(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
|
||||
@echo $(MSG_SIZE_AFTER)
|
||||
$(ELFSIZE)
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||||
|
||||
# Display compiler version information.
|
||||
gccversion :
|
||||
@$(CC) --version
|
||||
# @echo $(ALLOBJ)
|
||||
|
||||
# Program the device.
|
||||
ifeq ($(FLASH_TOOL),OPENOCD)
|
||||
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
|
||||
program: $(OUTDIR)/$(TARGET).elf
|
||||
@echo "Programming with OPENOCD"
|
||||
$(OOCD_EXE) $(OOCD_CL)
|
||||
endif
|
||||
|
||||
# Create final output file (.hex) from ELF output file.
|
||||
%.hex: %.elf
|
||||
## @echo
|
||||
@echo $(MSG_LOAD_FILE) $@
|
||||
$(OBJCOPY) -O ihex $< $@
|
||||
|
||||
# Create final output file (.bin) from ELF output file.
|
||||
%.bin: %.elf
|
||||
## @echo
|
||||
@echo $(MSG_LOAD_FILE) $@
|
||||
$(OBJCOPY) -O binary $< $@
|
||||
|
||||
# Create extended listing file/disassambly from ELF output file.
|
||||
# using objdump testing: option -C
|
||||
%.lss: %.elf
|
||||
## @echo
|
||||
@echo $(MSG_EXTENDED_LISTING) $@
|
||||
$(OBJDUMP) -h -S -C -r $< > $@
|
||||
# $(OBJDUMP) -x -S $< > $@
|
||||
|
||||
# Create a symbol table from ELF output file.
|
||||
%.sym: %.elf
|
||||
## @echo
|
||||
@echo $(MSG_SYMBOL_TABLE) $@
|
||||
$(NM) -n $< > $@
|
||||
|
||||
# Link: create ELF output file from object files.
|
||||
.SECONDARY : $(TARGET).elf
|
||||
.PRECIOUS : $(ALLOBJ)
|
||||
%.elf: $(ALLOBJ)
|
||||
@echo
|
||||
@echo $(MSG_LINKING) $@
|
||||
# use $(CC) for C-only projects or $(CPP) for C++-projects:
|
||||
$(CC) $(THUMB) $(CFLAGS) $(ALLOBJ) --output $@ $(LDFLAGS)
|
||||
# $(CPP) $(THUMB) $(CFLAGS) $(ALLOBJ) --output $@ $(LDFLAGS)
|
||||
|
||||
|
||||
# Assemble: create object files from assembler source files.
|
||||
define ASSEMBLE_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_ASSEMBLING) $$< "->" $$@
|
||||
$(CC) -c $(THUMB) $$(ASFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(ASRC), $(eval $(call ASSEMBLE_TEMPLATE, $(src))))
|
||||
|
||||
# Assemble: create object files from assembler source files. ARM-only
|
||||
define ASSEMBLE_ARM_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_ASSEMBLING_ARM) $$< "->" $$@
|
||||
$(CC) -c $$(ASFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(ASRCARM), $(eval $(call ASSEMBLE_ARM_TEMPLATE, $(src))))
|
||||
|
||||
|
||||
# Compile: create object files from C source files.
|
||||
define COMPILE_C_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_COMPILING) $$< "->" $$@
|
||||
$(CC) -c $(THUMB) $$(CFLAGS) $$(CONLYFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(SRC), $(eval $(call COMPILE_C_TEMPLATE, $(src))))
|
||||
|
||||
# Compile: create object files from C source files. ARM-only
|
||||
define COMPILE_C_ARM_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_COMPILING_ARM) $$< "->" $$@
|
||||
$(CC) -c $$(CFLAGS) $$(CONLYFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(SRCARM), $(eval $(call COMPILE_C_ARM_TEMPLATE, $(src))))
|
||||
|
||||
|
||||
# Compile: create object files from C++ source files.
|
||||
define COMPILE_CPP_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_COMPILINGCPP) $$< "->" $$@
|
||||
$(CC) -c $(THUMB) $$(CFLAGS) $$(CPPFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(CPPSRC), $(eval $(call COMPILE_CPP_TEMPLATE, $(src))))
|
||||
|
||||
# Compile: create object files from C++ source files. ARM-only
|
||||
define COMPILE_CPP_ARM_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_COMPILINGCPP_ARM) $$< "->" $$@
|
||||
$(CC) -c $$(CFLAGS) $$(CPPFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(CPPSRCARM), $(eval $(call COMPILE_CPP_ARM_TEMPLATE, $(src))))
|
||||
|
||||
|
||||
# Compile: create assembler files from C source files. ARM/Thumb
|
||||
$(SRC:.c=.s) : %.s : %.c
|
||||
@echo $(MSG_ASMFROMC) $< to $@
|
||||
$(CC) $(THUMB) -S $(CFLAGS) $(CONLYFLAGS) $< -o $@
|
||||
|
||||
# Compile: create assembler files from C source files. ARM only
|
||||
$(SRCARM:.c=.s) : %.s : %.c
|
||||
@echo $(MSG_ASMFROMC_ARM) $< to $@
|
||||
$(CC) -S $(CFLAGS) $(CONLYFLAGS) $< -o $@
|
||||
|
||||
# Generate Doxygen documents
|
||||
docs:
|
||||
doxygen $(DOXYGENDIR)/doxygen.cfg
|
||||
|
||||
# Target: clean project.
|
||||
clean: begin clean_list finished end
|
||||
|
||||
clean_list :
|
||||
## @echo
|
||||
@echo $(MSG_CLEANING)
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).map
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).elf
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).hex
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).bin
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).sym
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).lss
|
||||
$(REMOVE) $(ALLOBJ)
|
||||
$(REMOVE) $(LSTFILES)
|
||||
$(REMOVE) $(DEPFILES)
|
||||
$(REMOVE) $(SRC:.c=.s)
|
||||
$(REMOVE) $(SRCARM:.c=.s)
|
||||
$(REMOVE) $(CPPSRC:.cpp=.s)
|
||||
$(REMOVE) $(CPPSRCARM:.cpp=.s)
|
||||
|
||||
|
||||
# Create output files directory
|
||||
# all known MS Windows OS define the ComSpec environment variable
|
||||
ifdef ComSpec
|
||||
$(shell md $(OUTDIR) 2>NUL)
|
||||
else
|
||||
$(shell mkdir $(OUTDIR) 2>/dev/null)
|
||||
endif
|
||||
|
||||
# Include the dependency files.
|
||||
ifdef ComSpec
|
||||
-include $(shell md $(OUTDIR)\dep 2>NUL) $(wildcard $(OUTDIR)/dep/*)
|
||||
else
|
||||
-include $(shell mkdir $(OUTDIR) 2>/dev/null) $(shell mkdir $(OUTDIR)/dep 2>/dev/null) $(wildcard $(OUTDIR)/dep/*)
|
||||
endif
|
||||
|
||||
|
||||
|
||||
# Listing of phony targets.
|
||||
.PHONY : all begin finish end sizebefore sizeafter gccversion \
|
||||
build elf hex bin lss sym clean clean_list program
|
||||
|
||||
620
flight/Bootloaders/AHRS/bl_fsm.c
Normal file
620
flight/Bootloaders/AHRS/bl_fsm.c
Normal file
@ -0,0 +1,620 @@
|
||||
#include <stdint.h> /* uint*_t */
|
||||
#include <stddef.h> /* NULL */
|
||||
|
||||
#include "bl_fsm.h"
|
||||
|
||||
#include "pios_opahrs_proto.h"
|
||||
|
||||
#include "pios.h"
|
||||
|
||||
struct lfsm_context {
|
||||
enum lfsm_state curr_state;
|
||||
enum opahrs_msg_link_state link_state;
|
||||
enum opahrs_msg_type user_payload_type;
|
||||
uint32_t user_payload_len;
|
||||
|
||||
uint32_t errors;
|
||||
|
||||
uint8_t * rx;
|
||||
uint8_t * tx;
|
||||
|
||||
uint8_t * link_rx;
|
||||
uint8_t * link_tx;
|
||||
|
||||
uint8_t * user_rx;
|
||||
uint8_t * user_tx;
|
||||
|
||||
struct lfsm_link_stats stats;
|
||||
};
|
||||
|
||||
static struct lfsm_context context = { 0 };
|
||||
|
||||
static void lfsm_update_link_tx (struct lfsm_context * context);
|
||||
static void lfsm_init_rx (struct lfsm_context * context);
|
||||
|
||||
/*
|
||||
*
|
||||
* Link Finite State Machine
|
||||
*
|
||||
*/
|
||||
|
||||
struct lfsm_transition {
|
||||
void (*entry_fn)(struct lfsm_context * context);
|
||||
enum lfsm_state next_state[LFSM_EVENT_NUM_EVENTS];
|
||||
};
|
||||
|
||||
static void go_faulted(struct lfsm_context * context);
|
||||
static void go_stopped(struct lfsm_context * context);
|
||||
static void go_stopping(struct lfsm_context * context);
|
||||
static void go_inactive(struct lfsm_context * context);
|
||||
static void go_user_busy(struct lfsm_context * context);
|
||||
static void go_user_busy_rx_pending(struct lfsm_context * context);
|
||||
static void go_user_busy_tx_pending(struct lfsm_context * context);
|
||||
static void go_user_busy_rxtx_pending(struct lfsm_context * context);
|
||||
static void go_user_rx_pending(struct lfsm_context * context);
|
||||
static void go_user_tx_pending(struct lfsm_context * context);
|
||||
static void go_user_rxtx_pending(struct lfsm_context * context);
|
||||
static void go_user_rx_active(struct lfsm_context * context);
|
||||
static void go_user_tx_active(struct lfsm_context * context);
|
||||
static void go_user_rxtx_active(struct lfsm_context * context);
|
||||
|
||||
const static struct lfsm_transition lfsm_transitions[LFSM_STATE_NUM_STATES] = {
|
||||
[LFSM_STATE_FAULTED] = {
|
||||
.entry_fn = go_faulted,
|
||||
},
|
||||
[LFSM_STATE_STOPPED] = {
|
||||
.entry_fn = go_stopped,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_INIT_LINK] = LFSM_STATE_INACTIVE,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_STOPPED,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_STOPPING] = {
|
||||
.entry_fn = go_stopping,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_STOPPED,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_STOPPED,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_STOPPED,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_INACTIVE] = {
|
||||
.entry_fn = go_inactive,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_STOP] = LFSM_STATE_STOPPING,
|
||||
[LFSM_EVENT_USER_SET_RX] = LFSM_STATE_USER_BUSY_RX_PENDING,
|
||||
[LFSM_EVENT_USER_SET_TX] = LFSM_STATE_USER_BUSY_TX_PENDING,
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_INACTIVE,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_INACTIVE,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_INACTIVE,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_BUSY] = {
|
||||
.entry_fn = go_user_busy,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_STOP] = LFSM_STATE_STOPPING,
|
||||
[LFSM_EVENT_USER_SET_RX] = LFSM_STATE_USER_BUSY_RX_PENDING,
|
||||
[LFSM_EVENT_USER_SET_TX] = LFSM_STATE_USER_BUSY_TX_PENDING,
|
||||
[LFSM_EVENT_USER_DONE] = LFSM_STATE_INACTIVE,
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_BUSY,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_BUSY,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_BUSY,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_BUSY_RX_PENDING] = {
|
||||
.entry_fn = go_user_busy_rx_pending,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_USER_SET_TX] = LFSM_STATE_USER_BUSY_RXTX_PENDING,
|
||||
[LFSM_EVENT_USER_DONE] = LFSM_STATE_USER_RX_PENDING,
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_BUSY_RX_PENDING,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_BUSY_RX_PENDING,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_BUSY_RX_PENDING,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_BUSY_TX_PENDING] = {
|
||||
.entry_fn = go_user_busy_tx_pending,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_USER_SET_RX] = LFSM_STATE_USER_BUSY_RXTX_PENDING,
|
||||
[LFSM_EVENT_USER_DONE] = LFSM_STATE_USER_TX_PENDING,
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_BUSY_TX_PENDING,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_BUSY_TX_PENDING,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_BUSY_TX_PENDING,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_BUSY_RXTX_PENDING] = {
|
||||
.entry_fn = go_user_busy_rxtx_pending,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_USER_DONE] = LFSM_STATE_USER_RXTX_PENDING,
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_BUSY_RXTX_PENDING,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_BUSY_RXTX_PENDING,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_BUSY_RXTX_PENDING,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_RX_PENDING] = {
|
||||
.entry_fn = go_user_rx_pending,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_RX_ACTIVE,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_RX_ACTIVE,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_RX_ACTIVE,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_TX_PENDING] = {
|
||||
.entry_fn = go_user_tx_pending,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_TX_ACTIVE,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_TX_ACTIVE,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_TX_ACTIVE,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_RXTX_PENDING] = {
|
||||
.entry_fn = go_user_rxtx_pending,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_RXTX_ACTIVE,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_RXTX_ACTIVE,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_RXTX_ACTIVE,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_RX_ACTIVE] = {
|
||||
.entry_fn = go_user_rx_active,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_RX_ACTIVE,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_BUSY,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_RX_ACTIVE,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_TX_ACTIVE] = {
|
||||
.entry_fn = go_user_tx_active,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_INACTIVE,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_INACTIVE,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_INACTIVE,
|
||||
},
|
||||
},
|
||||
[LFSM_STATE_USER_RXTX_ACTIVE] = {
|
||||
.entry_fn = go_user_rxtx_active,
|
||||
.next_state = {
|
||||
[LFSM_EVENT_RX_LINK] = LFSM_STATE_USER_RX_ACTIVE,
|
||||
[LFSM_EVENT_RX_USER] = LFSM_STATE_USER_BUSY,
|
||||
[LFSM_EVENT_RX_UNKNOWN] = LFSM_STATE_USER_RX_ACTIVE,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* FSM State Entry Functions
|
||||
*/
|
||||
|
||||
static void go_faulted(struct lfsm_context * context)
|
||||
{
|
||||
PIOS_DEBUG_Assert(0);
|
||||
}
|
||||
|
||||
static void go_stopped(struct lfsm_context * context)
|
||||
{
|
||||
#if 0
|
||||
PIOS_SPI_Stop(PIOS_SPI_OP);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void go_stopping(struct lfsm_context * context)
|
||||
{
|
||||
context->link_tx = NULL;
|
||||
context->tx = NULL;
|
||||
}
|
||||
|
||||
static void go_inactive(struct lfsm_context * context)
|
||||
{
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_INACTIVE;
|
||||
lfsm_update_link_tx(context);
|
||||
|
||||
context->user_rx = NULL;
|
||||
context->user_tx = NULL;
|
||||
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->link_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_busy(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_rx);
|
||||
|
||||
context->user_rx = NULL;
|
||||
context->user_tx = NULL;
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_BUSY;
|
||||
lfsm_update_link_tx(context);
|
||||
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->link_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_busy_rx_pending(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_rx);
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_BUSY;
|
||||
lfsm_update_link_tx(context);
|
||||
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->link_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_busy_tx_pending(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_tx);
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_BUSY;
|
||||
lfsm_update_link_tx(context);
|
||||
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->link_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_busy_rxtx_pending(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_rx);
|
||||
PIOS_DEBUG_Assert(context->user_tx);
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_BUSY;
|
||||
lfsm_update_link_tx(context);
|
||||
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->link_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_rx_pending(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_rx);
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_BUSY;
|
||||
lfsm_update_link_tx(context);
|
||||
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->link_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_tx_pending(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_tx);
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_BUSY;
|
||||
lfsm_update_link_tx(context);
|
||||
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->link_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_rxtx_pending(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_rx);
|
||||
PIOS_DEBUG_Assert(context->user_tx);
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_BUSY;
|
||||
lfsm_update_link_tx(context);
|
||||
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->link_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_rx_active(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_rx);
|
||||
|
||||
context->rx = context->user_rx;
|
||||
context->tx = context->link_tx;
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_READY;
|
||||
|
||||
lfsm_update_link_tx(context);
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_tx_active(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_tx);
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_BUSY;
|
||||
context->rx = context->link_rx;
|
||||
context->tx = context->user_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
static void go_user_rxtx_active(struct lfsm_context * context)
|
||||
{
|
||||
/* Sanity checks */
|
||||
PIOS_DEBUG_Assert(context->user_rx);
|
||||
PIOS_DEBUG_Assert(context->user_tx);
|
||||
|
||||
context->link_state = OPAHRS_MSG_LINK_STATE_READY;
|
||||
context->rx = context->user_rx;
|
||||
context->tx = context->user_tx;
|
||||
|
||||
lfsm_init_rx(context);
|
||||
PIOS_SPI_TransferBlock(PIOS_SPI_OP, context->tx, context->rx, context->user_payload_len, lfsm_irq_callback);
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* Misc Helper Functions
|
||||
*
|
||||
*/
|
||||
|
||||
static void lfsm_update_link_tx_v0 (struct opahrs_msg_v0 * msg, enum opahrs_msg_link_state state, uint16_t errors)
|
||||
{
|
||||
opahrs_msg_v0_init_link_tx(msg, OPAHRS_MSG_LINK_TAG_NOP);
|
||||
|
||||
msg->payload.link.state = state;
|
||||
msg->payload.link.errors = errors;
|
||||
}
|
||||
|
||||
static void lfsm_update_link_tx_v1 (struct opahrs_msg_v1 * msg, enum opahrs_msg_link_state state, uint16_t errors)
|
||||
{
|
||||
opahrs_msg_v1_init_link_tx(msg, OPAHRS_MSG_LINK_TAG_NOP);
|
||||
|
||||
msg->payload.link.state = state;
|
||||
msg->payload.link.errors = errors;
|
||||
}
|
||||
|
||||
static void lfsm_update_link_tx (struct lfsm_context * context)
|
||||
{
|
||||
PIOS_DEBUG_Assert(context->link_tx);
|
||||
|
||||
switch (context->user_payload_type) {
|
||||
case OPAHRS_MSG_TYPE_USER_V0:
|
||||
lfsm_update_link_tx_v0 ((struct opahrs_msg_v0 *)context->link_tx, context->link_state, context->errors);
|
||||
break;
|
||||
case OPAHRS_MSG_TYPE_USER_V1:
|
||||
lfsm_update_link_tx_v1 ((struct opahrs_msg_v1 *)context->link_tx, context->link_state, context->errors);
|
||||
break;
|
||||
case OPAHRS_MSG_TYPE_LINK:
|
||||
PIOS_DEBUG_Assert(0);
|
||||
}
|
||||
}
|
||||
|
||||
static void lfsm_init_rx (struct lfsm_context * context)
|
||||
{
|
||||
PIOS_DEBUG_Assert(context->rx);
|
||||
|
||||
switch (context->user_payload_type) {
|
||||
case OPAHRS_MSG_TYPE_USER_V0:
|
||||
opahrs_msg_v0_init_rx ((struct opahrs_msg_v0 *)context->rx);
|
||||
break;
|
||||
case OPAHRS_MSG_TYPE_USER_V1:
|
||||
opahrs_msg_v1_init_rx ((struct opahrs_msg_v1 *)context->rx);
|
||||
break;
|
||||
case OPAHRS_MSG_TYPE_LINK:
|
||||
PIOS_DEBUG_Assert(0);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* External API
|
||||
*
|
||||
*/
|
||||
|
||||
void lfsm_inject_event(enum lfsm_event event)
|
||||
{
|
||||
PIOS_IRQ_Disable();
|
||||
|
||||
/*
|
||||
* Move to the next state
|
||||
*
|
||||
* This is done prior to calling the new state's entry function to
|
||||
* guarantee that the entry function never depends on the previous
|
||||
* state. This way, it cannot ever know what the previous state was.
|
||||
*/
|
||||
context.curr_state = lfsm_transitions[context.curr_state].next_state[event];
|
||||
|
||||
/* Call the entry function (if any) for the next state. */
|
||||
if (lfsm_transitions[context.curr_state].entry_fn) {
|
||||
lfsm_transitions[context.curr_state].entry_fn(&context);
|
||||
}
|
||||
PIOS_IRQ_Enable();
|
||||
}
|
||||
|
||||
void lfsm_init(void)
|
||||
{
|
||||
context.curr_state = LFSM_STATE_STOPPED;
|
||||
go_stopped(&context);
|
||||
}
|
||||
|
||||
void lfsm_set_link_proto_v0 (struct opahrs_msg_v0 * link_tx, struct opahrs_msg_v0 * link_rx)
|
||||
{
|
||||
PIOS_DEBUG_Assert(link_tx);
|
||||
|
||||
context.link_tx = (uint8_t *)link_tx;
|
||||
context.link_rx = (uint8_t *)link_rx;
|
||||
context.user_payload_type = OPAHRS_MSG_TYPE_USER_V0;
|
||||
context.user_payload_len = sizeof(*link_tx);
|
||||
|
||||
lfsm_update_link_tx_v0(link_tx, context.link_state, context.errors);
|
||||
|
||||
lfsm_inject_event(LFSM_EVENT_INIT_LINK);
|
||||
}
|
||||
|
||||
void lfsm_set_link_proto_v1 (struct opahrs_msg_v1 * link_tx, struct opahrs_msg_v1 * link_rx)
|
||||
{
|
||||
PIOS_DEBUG_Assert(link_tx);
|
||||
|
||||
context.link_tx = (uint8_t *)link_tx;
|
||||
context.link_rx = (uint8_t *)link_rx;
|
||||
context.user_payload_type = OPAHRS_MSG_TYPE_USER_V1;
|
||||
context.user_payload_len = sizeof(*link_tx);
|
||||
|
||||
lfsm_update_link_tx_v1(link_tx, context.link_state, context.errors);
|
||||
|
||||
lfsm_inject_event(LFSM_EVENT_INIT_LINK);
|
||||
}
|
||||
|
||||
void lfsm_user_set_tx_v0 (struct opahrs_msg_v0 * user_tx)
|
||||
{
|
||||
PIOS_DEBUG_Assert(user_tx);
|
||||
|
||||
PIOS_DEBUG_Assert(context.user_payload_type == OPAHRS_MSG_TYPE_USER_V0);
|
||||
context.user_tx = (uint8_t *)user_tx;
|
||||
|
||||
lfsm_inject_event(LFSM_EVENT_USER_SET_TX);
|
||||
}
|
||||
|
||||
void lfsm_user_set_rx_v0 (struct opahrs_msg_v0 * user_rx)
|
||||
{
|
||||
PIOS_DEBUG_Assert(user_rx);
|
||||
PIOS_DEBUG_Assert(context.user_payload_type == OPAHRS_MSG_TYPE_USER_V0);
|
||||
|
||||
context.user_rx = (uint8_t *)user_rx;
|
||||
|
||||
lfsm_inject_event(LFSM_EVENT_USER_SET_RX);
|
||||
}
|
||||
|
||||
void lfsm_user_set_tx_v1 (struct opahrs_msg_v1 * user_tx)
|
||||
{
|
||||
PIOS_DEBUG_Assert(user_tx);
|
||||
PIOS_DEBUG_Assert(context.user_payload_type == OPAHRS_MSG_TYPE_USER_V1);
|
||||
|
||||
context.user_tx = (uint8_t *)user_tx;
|
||||
|
||||
lfsm_inject_event(LFSM_EVENT_USER_SET_TX);
|
||||
}
|
||||
|
||||
void lfsm_user_set_rx_v1 (struct opahrs_msg_v1 * user_rx)
|
||||
{
|
||||
PIOS_DEBUG_Assert(user_rx);
|
||||
PIOS_DEBUG_Assert(context.user_payload_type == OPAHRS_MSG_TYPE_USER_V1);
|
||||
|
||||
context.user_rx = (uint8_t *)user_rx;
|
||||
|
||||
lfsm_inject_event(LFSM_EVENT_USER_SET_RX);
|
||||
}
|
||||
|
||||
void lfsm_user_done (void)
|
||||
{
|
||||
lfsm_inject_event(LFSM_EVENT_USER_DONE);
|
||||
}
|
||||
|
||||
void lfsm_stop (void)
|
||||
{
|
||||
lfsm_inject_event(LFSM_EVENT_STOP);
|
||||
}
|
||||
|
||||
void lfsm_get_link_stats (struct lfsm_link_stats * stats)
|
||||
{
|
||||
PIOS_DEBUG_Assert(stats);
|
||||
|
||||
*stats = context.stats;
|
||||
}
|
||||
|
||||
enum lfsm_state lfsm_get_state (void)
|
||||
{
|
||||
return context.curr_state;
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* ISR Callback
|
||||
*
|
||||
*/
|
||||
|
||||
void lfsm_irq_callback(uint8_t crc_ok, uint8_t crc_val)
|
||||
{
|
||||
if (!crc_ok) {
|
||||
context.stats.rx_badcrc++;
|
||||
lfsm_inject_event (LFSM_EVENT_RX_UNKNOWN);
|
||||
return;
|
||||
}
|
||||
|
||||
if (!context.rx) {
|
||||
/* No way to know what we just received, assume invalid */
|
||||
lfsm_inject_event (LFSM_EVENT_RX_UNKNOWN);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Recover the head and tail pointers from the message */
|
||||
struct opahrs_msg_link_head * head=0;
|
||||
struct opahrs_msg_link_tail * tail=0;
|
||||
|
||||
switch (context.user_payload_type) {
|
||||
case OPAHRS_MSG_TYPE_USER_V0:
|
||||
head = &((struct opahrs_msg_v0 *)context.rx)->head;
|
||||
tail = &((struct opahrs_msg_v0 *)context.rx)->tail;
|
||||
break;
|
||||
case OPAHRS_MSG_TYPE_USER_V1:
|
||||
head = &((struct opahrs_msg_v1 *)context.rx)->head;
|
||||
tail = &((struct opahrs_msg_v1 *)context.rx)->tail;
|
||||
break;
|
||||
case OPAHRS_MSG_TYPE_LINK:
|
||||
/* Should never be rx'ing before the link protocol version is known */
|
||||
PIOS_DEBUG_Assert(0);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Check for bad magic */
|
||||
if ((head->magic != OPAHRS_MSG_MAGIC_HEAD) ||
|
||||
(tail->magic != OPAHRS_MSG_MAGIC_TAIL)) {
|
||||
if (head->magic != OPAHRS_MSG_MAGIC_HEAD) {
|
||||
context.stats.rx_badmagic_head++;
|
||||
}
|
||||
if (tail->magic != OPAHRS_MSG_MAGIC_TAIL) {
|
||||
context.stats.rx_badmagic_tail++;
|
||||
}
|
||||
lfsm_inject_event (LFSM_EVENT_RX_UNKNOWN);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Good magic, find out what type of payload we've got */
|
||||
switch (head->type) {
|
||||
case OPAHRS_MSG_TYPE_LINK:
|
||||
context.stats.rx_link++;
|
||||
lfsm_inject_event (LFSM_EVENT_RX_LINK);
|
||||
break;
|
||||
case OPAHRS_MSG_TYPE_USER_V0:
|
||||
case OPAHRS_MSG_TYPE_USER_V1:
|
||||
if (head->type == context.user_payload_type) {
|
||||
context.stats.rx_user++;
|
||||
lfsm_inject_event (LFSM_EVENT_RX_USER);
|
||||
} else {
|
||||
/* Mismatched user payload type */
|
||||
context.stats.rx_badver++;
|
||||
lfsm_inject_event (LFSM_EVENT_RX_UNKNOWN);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
/* Unidentifiable payload type */
|
||||
context.stats.rx_badtype++;
|
||||
lfsm_inject_event (LFSM_EVENT_RX_UNKNOWN);
|
||||
}
|
||||
}
|
||||
34
flight/Bootloaders/AHRS/inc/ahrs_bl.h
Normal file
34
flight/Bootloaders/AHRS/inc/ahrs_bl.h
Normal file
@ -0,0 +1,34 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
*
|
||||
* @file ahrs_bl.h
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief Main AHRS_BL header.
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#ifndef AHRS_BL_H
|
||||
#define AHRS_BL_H
|
||||
|
||||
|
||||
/* PIOS Includes */
|
||||
#include <pios.h>
|
||||
|
||||
#endif /* AHRS_BL_H */
|
||||
93
flight/Bootloaders/AHRS/inc/bl_fsm.h
Normal file
93
flight/Bootloaders/AHRS/inc/bl_fsm.h
Normal file
@ -0,0 +1,93 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
*
|
||||
* @file ahrs_fsm.h
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#ifndef BL_FSM_H
|
||||
#define BL_FSM_H
|
||||
|
||||
#include "pios_opahrs_proto.h"
|
||||
|
||||
enum lfsm_state {
|
||||
LFSM_STATE_FAULTED = 0, /* Must be zero so undefined transitions land here */
|
||||
LFSM_STATE_STOPPED,
|
||||
LFSM_STATE_STOPPING,
|
||||
LFSM_STATE_INACTIVE,
|
||||
LFSM_STATE_USER_BUSY,
|
||||
LFSM_STATE_USER_BUSY_RX_PENDING,
|
||||
LFSM_STATE_USER_BUSY_TX_PENDING,
|
||||
LFSM_STATE_USER_BUSY_RXTX_PENDING,
|
||||
LFSM_STATE_USER_RX_PENDING,
|
||||
LFSM_STATE_USER_TX_PENDING,
|
||||
LFSM_STATE_USER_RXTX_PENDING,
|
||||
LFSM_STATE_USER_RX_ACTIVE,
|
||||
LFSM_STATE_USER_TX_ACTIVE,
|
||||
LFSM_STATE_USER_RXTX_ACTIVE,
|
||||
|
||||
LFSM_STATE_NUM_STATES /* Must be last */
|
||||
};
|
||||
|
||||
enum lfsm_event {
|
||||
LFSM_EVENT_INIT_LINK,
|
||||
LFSM_EVENT_STOP,
|
||||
LFSM_EVENT_USER_SET_RX,
|
||||
LFSM_EVENT_USER_SET_TX,
|
||||
LFSM_EVENT_USER_DONE,
|
||||
LFSM_EVENT_RX_LINK,
|
||||
LFSM_EVENT_RX_USER,
|
||||
LFSM_EVENT_RX_UNKNOWN,
|
||||
|
||||
LFSM_EVENT_NUM_EVENTS /* Must be last */
|
||||
};
|
||||
|
||||
struct lfsm_link_stats {
|
||||
uint32_t rx_badcrc;
|
||||
uint32_t rx_badmagic_head;
|
||||
uint32_t rx_badmagic_tail;
|
||||
uint32_t rx_link;
|
||||
uint32_t rx_user;
|
||||
uint32_t tx_user;
|
||||
uint32_t rx_badtype;
|
||||
uint32_t rx_badver;
|
||||
};
|
||||
|
||||
extern void lfsm_init(void);
|
||||
extern void lfsm_inject_event(enum lfsm_event event);
|
||||
|
||||
extern void lfsm_irq_callback(uint8_t crc_ok, uint8_t crc_val);
|
||||
|
||||
extern void lfsm_get_link_stats (struct lfsm_link_stats * stats);
|
||||
extern enum lfsm_state lfsm_get_state (void);
|
||||
|
||||
extern void lfsm_set_link_proto_v0 (struct opahrs_msg_v0 * link_tx, struct opahrs_msg_v0 * link_rx);
|
||||
extern void lfsm_user_set_rx_v0 (struct opahrs_msg_v0 * user_rx);
|
||||
extern void lfsm_user_set_tx_v0 (struct opahrs_msg_v0 * user_tx);
|
||||
|
||||
extern void lfsm_set_link_proto_v1 (struct opahrs_msg_v1 * link_tx, struct opahrs_msg_v1 * link_rx);
|
||||
extern void lfsm_user_set_rx_v1 (struct opahrs_msg_v1 * user_rx);
|
||||
extern void lfsm_user_set_tx_v1 (struct opahrs_msg_v1 * user_tx);
|
||||
|
||||
extern void lfsm_user_done (void);
|
||||
|
||||
#endif /* BL_FSM_H */
|
||||
240
flight/Bootloaders/AHRS/inc/pios_board.h
Normal file
240
flight/Bootloaders/AHRS/inc/pios_board.h
Normal file
@ -0,0 +1,240 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
*
|
||||
* @file pios_board.h
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief Defines board hardware for the OpenPilot Version 1.1 hardware.
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PIOS_BOARD_H
|
||||
#define PIOS_BOARD_H
|
||||
|
||||
|
||||
//------------------------
|
||||
// Timers and Channels Used
|
||||
//------------------------
|
||||
/*
|
||||
Timer | Channel 1 | Channel 2 | Channel 3 | Channel 4
|
||||
------+-----------+-----------+-----------+----------
|
||||
TIM1 | | | |
|
||||
TIM2 | --------------- PIOS_DELAY -----------------
|
||||
TIM3 | | | |
|
||||
TIM4 | | | |
|
||||
TIM5 | | | |
|
||||
TIM6 | | | |
|
||||
TIM7 | | | |
|
||||
TIM8 | | | |
|
||||
------+-----------+-----------+-----------+----------
|
||||
*/
|
||||
|
||||
//------------------------
|
||||
// DMA Channels Used
|
||||
//------------------------
|
||||
/* Channel 1 - */
|
||||
/* Channel 2 - */
|
||||
/* Channel 3 - */
|
||||
/* Channel 4 - */
|
||||
/* Channel 5 - */
|
||||
/* Channel 6 - */
|
||||
/* Channel 7 - */
|
||||
/* Channel 8 - */
|
||||
/* Channel 9 - */
|
||||
/* Channel 10 - */
|
||||
/* Channel 11 - */
|
||||
/* Channel 12 - */
|
||||
|
||||
|
||||
//------------------------
|
||||
// BOOTLOADER_SETTINGS
|
||||
//------------------------
|
||||
#define HW_VERSION 69
|
||||
#define BOOTLOADER_VERSION 0
|
||||
#define MEM_SIZE 0x20000 //128K
|
||||
#define SIZE_OF_DESCRIPTION 100
|
||||
#define START_OF_USER_CODE (uint32_t)0x08006000
|
||||
#define SIZE_OF_CODE (uint32_t)(MEM_SIZE-(START_OF_USER_CODE-0x08000000)-SIZE_OF_DESCRIPTION)
|
||||
#ifdef STM32F10X_HD
|
||||
#define HW_TYPE 0 //0=high_density 1=medium_density;
|
||||
#elif STM32F10X_MD
|
||||
#define HW_TYPE 1 //0=high_density 1=medium_density;
|
||||
#endif
|
||||
#define BOARD_READABLE TRUE
|
||||
#define BOARD_WRITABLA TRUE
|
||||
#define MAX_DEL_RETRYS 3
|
||||
//------------------------
|
||||
// PIOS_LED
|
||||
//------------------------
|
||||
#define PIOS_LED_LED1_GPIO_PORT GPIOA
|
||||
#define PIOS_LED_LED1_GPIO_PIN GPIO_Pin_3
|
||||
#define PIOS_LED_LED1_GPIO_CLK RCC_APB2Periph_GPIOA
|
||||
#define PIOS_LED_NUM 1
|
||||
#define PIOS_LED_PORTS { PIOS_LED_LED1_GPIO_PORT }
|
||||
#define PIOS_LED_PINS { PIOS_LED_LED1_GPIO_PIN }
|
||||
#define PIOS_LED_CLKS { PIOS_LED_LED1_GPIO_CLK }
|
||||
|
||||
//-------------------------
|
||||
// Delay Timer
|
||||
//-------------------------
|
||||
#define PIOS_DELAY_TIMER TIM2
|
||||
#define PIOS_DELAY_TIMER_RCC_FUNC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE)
|
||||
|
||||
//-------------------------
|
||||
// System Settings
|
||||
//-------------------------
|
||||
#define PIOS_MASTER_CLOCK 72000000
|
||||
#define PIOS_PERIPHERAL_CLOCK (PIOS_MASTER_CLOCK / 2)
|
||||
#if defined(USE_BOOTLOADER)
|
||||
#define PIOS_NVIC_VECTTAB_FLASH ((uint32_t)0x08006000)
|
||||
#else
|
||||
#define PIOS_NVIC_VECTTAB_FLASH ((uint32_t)0x08000000)
|
||||
#endif
|
||||
|
||||
//-------------------------
|
||||
// Interrupt Priorities
|
||||
//-------------------------
|
||||
#define PIOS_IRQ_PRIO_LOW 12 // lower than RTOS
|
||||
#define PIOS_IRQ_PRIO_MID 8 // higher than RTOS
|
||||
#define PIOS_IRQ_PRIO_HIGH 5 // for SPI, ADC, I2C etc...
|
||||
#define PIOS_IRQ_PRIO_HIGHEST 4 // for USART etc...
|
||||
|
||||
//------------------------
|
||||
// PIOS_I2C
|
||||
// See also pios_board.c
|
||||
//------------------------
|
||||
#define PIOS_I2C_MAIN_ADAPTER 0
|
||||
|
||||
//-------------------------
|
||||
// SPI
|
||||
//
|
||||
// See also pios_board.c
|
||||
//-------------------------
|
||||
#define PIOS_SPI_OP 0
|
||||
|
||||
//-------------------------
|
||||
// PIOS_USART
|
||||
//-------------------------
|
||||
#define PIOS_USART_RX_BUFFER_SIZE 256
|
||||
#define PIOS_USART_TX_BUFFER_SIZE 256
|
||||
#define PIOS_COM_AUX 0
|
||||
#define PIOS_COM_DEBUG PIOS_COM_AUX
|
||||
|
||||
//-------------------------
|
||||
// ADC
|
||||
// PIOS_ADC_PinGet(0) = Accel Z
|
||||
// PIOS_ADC_PinGet(2) = Accel Y
|
||||
// PIOS_ADC_PinGet(4) = Accel X
|
||||
// PIOS_ADC_PinGet(1) = Gyro X
|
||||
// PIOS_ADC_PinGet(3) = Gyro Y
|
||||
// PIOS_ADC_PinGet(5) = Gyro Z
|
||||
// PIOS_ADC_PinGet(6) = XY Temp
|
||||
// PIOS_ADC_PinGet(7) = Z Temp
|
||||
//-------------------------
|
||||
//#define PIOS_ADC_OVERSAMPLING_RATE 1
|
||||
#define PIOS_ADC_USE_TEMP_SENSOR 0
|
||||
#define PIOS_ADC_TEMP_SENSOR_ADC ADC1
|
||||
#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 1
|
||||
|
||||
#define PIOS_ADC_PIN1_GPIO_PORT GPIOA // PA2 (Accel X)
|
||||
#define PIOS_ADC_PIN1_GPIO_PIN GPIO_Pin_2 // ADC12_IN2
|
||||
#define PIOS_ADC_PIN1_GPIO_CHANNEL ADC_Channel_2
|
||||
#define PIOS_ADC_PIN1_ADC ADC1
|
||||
#define PIOS_ADC_PIN1_ADC_NUMBER 1
|
||||
|
||||
#define PIOS_ADC_PIN2_GPIO_PORT GPIOA // PA1 (Accel Y)
|
||||
#define PIOS_ADC_PIN2_GPIO_PIN GPIO_Pin_1 // ADC123_IN1
|
||||
#define PIOS_ADC_PIN2_GPIO_CHANNEL ADC_Channel_1
|
||||
#define PIOS_ADC_PIN2_ADC ADC1
|
||||
#define PIOS_ADC_PIN2_ADC_NUMBER 2
|
||||
|
||||
#define PIOS_ADC_PIN3_GPIO_PORT GPIOA // PA0 (Accel Z)
|
||||
#define PIOS_ADC_PIN3_GPIO_PIN GPIO_Pin_0 // ADC12_IN0
|
||||
#define PIOS_ADC_PIN3_GPIO_CHANNEL ADC_Channel_0
|
||||
#define PIOS_ADC_PIN3_ADC ADC1
|
||||
#define PIOS_ADC_PIN3_ADC_NUMBER 3
|
||||
|
||||
#define PIOS_ADC_PIN4_GPIO_PORT GPIOA // PA6 (Temp_XY)
|
||||
#define PIOS_ADC_PIN4_GPIO_PIN GPIO_Pin_6 // ADC12_IN6
|
||||
#define PIOS_ADC_PIN4_GPIO_CHANNEL ADC_Channel_6
|
||||
#define PIOS_ADC_PIN4_ADC ADC1
|
||||
#define PIOS_ADC_PIN4_ADC_NUMBER 4
|
||||
|
||||
#define PIOS_ADC_PIN5_GPIO_PORT GPIOA // PA4 (Gyro X)
|
||||
#define PIOS_ADC_PIN5_GPIO_PIN GPIO_Pin_4 // ADC12_IN4
|
||||
#define PIOS_ADC_PIN5_GPIO_CHANNEL ADC_Channel_4
|
||||
#define PIOS_ADC_PIN5_ADC ADC2
|
||||
#define PIOS_ADC_PIN5_ADC_NUMBER 1
|
||||
|
||||
#define PIOS_ADC_PIN6_GPIO_PORT GPIOA // PA5 (Gyro Y)
|
||||
#define PIOS_ADC_PIN6_GPIO_PIN GPIO_Pin_5 // ADC12_IN5
|
||||
#define PIOS_ADC_PIN6_GPIO_CHANNEL ADC_Channel_5
|
||||
#define PIOS_ADC_PIN6_ADC ADC2
|
||||
#define PIOS_ADC_PIN6_ADC_NUMBER 2
|
||||
|
||||
#define PIOS_ADC_PIN7_GPIO_PORT GPIOA // PA7 (Gyro Z)
|
||||
#define PIOS_ADC_PIN7_GPIO_PIN GPIO_Pin_7 // ADC12_IN7
|
||||
#define PIOS_ADC_PIN7_GPIO_CHANNEL ADC_Channel_7
|
||||
#define PIOS_ADC_PIN7_ADC ADC2
|
||||
#define PIOS_ADC_PIN7_ADC_NUMBER 3
|
||||
|
||||
#define PIOS_ADC_PIN8_GPIO_PORT GPIOB // PB1 (Z Temp)
|
||||
#define PIOS_ADC_PIN8_GPIO_PIN GPIO_Pin_1 // ADC12_IN9
|
||||
#define PIOS_ADC_PIN8_GPIO_CHANNEL ADC_Channel_9
|
||||
#define PIOS_ADC_PIN8_ADC ADC2
|
||||
#define PIOS_ADC_PIN8_ADC_NUMBER 4
|
||||
|
||||
#define PIOS_ADC_NUM_PINS 8
|
||||
|
||||
#define PIOS_ADC_PORTS { PIOS_ADC_PIN1_GPIO_PORT, PIOS_ADC_PIN2_GPIO_PORT, PIOS_ADC_PIN3_GPIO_PORT, PIOS_ADC_PIN4_GPIO_PORT, PIOS_ADC_PIN5_GPIO_PORT, PIOS_ADC_PIN6_GPIO_PORT, PIOS_ADC_PIN7_GPIO_PORT, PIOS_ADC_PIN8_GPIO_PORT }
|
||||
#define PIOS_ADC_PINS { PIOS_ADC_PIN1_GPIO_PIN, PIOS_ADC_PIN2_GPIO_PIN, PIOS_ADC_PIN3_GPIO_PIN, PIOS_ADC_PIN4_GPIO_PIN, PIOS_ADC_PIN5_GPIO_PIN, PIOS_ADC_PIN6_GPIO_PIN, PIOS_ADC_PIN7_GPIO_PIN, PIOS_ADC_PIN8_GPIO_PIN }
|
||||
#define PIOS_ADC_CHANNELS { PIOS_ADC_PIN1_GPIO_CHANNEL, PIOS_ADC_PIN2_GPIO_CHANNEL, PIOS_ADC_PIN3_GPIO_CHANNEL, PIOS_ADC_PIN4_GPIO_CHANNEL, PIOS_ADC_PIN5_GPIO_CHANNEL, PIOS_ADC_PIN6_GPIO_CHANNEL, PIOS_ADC_PIN7_GPIO_CHANNEL, PIOS_ADC_PIN8_GPIO_CHANNEL }
|
||||
#define PIOS_ADC_MAPPING { PIOS_ADC_PIN1_ADC, PIOS_ADC_PIN2_ADC, PIOS_ADC_PIN3_ADC, PIOS_ADC_PIN4_ADC, PIOS_ADC_PIN5_ADC, PIOS_ADC_PIN6_ADC, PIOS_ADC_PIN7_ADC, PIOS_ADC_PIN8_ADC }
|
||||
#define PIOS_ADC_CHANNEL_MAPPING { PIOS_ADC_PIN1_ADC_NUMBER, PIOS_ADC_PIN2_ADC_NUMBER, PIOS_ADC_PIN3_ADC_NUMBER, PIOS_ADC_PIN4_ADC_NUMBER, PIOS_ADC_PIN5_ADC_NUMBER, PIOS_ADC_PIN6_ADC_NUMBER, PIOS_ADC_PIN7_ADC_NUMBER, PIOS_ADC_PIN8_ADC_NUMBER }
|
||||
#define PIOS_ADC_NUM_CHANNELS (PIOS_ADC_NUM_PINS + PIOS_ADC_USE_TEMP_SENSOR)
|
||||
#define PIOS_ADC_NUM_ADC_CHANNELS 2
|
||||
#define PIOS_ADC_USE_ADC2 1
|
||||
#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE)
|
||||
#define PIOS_ADC_ADCCLK RCC_PCLK2_Div8
|
||||
/* RCC_PCLK2_Div2: ADC clock = PCLK2/2 */
|
||||
/* RCC_PCLK2_Div4: ADC clock = PCLK2/4 */
|
||||
/* RCC_PCLK2_Div6: ADC clock = PCLK2/6 */
|
||||
/* RCC_PCLK2_Div8: ADC clock = PCLK2/8 */
|
||||
#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_239Cycles5
|
||||
/* Sample time: */
|
||||
/* With an ADCCLK = 14 MHz and a sampling time of 293.5 cycles: */
|
||||
/* Tconv = 239.5 + 12.5 = 252 cycles = 18<31>s */
|
||||
/* (1 / (ADCCLK / CYCLES)) = Sample Time (<28>S) */
|
||||
#define PIOS_ADC_IRQ_PRIO PIOS_IRQ_PRIO_HIGH
|
||||
|
||||
|
||||
//-------------------------
|
||||
// GPIO
|
||||
//-------------------------
|
||||
#define PIOS_GPIO_1_PORT GPIOB
|
||||
#define PIOS_GPIO_1_PIN GPIO_Pin_9
|
||||
#define PIOS_GPIO_1_GPIO_CLK RCC_APB2Periph_GPIOB
|
||||
#define PIOS_GPIO_PORTS { PIOS_GPIO_1_PORT }
|
||||
#define PIOS_GPIO_PINS { PIOS_GPIO_1_PIN }
|
||||
#define PIOS_GPIO_CLKS { PIOS_GPIO_1_GPIO_CLK }
|
||||
#define PIOS_GPIO_NUM 1
|
||||
#define SET_ACCEL_2G PIOS_GPIO_On(0);
|
||||
#define SET_ACCEL_6G PIOS_GPIO_Off(0)
|
||||
|
||||
#endif /* PIOS_BOARD_H */
|
||||
46
flight/Bootloaders/AHRS/inc/pios_config.h
Normal file
46
flight/Bootloaders/AHRS/inc/pios_config.h
Normal file
@ -0,0 +1,46 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
*
|
||||
* @file pios_config.h
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief PiOS configuration header.
|
||||
* - Central compile time config for the project.
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PIOS_CONFIG_H
|
||||
#define PIOS_CONFIG_H
|
||||
|
||||
/* Enable/Disable PiOS Modules */
|
||||
//#define PIOS_INCLUDE_ADC
|
||||
#define PIOS_INCLUDE_DELAY
|
||||
//#define PIOS_INCLUDE_I2C
|
||||
#define PIOS_INCLUDE_IRQ
|
||||
#define PIOS_INCLUDE_LED
|
||||
#define PIOS_INCLUDE_SPI
|
||||
#define PIOS_INCLUDE_SYS
|
||||
#define PIOS_INCLUDE_BL_HELPER
|
||||
//#define PIOS_INCLUDE_USART
|
||||
//#define PIOS_INCLUDE_COM
|
||||
//#define PIOS_INCLUDE_HMC5843
|
||||
#define PIOS_INCLUDE_GPIO
|
||||
|
||||
|
||||
#endif /* PIOS_CONFIG_H */
|
||||
226
flight/Bootloaders/AHRS/main.c
Normal file
226
flight/Bootloaders/AHRS/main.c
Normal file
@ -0,0 +1,226 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @addtogroup AHRS BOOTLOADER
|
||||
* @brief The AHRS Modules perform
|
||||
*
|
||||
* @{
|
||||
* @addtogroup AHRS_BOOTLOADER_Main
|
||||
* @brief Main function which does the hardware dependent stuff
|
||||
* @{
|
||||
*
|
||||
*
|
||||
* @file main.c
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/* OpenPilot Includes */
|
||||
#include "ahrs_bl.h"
|
||||
#include "pios_opahrs_proto.h"
|
||||
#include "bl_fsm.h" /* lfsm_state */
|
||||
#include "stm32f10x_flash.h"
|
||||
|
||||
#define NSS_HOLD_STATE ((GPIOB->IDR & GPIO_Pin_12) ? 0 : 1)
|
||||
enum bootloader_status boot_status;
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
typedef void (*pFunction)(void);
|
||||
pFunction Jump_To_Application;
|
||||
uint32_t JumpAddress;
|
||||
/* Function Prototypes */
|
||||
void process_spi_request(void);
|
||||
void jump_to_app();
|
||||
uint8_t jumpFW = FALSE;
|
||||
uint32_t Fw_crc;
|
||||
/**
|
||||
* @brief Bootloader Main function
|
||||
*/
|
||||
int main() {
|
||||
|
||||
uint8_t GO_dfu = false;
|
||||
/* Brings up System using CMSIS functions, enables the LEDs. */
|
||||
PIOS_SYS_Init();
|
||||
/* Delay system */
|
||||
PIOS_DELAY_Init();
|
||||
for (uint32_t t = 0; t < 20000000; ++t) {
|
||||
if (NSS_HOLD_STATE == 0)
|
||||
GO_dfu = TRUE;
|
||||
else {
|
||||
GO_dfu = FALSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
GO_dfu = GO_dfu;// OR with app boot request
|
||||
if (GO_dfu == FALSE) {
|
||||
jump_to_app();
|
||||
}
|
||||
/* SPI link to master */
|
||||
PIOS_SPI_Init();
|
||||
lfsm_init();
|
||||
boot_status = idle;
|
||||
Fw_crc = crc_memory_calc();
|
||||
while (1) {
|
||||
process_spi_request();
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct opahrs_msg_v0 link_tx_v0;
|
||||
static struct opahrs_msg_v0 link_rx_v0;
|
||||
static struct opahrs_msg_v0 user_tx_v0;
|
||||
static struct opahrs_msg_v0 user_rx_v0;
|
||||
void process_spi_request(void) {
|
||||
bool msg_to_process = FALSE;
|
||||
|
||||
PIOS_IRQ_Disable();
|
||||
/* Figure out if we're in an interesting stable state */
|
||||
switch (lfsm_get_state()) {
|
||||
case LFSM_STATE_USER_BUSY:
|
||||
msg_to_process = TRUE;
|
||||
break;
|
||||
case LFSM_STATE_INACTIVE:
|
||||
/* Queue up a receive buffer */
|
||||
lfsm_user_set_rx_v0(&user_rx_v0);
|
||||
lfsm_user_done();
|
||||
break;
|
||||
case LFSM_STATE_STOPPED:
|
||||
/* Get things going */
|
||||
lfsm_set_link_proto_v0(&link_tx_v0, &link_rx_v0);
|
||||
break;
|
||||
default:
|
||||
/* Not a stable state */
|
||||
break;
|
||||
}
|
||||
PIOS_IRQ_Enable();
|
||||
|
||||
if (!msg_to_process) {
|
||||
/* Nothing to do */
|
||||
//PIOS_COM_SendFormattedString(PIOS_COM_AUX, ".");
|
||||
return;
|
||||
}
|
||||
|
||||
if (user_rx_v0.tail.magic != OPAHRS_MSG_MAGIC_TAIL) {
|
||||
return;
|
||||
}
|
||||
|
||||
switch (user_rx_v0.payload.user.t) {
|
||||
|
||||
case OPAHRS_MSG_V0_REQ_FWUP_VERIFY:
|
||||
opahrs_msg_v0_init_user_tx(&user_tx_v0, OPAHRS_MSG_V0_RSP_FWUP_STATUS);
|
||||
Fw_crc = crc_memory_calc();
|
||||
lfsm_user_set_tx_v0(&user_tx_v0);
|
||||
user_tx_v0.payload.user.v.rsp.fwup_status.status = boot_status;
|
||||
break;
|
||||
case OPAHRS_MSG_V0_REQ_RESET:
|
||||
PIOS_DELAY_WaitmS(user_rx_v0.payload.user.v.req.reset.reset_delay_in_ms);
|
||||
PIOS_SYS_Reset();
|
||||
break;
|
||||
case OPAHRS_MSG_V0_REQ_VERSIONS:
|
||||
PIOS_LED_Toggle(LED1);
|
||||
opahrs_msg_v0_init_user_tx(&user_tx_v0, OPAHRS_MSG_V0_RSP_VERSIONS);
|
||||
user_tx_v0.payload.user.v.rsp.versions.bl_version = BOOTLOADER_VERSION;
|
||||
user_tx_v0.payload.user.v.rsp.versions.hw_version = HW_VERSION;
|
||||
user_tx_v0.payload.user.v.rsp.versions.fw_version = Fw_crc;
|
||||
read_description(
|
||||
(uint8_t *) &(user_tx_v0.payload.user.v.rsp.versions.description));
|
||||
lfsm_user_set_tx_v0(&user_tx_v0);
|
||||
break;
|
||||
case OPAHRS_MSG_V0_REQ_MEM_MAP:
|
||||
opahrs_msg_v0_init_user_tx(&user_tx_v0, OPAHRS_MSG_V0_RSP_MEM_MAP);
|
||||
user_tx_v0.payload.user.v.rsp.mem_map.density = HW_TYPE;
|
||||
user_tx_v0.payload.user.v.rsp.mem_map.rw_flags = 0;//TODO
|
||||
user_tx_v0.payload.user.v.rsp.mem_map.size_of_code_memory
|
||||
= SIZE_OF_CODE;
|
||||
user_tx_v0.payload.user.v.rsp.mem_map.size_of_description
|
||||
= SIZE_OF_DESCRIPTION;
|
||||
user_tx_v0.payload.user.v.rsp.mem_map.start_of_user_code
|
||||
= START_OF_USER_CODE;
|
||||
//read_description(
|
||||
// (uint8_t *) &(user_tx_v0.payload.user.v.rsp.versions.description));
|
||||
lfsm_user_set_tx_v0(&user_tx_v0);
|
||||
break;
|
||||
case OPAHRS_MSG_V0_REQ_SERIAL:
|
||||
opahrs_msg_v0_init_user_tx(&user_tx_v0, OPAHRS_MSG_V0_RSP_SERIAL);
|
||||
PIOS_SYS_SerialNumberGet(
|
||||
(char *) &(user_tx_v0.payload.user.v.rsp.serial.serial_bcd));
|
||||
lfsm_user_set_tx_v0(&user_tx_v0);
|
||||
//PIOS_LED_Toggle(LED1);
|
||||
break;
|
||||
case OPAHRS_MSG_V0_REQ_FWUP_DATA:
|
||||
opahrs_msg_v0_init_user_tx(&user_tx_v0, OPAHRS_MSG_V0_REQ_FWUP_DATA);
|
||||
if (!(user_rx_v0.payload.user.v.req.fwup_data.adress
|
||||
< START_OF_USER_CODE)) {
|
||||
if (FLASH_ProgramWord(
|
||||
user_rx_v0.payload.user.v.req.fwup_data.adress,
|
||||
user_rx_v0.payload.user.v.req.fwup_data.data)
|
||||
!= FLASH_COMPLETE) {
|
||||
boot_status = write_error;
|
||||
}
|
||||
|
||||
} else {
|
||||
boot_status = outside_dev_capabilities;
|
||||
}
|
||||
user_tx_v0.payload.user.v.rsp.fwup_status.status = boot_status;
|
||||
lfsm_user_set_tx_v0(&user_tx_v0);
|
||||
break;
|
||||
case OPAHRS_MSG_V0_REQ_FWUP_START:
|
||||
opahrs_msg_v0_init_user_tx(&user_tx_v0, OPAHRS_MSG_V0_RSP_FWUP_STATUS);
|
||||
if (FLASH_Start() == TRUE) {
|
||||
boot_status = started;
|
||||
} else {
|
||||
boot_status = start_failed;
|
||||
break;
|
||||
}
|
||||
|
||||
user_tx_v0.payload.user.v.rsp.fwup_status.status = boot_status;
|
||||
lfsm_user_set_tx_v0(&user_tx_v0);
|
||||
break;
|
||||
case OPAHRS_MSG_V0_REQ_BOOT:
|
||||
PIOS_DELAY_WaitmS(user_rx_v0.payload.user.v.req.boot.boot_delay_in_ms);
|
||||
FLASH_Lock();
|
||||
jump_to_app();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* Finished processing the received message, requeue it */
|
||||
lfsm_user_set_rx_v0(&user_rx_v0);
|
||||
lfsm_user_done();
|
||||
}
|
||||
void jump_to_app() {
|
||||
if (((*(__IO uint32_t*) START_OF_USER_CODE) & 0x2FFE0000) == 0x20000000) { /* Jump to user application */
|
||||
FLASH_Lock();
|
||||
RCC_APB2PeriphResetCmd(0xffffffff, ENABLE);
|
||||
RCC_APB1PeriphResetCmd(0xffffffff, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(0xffffffff, DISABLE);
|
||||
RCC_APB1PeriphResetCmd(0xffffffff, DISABLE);
|
||||
//_SetCNTR(0); // clear interrupt mask
|
||||
//_SetISTR(0); // clear all requests
|
||||
|
||||
JumpAddress = *(__IO uint32_t*) (START_OF_USER_CODE + 4);
|
||||
Jump_To_Application = (pFunction) JumpAddress;
|
||||
/* Initialize user application's Stack Pointer */
|
||||
__set_MSP(*(__IO uint32_t*) START_OF_USER_CODE);
|
||||
Jump_To_Application();
|
||||
} else {
|
||||
boot_status = jump_failed;
|
||||
return;
|
||||
}
|
||||
}
|
||||
322
flight/Bootloaders/AHRS/pios_board.c
Normal file
322
flight/Bootloaders/AHRS/pios_board.c
Normal file
@ -0,0 +1,322 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
*
|
||||
* @file pios_board.c
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief Defines board specific static initializers for hardware for the AHRS board.
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <pios.h>
|
||||
|
||||
#if defined(PIOS_INCLUDE_SPI)
|
||||
|
||||
#include <pios_spi_priv.h>
|
||||
|
||||
/* OP Interface
|
||||
*
|
||||
* NOTE: Leave this declared as const data so that it ends up in the
|
||||
* .rodata section (ie. Flash) rather than in the .bss section (RAM).
|
||||
*/
|
||||
void PIOS_SPI_op_irq_handler(void);
|
||||
void DMA1_Channel5_IRQHandler() __attribute__ ((alias ("PIOS_SPI_op_irq_handler")));
|
||||
void DMA1_Channel4_IRQHandler() __attribute__ ((alias ("PIOS_SPI_op_irq_handler")));
|
||||
static const struct pios_spi_cfg pios_spi_op_cfg = {
|
||||
.regs = SPI2,
|
||||
.init = {
|
||||
.SPI_Mode = SPI_Mode_Slave,
|
||||
.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
|
||||
.SPI_DataSize = SPI_DataSize_8b,
|
||||
.SPI_NSS = SPI_NSS_Hard,
|
||||
.SPI_FirstBit = SPI_FirstBit_MSB,
|
||||
.SPI_CRCPolynomial = 7,
|
||||
.SPI_CPOL = SPI_CPOL_High,
|
||||
.SPI_CPHA = SPI_CPHA_2Edge,
|
||||
},
|
||||
.use_crc = TRUE,
|
||||
.dma = {
|
||||
.ahb_clk = RCC_AHBPeriph_DMA1,
|
||||
|
||||
.irq = {
|
||||
.handler = PIOS_SPI_op_irq_handler,
|
||||
.flags = (DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 | DMA1_FLAG_GL4),
|
||||
.init = {
|
||||
.NVIC_IRQChannel = DMA1_Channel4_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
|
||||
.rx = {
|
||||
.channel = DMA1_Channel4,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralSRC,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.channel = DMA1_Channel5,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralDST,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
},
|
||||
.ssel = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_12,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
},
|
||||
.sclk = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_13,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
},
|
||||
.miso = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_14,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
.mosi = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_15,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Board specific number of devices.
|
||||
*/
|
||||
struct pios_spi_dev pios_spi_devs[] = {
|
||||
{
|
||||
.cfg = &pios_spi_op_cfg,
|
||||
},
|
||||
};
|
||||
|
||||
uint8_t pios_spi_num_devices = NELEMENTS(pios_spi_devs);
|
||||
|
||||
void PIOS_SPI_op_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
PIOS_SPI_IRQ_Handler(PIOS_SPI_OP);
|
||||
}
|
||||
|
||||
#endif /* PIOS_INCLUDE_SPI */
|
||||
|
||||
#if defined(PIOS_INCLUDE_USART)
|
||||
#include <pios_usart_priv.h>
|
||||
|
||||
/*
|
||||
* AUX USART
|
||||
*/
|
||||
void PIOS_USART_aux_irq_handler(void);
|
||||
void USART3_IRQHandler() __attribute__ ((alias ("PIOS_USART_aux_irq_handler")));
|
||||
const struct pios_usart_cfg pios_usart_aux_cfg = {
|
||||
.regs = USART3,
|
||||
.init = {
|
||||
.USART_BaudRate = 115200,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx,
|
||||
},
|
||||
.irq = {
|
||||
.handler = PIOS_USART_aux_irq_handler,
|
||||
.init = {
|
||||
.NVIC_IRQChannel = USART3_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.rx = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_11,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IPU,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Board specific number of devices.
|
||||
*/
|
||||
struct pios_usart_dev pios_usart_devs[] = {
|
||||
#define PIOS_USART_AUX 0
|
||||
{
|
||||
.cfg = &pios_usart_aux_cfg,
|
||||
},
|
||||
};
|
||||
|
||||
uint8_t pios_usart_num_devices = NELEMENTS(pios_usart_devs);
|
||||
|
||||
void PIOS_USART_aux_irq_handler(void)
|
||||
{
|
||||
PIOS_USART_IRQ_Handler(PIOS_USART_AUX);
|
||||
}
|
||||
|
||||
#endif /* PIOS_INCLUDE_USART */
|
||||
|
||||
#if defined(PIOS_INCLUDE_COM)
|
||||
#include <pios_com_priv.h>
|
||||
|
||||
/*
|
||||
* COM devices
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board specific number of devices.
|
||||
*/
|
||||
extern const struct pios_com_driver pios_usart_com_driver;
|
||||
|
||||
struct pios_com_dev pios_com_devs[] = {
|
||||
{
|
||||
.id = PIOS_USART_AUX,
|
||||
.driver = &pios_usart_com_driver,
|
||||
},
|
||||
};
|
||||
|
||||
const uint8_t pios_com_num_devices = NELEMENTS(pios_com_devs);
|
||||
|
||||
#endif /* PIOS_INCLUDE_COM */
|
||||
|
||||
#if defined(PIOS_INCLUDE_I2C)
|
||||
#include <pios_i2c_priv.h>
|
||||
|
||||
/*
|
||||
* I2C Adapters
|
||||
*/
|
||||
|
||||
void PIOS_I2C_main_adapter_ev_irq_handler(void);
|
||||
void PIOS_I2C_main_adapter_er_irq_handler(void);
|
||||
void I2C1_EV_IRQHandler() __attribute__ ((alias ("PIOS_I2C_main_adapter_ev_irq_handler")));
|
||||
void I2C1_ER_IRQHandler() __attribute__ ((alias ("PIOS_I2C_main_adapter_er_irq_handler")));
|
||||
|
||||
const struct pios_i2c_adapter_cfg pios_i2c_main_adapter_cfg = {
|
||||
.regs = I2C1,
|
||||
.init = {
|
||||
.I2C_Mode = I2C_Mode_I2C,
|
||||
.I2C_OwnAddress1 = 0,
|
||||
.I2C_Ack = I2C_Ack_Enable,
|
||||
.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit,
|
||||
.I2C_DutyCycle = I2C_DutyCycle_2,
|
||||
.I2C_ClockSpeed = 200000, /* bits/s */
|
||||
},
|
||||
.transfer_timeout_ms = 50,
|
||||
.scl = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_6,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_OD,
|
||||
},
|
||||
},
|
||||
.sda = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_7,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_OD,
|
||||
},
|
||||
},
|
||||
.event = {
|
||||
.handler = PIOS_I2C_main_adapter_ev_irq_handler,
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C1_EV_IRQn,
|
||||
//.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelPreemptionPriority = 2,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.error = {
|
||||
.handler = PIOS_I2C_main_adapter_er_irq_handler,
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C1_ER_IRQn,
|
||||
//.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelPreemptionPriority = 2,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Board specific number of devices.
|
||||
*/
|
||||
struct pios_i2c_adapter pios_i2c_adapters[] = {
|
||||
{
|
||||
.cfg = &pios_i2c_main_adapter_cfg,
|
||||
},
|
||||
};
|
||||
|
||||
uint8_t pios_i2c_num_adapters = NELEMENTS(pios_i2c_adapters);
|
||||
|
||||
void PIOS_I2C_main_adapter_ev_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
PIOS_I2C_EV_IRQ_Handler(PIOS_I2C_MAIN_ADAPTER);
|
||||
}
|
||||
|
||||
void PIOS_I2C_main_adapter_er_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
PIOS_I2C_ER_IRQ_Handler(PIOS_I2C_MAIN_ADAPTER);
|
||||
}
|
||||
|
||||
#endif /* PIOS_INCLUDE_I2C */
|
||||
703
flight/Bootloaders/OpenPilot/Makefile
Normal file
703
flight/Bootloaders/OpenPilot/Makefile
Normal file
@ -0,0 +1,703 @@
|
||||
#####
|
||||
# Project: OpenPilot
|
||||
#
|
||||
#
|
||||
# Makefile for OpenPilot project build PiOS and the AP.
|
||||
#
|
||||
# The OpenPilot Team, http://www.openpilot.org, Copyright (C) 2009.
|
||||
#
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful, but
|
||||
# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
# for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License along
|
||||
# with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
# 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
#####
|
||||
|
||||
|
||||
# Set developer code and compile options
|
||||
# Set to YES to compile for debugging
|
||||
DEBUG ?= YES
|
||||
|
||||
# Set to YES to use the Servo output pins for debugging via scope or logic analyser
|
||||
ENABLE_DEBUG_PINS ?= NO
|
||||
|
||||
# Set to Yes to enable the AUX UART which is mapped on the S1 (Tx) and S2 (Rx) servo outputs
|
||||
ENABLE_AUX_UART ?= NO
|
||||
|
||||
#
|
||||
USE_BOOTLOADER ?= NO
|
||||
|
||||
|
||||
# Set to YES when using Code Sourcery toolchain
|
||||
CODE_SOURCERY ?= NO
|
||||
|
||||
# Toolchain prefix (i.e arm-elf- -> arm-elf-gcc.exe)
|
||||
TCHAIN_PREFIX ?= arm-none-eabi-
|
||||
|
||||
# Remove command is different for Code Sourcery on Windows
|
||||
ifeq ($(CODE_SOURCERY), YES)
|
||||
REMOVE_CMD = cs-rm
|
||||
else
|
||||
REMOVE_CMD = rm
|
||||
endif
|
||||
|
||||
FLASH_TOOL = OPENOCD
|
||||
|
||||
# YES enables -mthumb option to flags for source-files listed
|
||||
# in SRC and CPPSRC
|
||||
USE_THUMB_MODE = YES
|
||||
|
||||
|
||||
# MCU name, submodel and board
|
||||
# - MCU used for compiler-option (-mcpu)
|
||||
# - MODEL used for linker-script name (-T) and passed as define
|
||||
# - BOARD just passed as define (optional)
|
||||
MCU = cortex-m3
|
||||
CHIP = STM32F103RET
|
||||
BOARD = STM3210E_OP
|
||||
MODEL = HD
|
||||
ifeq ($(USE_BOOTLOADER), YES)
|
||||
BOOT_MODEL = $(MODEL)_BL
|
||||
|
||||
else
|
||||
BOOT_MODEL = $(MODEL)_NB
|
||||
endif
|
||||
|
||||
# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
|
||||
OUTDIR = Build
|
||||
|
||||
# Target file name (without extension).
|
||||
TARGET = OpenPilot_BL
|
||||
|
||||
# Paths
|
||||
OPSYSTEM = .
|
||||
OPSYSTEMINC = $(OPSYSTEM)/inc
|
||||
OPUAVTALK = ./UAVTalk
|
||||
OPUAVTALKINC = $(OPUAVTALK)/inc
|
||||
OPUAVOBJ = ./UAVObjects
|
||||
OPUAVOBJINC = $(OPUAVOBJ)/inc
|
||||
OPTESTS = ./Tests
|
||||
OPMODULEDIR = ./Modules
|
||||
FLIGHTLIB = ../Libraries
|
||||
FLIGHTLIBINC = ../Libraries/inc
|
||||
PIOS = ../PiOS
|
||||
PIOSINC = $(PIOS)/inc
|
||||
PIOSSTM32F10X = $(PIOS)/STM32F10x
|
||||
PIOSCOMMON = $(PIOS)/Common
|
||||
APPLIBDIR = $(PIOSSTM32F10X)/Libraries
|
||||
STMLIBDIR = $(APPLIBDIR)
|
||||
STMSPDDIR = $(STMLIBDIR)/STM32F10x_StdPeriph_Driver
|
||||
STMUSBDIR = $(STMLIBDIR)/STM32_USB-FS-Device_Driver
|
||||
STMSPDSRCDIR = $(STMSPDDIR)/src
|
||||
STMSPDINCDIR = $(STMSPDDIR)/inc
|
||||
STMUSBSRCDIR = $(STMUSBDIR)/src
|
||||
STMUSBINCDIR = $(STMUSBDIR)/inc
|
||||
CMSISDIR = $(STMLIBDIR)/CMSIS/Core/CM3
|
||||
DOSFSDIR = $(APPLIBDIR)/dosfs
|
||||
MSDDIR = $(APPLIBDIR)/msd
|
||||
RTOSDIR = $(APPLIBDIR)/FreeRTOS
|
||||
RTOSSRCDIR = $(RTOSDIR)/Source
|
||||
RTOSINCDIR = $(RTOSSRCDIR)/include
|
||||
DOXYGENDIR = ../Doc/Doxygen
|
||||
|
||||
# List C source files here. (C dependencies are automatically generated.)
|
||||
# use file-extension c for "c-only"-files
|
||||
|
||||
## OPENPILOT_BL CORE:
|
||||
SRC += $(OPSYSTEM)/main.c
|
||||
SRC += $(OPSYSTEM)/pios_board.c
|
||||
SRC += $(OPSYSTEM)/op_dfu.c
|
||||
SRC += $(OPSYSTEM)/stopwatch.c
|
||||
|
||||
|
||||
|
||||
|
||||
## PIOS Hardware (STM32F10x)
|
||||
SRC += $(PIOSSTM32F10X)/pios_sys.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_led.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_delay.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_usart.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_irq.c
|
||||
#SRC += $(PIOSSTM32F10X)/pios_adc.c
|
||||
#SRC += $(PIOSSTM32F10X)/pios_servo.c
|
||||
#SRC += $(PIOSSTM32F10X)/pios_i2c.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_spi.c
|
||||
#SRC += $(PIOSSTM32F10X)/pios_ppm.c
|
||||
#SRC += $(PIOSSTM32F10X)/pios_pwm.c
|
||||
#SRC += $(PIOSSTM32F10X)/pios_spektrum.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_debug.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_gpio.c
|
||||
#SRC += $(PIOSSTM32F10X)/pios_exti.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_wdg.c
|
||||
|
||||
|
||||
# PIOS USB related files (seperated to make code maintenance more easy)
|
||||
SRC += $(PIOSSTM32F10X)/pios_usb_hid.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_usb_hid_desc.c
|
||||
#SRC += $(PIOSSTM32F10X)/pios_usb_hid_endp.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_usb_hid_istr.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_usb_hid_prop.c
|
||||
SRC += $(PIOSSTM32F10X)/pios_usb_hid_pwr.c
|
||||
|
||||
## PIOS Hardware (Common)
|
||||
#SRC += $(PIOSCOMMON)/pios_sdcard.c
|
||||
SRC += $(PIOSCOMMON)/pios_com.c
|
||||
SRC += $(PIOSCOMMON)/pios_bmp085.c
|
||||
SRC += $(PIOSCOMMON)/pios_opahrs_v0.c
|
||||
SRC += $(PIOSCOMMON)/pios_bl_helper.c
|
||||
|
||||
SRC += $(PIOSCOMMON)/pios_opahrs_proto.c
|
||||
SRC += $(PIOSCOMMON)/printf-stdarg.c
|
||||
|
||||
## Libraries for flight calculations
|
||||
SRC += $(FLIGHTLIB)/buffer.c
|
||||
#SRC += $(FLIGHTLIB)/WorldMagModel.c
|
||||
#SRC += $(FLIGHTLIB)/CoordinateConversions.c
|
||||
|
||||
## CMSIS for STM32
|
||||
SRC += $(CMSISDIR)/core_cm3.c
|
||||
SRC += $(CMSISDIR)/system_stm32f10x.c
|
||||
|
||||
## Used parts of the STM-Library
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_adc.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_bkp.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_crc.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_dac.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_dma.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_exti.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_flash.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_gpio.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_i2c.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_pwr.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_rcc.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_rtc.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_spi.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_tim.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_usart.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_iwdg.c
|
||||
SRC += $(STMSPDSRCDIR)/stm32f10x_dbgmcu.c
|
||||
SRC += $(STMSPDSRCDIR)/misc.c
|
||||
|
||||
## STM32 USB Library
|
||||
SRC += $(STMUSBSRCDIR)/usb_core.c
|
||||
SRC += $(STMUSBSRCDIR)/usb_init.c
|
||||
SRC += $(STMUSBSRCDIR)/usb_int.c
|
||||
SRC += $(STMUSBSRCDIR)/usb_mem.c
|
||||
SRC += $(STMUSBSRCDIR)/usb_regs.c
|
||||
SRC += $(STMUSBSRCDIR)/usb_sil.c
|
||||
|
||||
## RTOS
|
||||
#SRC += $(RTOSSRCDIR)/list.c
|
||||
#SRC += $(RTOSSRCDIR)/queue.c
|
||||
#SRC += $(RTOSSRCDIR)/tasks.c
|
||||
|
||||
## RTOS Portable
|
||||
#SRC += $(RTOSSRCDIR)/portable/GCC/ARM_CM3/port.c
|
||||
#SRC += $(RTOSSRCDIR)/portable/MemMang/heap_2.c
|
||||
|
||||
## Dosfs file system
|
||||
#SRC += $(DOSFSDIR)/dosfs.c
|
||||
#SRC += $(DOSFSDIR)/dfs_sdcard.c
|
||||
|
||||
## Mass Storage Device
|
||||
#SRC += $(MSDDIR)/msd.c
|
||||
#SRC += $(MSDDIR)/msd_bot.c
|
||||
#SRC += $(MSDDIR)/msd_desc.c
|
||||
#SRC += $(MSDDIR)/msd_memory.c
|
||||
#SRC += $(MSDDIR)/msd_scsi.c
|
||||
#SRC += $(MSDDIR)/msd_scsi_data.c
|
||||
|
||||
# List C source files here which must be compiled in ARM-Mode (no -mthumb).
|
||||
# use file-extension c for "c-only"-files
|
||||
## just for testing, timer.c could be compiled in thumb-mode too
|
||||
SRCARM =
|
||||
|
||||
# List C++ source files here.
|
||||
# use file-extension .cpp for C++-files (not .C)
|
||||
CPPSRC =
|
||||
|
||||
# List C++ source files here which must be compiled in ARM-Mode.
|
||||
# use file-extension .cpp for C++-files (not .C)
|
||||
#CPPSRCARM = $(TARGET).cpp
|
||||
CPPSRCARM =
|
||||
|
||||
# List Assembler source files here.
|
||||
# Make them always end in a capital .S. Files ending in a lowercase .s
|
||||
# will not be considered source files but generated files (assembler
|
||||
# output from the compiler), and will be deleted upon "make clean"!
|
||||
# Even though the DOS/Win* filesystem matches both .s and .S the same,
|
||||
# it will preserve the spelling of the filenames, and gcc itself does
|
||||
# care about how the name is spelled on its command-line.
|
||||
ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL).S
|
||||
|
||||
# List Assembler source files here which must be assembled in ARM-Mode..
|
||||
ASRCARM =
|
||||
|
||||
# List any extra directories to look for include files here.
|
||||
# Each directory must be seperated by a space.
|
||||
EXTRAINCDIRS = $(OPSYSTEM)
|
||||
EXTRAINCDIRS += $(OPSYSTEMINC)
|
||||
EXTRAINCDIRS += $(OPUAVTALK)
|
||||
EXTRAINCDIRS += $(OPUAVTALKINC)
|
||||
EXTRAINCDIRS += $(OPUAVOBJ)
|
||||
EXTRAINCDIRS += $(OPUAVOBJINC)
|
||||
EXTRAINCDIRS += $(PIOS)
|
||||
EXTRAINCDIRS += $(PIOSINC)
|
||||
EXTRAINCDIRS += $(FLIGHTLIBINC)
|
||||
EXTRAINCDIRS += $(PIOSSTM32F10X)
|
||||
EXTRAINCDIRS += $(PIOSCOMMON)
|
||||
EXTRAINCDIRS += $(STMSPDINCDIR)
|
||||
EXTRAINCDIRS += $(STMUSBINCDIR)
|
||||
EXTRAINCDIRS += $(CMSISDIR)
|
||||
EXTRAINCDIRS += $(DOSFSDIR)
|
||||
EXTRAINCDIRS += $(MSDDIR)
|
||||
EXTRAINCDIRS += $(RTOSINCDIR)
|
||||
EXTRAINCDIRS += $(APPLIBDIR)
|
||||
EXTRAINCDIRS += $(RTOSSRCDIR)/portable/GCC/ARM_CM3
|
||||
|
||||
|
||||
|
||||
# List any extra directories to look for library files here.
|
||||
# Also add directories where the linker should search for
|
||||
# includes from linker-script to the list
|
||||
# Each directory must be seperated by a space.
|
||||
EXTRA_LIBDIRS =
|
||||
|
||||
# Extra Libraries
|
||||
# Each library-name must be seperated by a space.
|
||||
# i.e. to link with libxyz.a, libabc.a and libefsl.a:
|
||||
# EXTRA_LIBS = xyz abc efsl
|
||||
# for newlib-lpc (file: libnewlibc-lpc.a):
|
||||
# EXTRA_LIBS = newlib-lpc
|
||||
EXTRA_LIBS =
|
||||
|
||||
# Path to Linker-Scripts
|
||||
LINKERSCRIPTPATH = $(PIOSSTM32F10X)
|
||||
|
||||
# Optimization level, can be [0, 1, 2, 3, s].
|
||||
# 0 = turn off optimization. s = optimize for size.
|
||||
# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
|
||||
|
||||
ifeq ($(DEBUG),YES)
|
||||
OPT = 0
|
||||
else
|
||||
OPT = s
|
||||
endif
|
||||
|
||||
# Output format. (can be ihex or binary or both)
|
||||
# binary to create a load-image in raw-binary format i.e. for SAM-BA,
|
||||
# ihex to create a load-image in Intel hex format
|
||||
#LOADFORMAT = ihex
|
||||
#LOADFORMAT = binary
|
||||
LOADFORMAT = both
|
||||
|
||||
# Debugging format.
|
||||
DEBUGF = dwarf-2
|
||||
|
||||
# Place project-specific -D (define) and/or
|
||||
# -U options for C here.
|
||||
CDEFS = -DSTM32F10X_$(MODEL)
|
||||
CDEFS += -DUSE_STDPERIPH_DRIVER
|
||||
CDEFS += -DUSE_$(BOARD)
|
||||
ifeq ($(ENABLE_DEBUG_PINS), YES)
|
||||
CDEFS += -DPIOS_ENABLE_DEBUG_PINS
|
||||
endif
|
||||
ifeq ($(ENABLE_AUX_UART), YES)
|
||||
CDEFS += -DPIOS_ENABLE_AUX_UART
|
||||
endif
|
||||
ifeq ($(USE_BOOTLOADER), YES)
|
||||
CDEFS += -DUSE_BOOTLOADER
|
||||
endif
|
||||
|
||||
|
||||
# Place project-specific -D and/or -U options for
|
||||
# Assembler with preprocessor here.
|
||||
#ADEFS = -DUSE_IRQ_ASM_WRAPPER
|
||||
ADEFS = -D__ASSEMBLY__
|
||||
|
||||
# Compiler flag to set the C Standard level.
|
||||
# c89 - "ANSI" C
|
||||
# gnu89 - c89 plus GCC extensions
|
||||
# c99 - ISO C99 standard (not yet fully implemented)
|
||||
# gnu99 - c99 plus GCC extensions
|
||||
CSTANDARD = -std=gnu99
|
||||
|
||||
#-----
|
||||
|
||||
# Compiler flags.
|
||||
|
||||
# -g*: generate debugging information
|
||||
# -O*: optimization level
|
||||
# -f...: tuning, see GCC manual and avr-libc documentation
|
||||
# -Wall...: warning level
|
||||
# -Wa,...: tell GCC to pass this to the assembler.
|
||||
# -adhlns...: create assembler listing
|
||||
#
|
||||
# Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
|
||||
|
||||
ifeq ($(DEBUG),YES)
|
||||
CFLAGS = -g$(DEBUGF) -DDEBUG
|
||||
endif
|
||||
|
||||
CFLAGS += -O$(OPT)
|
||||
CFLAGS += -mcpu=$(MCU) -mthumb
|
||||
CFLAGS += $(CDEFS)
|
||||
CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -I.
|
||||
|
||||
CFLAGS += -mapcs-frame
|
||||
CFLAGS += -fomit-frame-pointer
|
||||
CFLAGS += -fpromote-loop-indices
|
||||
|
||||
CFLAGS += -Wall
|
||||
CFLAGS += -Werror
|
||||
CFLAGS += -Wa,-adhlns=$(addprefix $(OUTDIR)/, $(notdir $(addsuffix .lst, $(basename $<))))
|
||||
# Compiler flags to generate dependency files:
|
||||
CFLAGS += -MD -MP -MF $(OUTDIR)/dep/$(@F).d
|
||||
|
||||
# flags only for C
|
||||
#CONLYFLAGS += -Wnested-externs
|
||||
CONLYFLAGS += $(CSTANDARD)
|
||||
|
||||
# Assembler flags.
|
||||
# -Wa,...: tell GCC to pass this to the assembler.
|
||||
# -ahlns: create listing
|
||||
ASFLAGS = -mcpu=$(MCU) -mthumb -I. -x assembler-with-cpp
|
||||
ASFLAGS += $(ADEFS)
|
||||
ASFLAGS += -Wa,-adhlns=$(addprefix $(OUTDIR)/, $(notdir $(addsuffix .lst, $(basename $<))))
|
||||
ASFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
|
||||
|
||||
MATH_LIB = -lm
|
||||
|
||||
# Linker flags.
|
||||
# -Wl,...: tell GCC to pass this to linker.
|
||||
# -Map: create map file
|
||||
# --cref: add cross reference to map file
|
||||
LDFLAGS = -nostartfiles -Wl,-Map=$(OUTDIR)/$(TARGET).map,--cref,--gc-sections
|
||||
LDFLAGS += $(patsubst %,-L%,$(EXTRA_LIBDIRS))
|
||||
LDFLAGS += -lc
|
||||
LDFLAGS += $(patsubst %,-l%,$(EXTRA_LIBS))
|
||||
LDFLAGS += $(MATH_LIB)
|
||||
LDFLAGS += -lc -lgcc
|
||||
|
||||
# Set linker-script name depending on selected submodel name
|
||||
LDFLAGS +=-T$(LINKERSCRIPTPATH)/link_stm32f10x_$(MODEL).ld
|
||||
|
||||
# ---------------------------------------------------------------------------
|
||||
# Options for OpenOCD flash-programming
|
||||
# see openocd.pdf/openocd.texi for further information
|
||||
#
|
||||
OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
|
||||
# if OpenOCD is in the $PATH just set OOCD_EXE=openocd
|
||||
OOCD_EXE=openocd
|
||||
# debug level
|
||||
OOCD_CL=-d0
|
||||
# interface and board/target settings (using the OOCD target-library here)
|
||||
UNAME := $(shell uname)
|
||||
ifeq ($(UNAME), Darwin)
|
||||
OOCD_CL+=-f ../Project/OpenOCD/floss-jtag.openpilot.osx.cfg -f ../Project/OpenOCD/stm32.cfg
|
||||
else
|
||||
OOCD_CL+=-f ../Project/OpenOCD/floss-jtag.openpilot.cfg -f ../Project/OpenOCD/stm32.cfg
|
||||
endif
|
||||
# initialize
|
||||
OOCD_CL+=-c init
|
||||
# show the targets
|
||||
OOCD_CL+=-c targets
|
||||
# commands to prepare flash-write
|
||||
OOCD_CL+= -c "reset halt"
|
||||
# flash erase
|
||||
OOCD_CL+=-c "stm32x mass_erase 0"
|
||||
# flash-write
|
||||
OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)"
|
||||
# Verify
|
||||
OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
|
||||
# reset target
|
||||
OOCD_CL+=-c "reset run"
|
||||
# terminate OOCD after programming
|
||||
OOCD_CL+=-c shutdown
|
||||
# ---------------------------------------------------------------------------
|
||||
|
||||
|
||||
# Define programs and commands.
|
||||
CC = $(TCHAIN_PREFIX)gcc
|
||||
CPP = $(TCHAIN_PREFIX)g++
|
||||
AR = $(TCHAIN_PREFIX)ar
|
||||
OBJCOPY = $(TCHAIN_PREFIX)objcopy
|
||||
OBJDUMP = $(TCHAIN_PREFIX)objdump
|
||||
SIZE = $(TCHAIN_PREFIX)size
|
||||
NM = $(TCHAIN_PREFIX)nm
|
||||
REMOVE = $(REMOVE_CMD) -f
|
||||
###SHELL = sh
|
||||
###COPY = cp
|
||||
|
||||
|
||||
|
||||
# Define Messages
|
||||
# English
|
||||
MSG_ERRORS_NONE = Errors: none
|
||||
MSG_BEGIN = ${quote}-------- begin (mode: $(RUN_MODE)) --------${quote}
|
||||
MSG_END = ${quote}-------- end --------${quote}
|
||||
MSG_MODINIT = ${quote}**** Generating ModInit.c${quote}
|
||||
MSG_SIZE_BEFORE = ${quote}Size before:${quote}
|
||||
MSG_SIZE_AFTER = ${quote}Size after build:${quote}
|
||||
MSG_LOAD_FILE = ${quote}Creating load file:${quote}
|
||||
MSG_EXTENDED_LISTING = ${quote}Creating Extended Listing/Disassembly:${quote}
|
||||
MSG_SYMBOL_TABLE = ${quote}Creating Symbol Table:${quote}
|
||||
MSG_LINKING = ${quote}**** Linking :${quote}
|
||||
MSG_COMPILING = ${quote}**** Compiling C :${quote}
|
||||
MSG_COMPILING_ARM = ${quote}**** Compiling C (ARM-only):${quote}
|
||||
MSG_COMPILINGCPP = ${quote}Compiling C++ :${quote}
|
||||
MSG_COMPILINGCPP_ARM = ${quote}Compiling C++ (ARM-only):${quote}
|
||||
MSG_ASSEMBLING = ${quote}**** Assembling:${quote}
|
||||
MSG_ASSEMBLING_ARM = ${quote}****Assembling (ARM-only):${quote}
|
||||
MSG_CLEANING = ${quote}Cleaning project:${quote}
|
||||
MSG_FORMATERROR = ${quote}Can not handle output-format${quote}
|
||||
MSG_ASMFROMC = ${quote}Creating asm-File from C-Source:${quote}
|
||||
MSG_ASMFROMC_ARM = ${quote}Creating asm-File from C-Source (ARM-only):${quote}
|
||||
|
||||
# List of all source files.
|
||||
ALLSRC = $(ASRCARM) $(ASRC) $(SRCARM) $(SRC) $(CPPSRCARM) $(CPPSRC)
|
||||
# List of all source files without directory and file-extension.
|
||||
ALLSRCBASE = $(notdir $(basename $(ALLSRC)))
|
||||
|
||||
# Define all object files.
|
||||
ALLOBJ = $(addprefix $(OUTDIR)/, $(addsuffix .o, $(ALLSRCBASE)))
|
||||
|
||||
# Define all listing files (used for make clean).
|
||||
LSTFILES = $(addprefix $(OUTDIR)/, $(addsuffix .lst, $(ALLSRCBASE)))
|
||||
# Define all depedency-files (used for make clean).
|
||||
DEPFILES = $(addprefix $(OUTDIR)/dep/, $(addsuffix .o.d, $(ALLSRCBASE)))
|
||||
|
||||
elf: $(OUTDIR)/$(TARGET).elf
|
||||
lss: $(OUTDIR)/$(TARGET).lss
|
||||
sym: $(OUTDIR)/$(TARGET).sym
|
||||
hex: $(OUTDIR)/$(TARGET).hex
|
||||
bin: $(OUTDIR)/$(TARGET).bin
|
||||
|
||||
# Default target.
|
||||
#all: begin gccversion sizebefore build sizeafter finished end
|
||||
all: begin gccversion build sizeafter finished end
|
||||
|
||||
ifeq ($(LOADFORMAT),ihex)
|
||||
build: elf hex lss sym
|
||||
else
|
||||
ifeq ($(LOADFORMAT),binary)
|
||||
build: elf bin lss sym
|
||||
else
|
||||
ifeq ($(LOADFORMAT),both)
|
||||
build: elf hex bin lss sym
|
||||
else
|
||||
$(error "$(MSG_FORMATERROR) $(FORMAT)")
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
# Test if quotes are needed for the echo-command
|
||||
result = ${shell echo "test"}
|
||||
ifeq (${result}, test)
|
||||
quote = '
|
||||
else
|
||||
quote =
|
||||
endif
|
||||
|
||||
${OUTDIR}/InitMods.c: Makefile
|
||||
@echo ${MSG_MODINIT}
|
||||
@echo ${quote}// Autogenerated file${quote} > ${OUTDIR}/InitMods.c
|
||||
@echo ${quote}${foreach MOD, ${MODNAMES}, extern unsigned int ${MOD}Initialize(void);}${quote} >> ${OUTDIR}/InitMods.c
|
||||
@echo ${quote}void InitModules() {${quote} >> ${OUTDIR}/InitMods.c
|
||||
@echo ${quote}${foreach MOD, ${MODNAMES}, ${MOD}Initialize();}${quote} >> ${OUTDIR}/InitMods.c
|
||||
@echo ${quote}}${quote} >> ${OUTDIR}/InitMods.c
|
||||
|
||||
# Eye candy.
|
||||
begin:
|
||||
## @echo
|
||||
@echo $(MSG_BEGIN)
|
||||
|
||||
finished:
|
||||
## @echo $(MSG_ERRORS_NONE)
|
||||
|
||||
end:
|
||||
@echo $(MSG_END)
|
||||
## @echo
|
||||
|
||||
# Display sizes of sections.
|
||||
ELFSIZE = $(SIZE) -A $(OUTDIR)/$(TARGET).elf
|
||||
##ELFSIZE = $(SIZE) --format=Berkeley --common $(OUTDIR)/$(TARGET).elf
|
||||
sizebefore:
|
||||
# @if [ -f $(OUTDIR)/$(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
|
||||
|
||||
sizeafter:
|
||||
# @if [ -f $(OUTDIR)/$(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
|
||||
@echo $(MSG_SIZE_AFTER)
|
||||
$(ELFSIZE)
|
||||
|
||||
# Display compiler version information.
|
||||
gccversion :
|
||||
@$(CC) --version
|
||||
# @echo $(ALLOBJ)
|
||||
|
||||
# Program the device.
|
||||
ifeq ($(FLASH_TOOL),OPENOCD)
|
||||
# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
|
||||
program: $(OUTDIR)/$(TARGET).elf
|
||||
@echo ${quote}Programming with OPENOCD${quote}
|
||||
$(OOCD_EXE) $(OOCD_CL)
|
||||
endif
|
||||
|
||||
# Create final output file (.hex) from ELF output file.
|
||||
%.hex: %.elf
|
||||
## @echo
|
||||
@echo $(MSG_LOAD_FILE) $@
|
||||
$(OBJCOPY) -O ihex $< $@
|
||||
|
||||
# Create final output file (.bin) from ELF output file.
|
||||
%.bin: %.elf
|
||||
## @echo
|
||||
@echo $(MSG_LOAD_FILE) $@
|
||||
$(OBJCOPY) -O binary $< $@
|
||||
|
||||
# Create extended listing file/disassambly from ELF output file.
|
||||
# using objdump testing: option -C
|
||||
%.lss: %.elf
|
||||
## @echo
|
||||
@echo $(MSG_EXTENDED_LISTING) $@
|
||||
$(OBJDUMP) -h -S -C -r $< > $@
|
||||
# $(OBJDUMP) -x -S $< > $@
|
||||
|
||||
# Create a symbol table from ELF output file.
|
||||
%.sym: %.elf
|
||||
## @echo
|
||||
@echo $(MSG_SYMBOL_TABLE) $@
|
||||
$(NM) -n $< > $@
|
||||
|
||||
# Link: create ELF output file from object files.
|
||||
.SECONDARY : $(TARGET).elf
|
||||
.PRECIOUS : $(ALLOBJ)
|
||||
%.elf: $(ALLOBJ)
|
||||
@echo $(MSG_LINKING) $@
|
||||
# use $(CC) for C-only projects or $(CPP) for C++-projects:
|
||||
$(CC) $(THUMB) $(CFLAGS) $(ALLOBJ) --output $@ $(LDFLAGS)
|
||||
# $(CPP) $(THUMB) $(CFLAGS) $(ALLOBJ) --output $@ $(LDFLAGS)
|
||||
|
||||
|
||||
# Assemble: create object files from assembler source files.
|
||||
define ASSEMBLE_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_ASSEMBLING) $$< to $$@
|
||||
$(CC) -c $(THUMB) $$(ASFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(ASRC), $(eval $(call ASSEMBLE_TEMPLATE, $(src))))
|
||||
|
||||
# Assemble: create object files from assembler source files. ARM-only
|
||||
define ASSEMBLE_ARM_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_ASSEMBLING_ARM) $$< to $$@
|
||||
$(CC) -c $$(ASFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(ASRCARM), $(eval $(call ASSEMBLE_ARM_TEMPLATE, $(src))))
|
||||
|
||||
|
||||
# Compile: create object files from C source files.
|
||||
define COMPILE_C_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_COMPILING) $$< to $$@
|
||||
$(CC) -c $(THUMB) $$(CFLAGS) $$(CONLYFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(SRC), $(eval $(call COMPILE_C_TEMPLATE, $(src))))
|
||||
|
||||
# Compile: create object files from C source files. ARM-only
|
||||
define COMPILE_C_ARM_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_COMPILING_ARM) $$< to $$@
|
||||
$(CC) -c $$(CFLAGS) $$(CONLYFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(SRCARM), $(eval $(call COMPILE_C_ARM_TEMPLATE, $(src))))
|
||||
|
||||
|
||||
# Compile: create object files from C++ source files.
|
||||
define COMPILE_CPP_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_COMPILINGCPP) $$< to $$@
|
||||
$(CC) -c $(THUMB) $$(CFLAGS) $$(CPPFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(CPPSRC), $(eval $(call COMPILE_CPP_TEMPLATE, $(src))))
|
||||
|
||||
# Compile: create object files from C++ source files. ARM-only
|
||||
define COMPILE_CPP_ARM_TEMPLATE
|
||||
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
|
||||
## @echo
|
||||
@echo $(MSG_COMPILINGCPP_ARM) $$< to $$@
|
||||
$(CC) -c $$(CFLAGS) $$(CPPFLAGS) $$< -o $$@
|
||||
endef
|
||||
$(foreach src, $(CPPSRCARM), $(eval $(call COMPILE_CPP_ARM_TEMPLATE, $(src))))
|
||||
|
||||
|
||||
# Compile: create assembler files from C source files. ARM/Thumb
|
||||
$(SRC:.c=.s) : %.s : %.c
|
||||
@echo $(MSG_ASMFROMC) $< to $@
|
||||
$(CC) $(THUMB) -S $(CFLAGS) $(CONLYFLAGS) $< -o $@
|
||||
|
||||
# Compile: create assembler files from C source files. ARM only
|
||||
$(SRCARM:.c=.s) : %.s : %.c
|
||||
@echo $(MSG_ASMFROMC_ARM) $< to $@
|
||||
$(CC) -S $(CFLAGS) $(CONLYFLAGS) $< -o $@
|
||||
|
||||
# Generate Doxygen documents
|
||||
docs:
|
||||
doxygen $(DOXYGENDIR)/doxygen.cfg
|
||||
|
||||
# Target: clean project.
|
||||
clean: begin clean_list finished end
|
||||
|
||||
clean_list :
|
||||
## @echo
|
||||
@echo $(MSG_CLEANING)
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).map
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).elf
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).hex
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).bin
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).sym
|
||||
$(REMOVE) $(OUTDIR)/$(TARGET).lss
|
||||
$(REMOVE) $(ALLOBJ)
|
||||
$(REMOVE) $(LSTFILES)
|
||||
$(REMOVE) $(DEPFILES)
|
||||
$(REMOVE) $(SRC:.c=.s)
|
||||
$(REMOVE) $(SRCARM:.c=.s)
|
||||
$(REMOVE) $(CPPSRC:.cpp=.s)
|
||||
$(REMOVE) $(CPPSRCARM:.cpp=.s)
|
||||
|
||||
|
||||
# Create output files directory
|
||||
# all known MS Windows OS define the ComSpec environment variable
|
||||
ifdef ComSpec
|
||||
$(shell md $(OUTDIR) 2>NUL)
|
||||
else
|
||||
$(shell mkdir $(OUTDIR) 2>/dev/null)
|
||||
endif
|
||||
|
||||
# Include the dependency files.
|
||||
ifdef ComSpec
|
||||
-include $(shell md $(OUTDIR)\dep 2>NUL) $(wildcard $(OUTDIR)/dep/*)
|
||||
else
|
||||
-include $(shell mkdir $(OUTDIR) 2>/dev/null) $(shell mkdir $(OUTDIR)/dep 2>/dev/null) $(wildcard $(OUTDIR)/dep/*)
|
||||
endif
|
||||
|
||||
|
||||
|
||||
# Listing of phony targets.
|
||||
.PHONY : all begin finish end sizebefore sizeafter gccversion \
|
||||
build elf hex bin lss sym clean clean_list program
|
||||
|
||||
87
flight/Bootloaders/OpenPilot/inc/common.h
Normal file
87
flight/Bootloaders/OpenPilot/inc/common.h
Normal file
@ -0,0 +1,87 @@
|
||||
/*
|
||||
* common.h
|
||||
*
|
||||
* Created on: 2010/08/18
|
||||
* Author: Programacao
|
||||
*/
|
||||
|
||||
#ifndef COMMON_H_
|
||||
#define COMMON_H_
|
||||
|
||||
//#include "board.h"
|
||||
|
||||
typedef enum {
|
||||
start, keepgoing,
|
||||
} DownloadAction;
|
||||
|
||||
/**************************************************/
|
||||
/* OP_DFU states */
|
||||
/**************************************************/
|
||||
|
||||
typedef enum {
|
||||
DFUidle, //0
|
||||
uploading, //1
|
||||
wrong_packet_received, //2
|
||||
too_many_packets, //3
|
||||
too_few_packets, //4
|
||||
Last_operation_Success, //5
|
||||
downloading, //6
|
||||
BLidle, //7
|
||||
Last_operation_failed, //8
|
||||
uploadingStarting, //9
|
||||
outsideDevCapabilities, //10
|
||||
CRC_Fail,
|
||||
failed_jump,
|
||||
} DFUStates;
|
||||
/**************************************************/
|
||||
/* OP_DFU commands */
|
||||
/**************************************************/
|
||||
typedef enum {
|
||||
Reserved, //0
|
||||
Req_Capabilities, //1
|
||||
Rep_Capabilities, //2
|
||||
EnterDFU, //3
|
||||
JumpFW, //4
|
||||
Reset, //5
|
||||
Abort_Operation, //6
|
||||
Upload, //7
|
||||
Op_END, //8
|
||||
Download_Req, //9
|
||||
Download, //10
|
||||
Status_Request, //11
|
||||
Status_Rep
|
||||
//12
|
||||
} DFUCommands;
|
||||
|
||||
typedef enum {
|
||||
High_Density,
|
||||
Medium_Density
|
||||
}DeviceType;
|
||||
/**************************************************/
|
||||
/* OP_DFU transfer types */
|
||||
/**************************************************/
|
||||
typedef enum {
|
||||
FW, //0
|
||||
Descript
|
||||
//2
|
||||
} DFUTransfer;
|
||||
/**************************************************/
|
||||
/* OP_DFU programable programable HW types */
|
||||
/**************************************************/
|
||||
typedef enum {
|
||||
Self_flash, //0
|
||||
Remote_flash_via_spi
|
||||
//1
|
||||
} DFUProgType;
|
||||
/**************************************************/
|
||||
/* OP_DFU programable sources */
|
||||
/**************************************************/
|
||||
#define USB 0
|
||||
#define SPI 1
|
||||
|
||||
#define DownloadDelay 100000
|
||||
|
||||
#define MAX_DEL_RETRYS 3
|
||||
#define MAX_WRI_RETRYS 3
|
||||
|
||||
#endif /* COMMON_H_ */
|
||||
50
flight/Bootloaders/OpenPilot/inc/op_dfu.h
Normal file
50
flight/Bootloaders/OpenPilot/inc/op_dfu.h
Normal file
@ -0,0 +1,50 @@
|
||||
/******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
|
||||
* File Name : usb_desc.h
|
||||
* Author : MCD Application Team
|
||||
* Version : V3.2.1
|
||||
* Date : 07/05/2010
|
||||
* Description : Descriptor Header for Custom HID Demo
|
||||
********************************************************************************
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __OP_DFU_H
|
||||
#define __OP_DFU_H
|
||||
#include "common.h"
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t programmingType;
|
||||
uint8_t readWriteFlags;
|
||||
uint32_t startOfUserCode;
|
||||
uint32_t sizeOfCode;
|
||||
uint8_t sizeOfDescription;
|
||||
uint8_t BL_Version;
|
||||
uint8_t devID;
|
||||
DeviceType devType;
|
||||
uint32_t FW_Crc;
|
||||
}Device;
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported define -----------------------------------------------------------*/
|
||||
#define COMMAND 0
|
||||
#define COUNT 1
|
||||
#define DATA 5
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void processComand(uint8_t *Receive_Buffer);
|
||||
uint32_t baseOfAdressType(uint8_t type);
|
||||
uint8_t isBiggerThanAvailable(uint8_t type, uint32_t size);
|
||||
void OPDfuIni(uint8_t discover);
|
||||
void DataDownload(DownloadAction);
|
||||
#endif /* __OP_DFU_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
388
flight/Bootloaders/OpenPilot/inc/pios_board.h
Normal file
388
flight/Bootloaders/OpenPilot/inc/pios_board.h
Normal file
@ -0,0 +1,388 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @addtogroup OpenPilotSystem OpenPilot System
|
||||
* @{
|
||||
* @addtogroup OpenPilotCore OpenPilot Core
|
||||
* @{
|
||||
* @file pios_board.h
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief Defines board hardware for the OpenPilot Version 1.1 hardware.
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PIOS_BOARD_H
|
||||
#define PIOS_BOARD_H
|
||||
|
||||
|
||||
|
||||
//------------------------
|
||||
// Timers and Channels Used
|
||||
//------------------------
|
||||
/*
|
||||
Timer | Channel 1 | Channel 2 | Channel 3 | Channel 4
|
||||
------+-----------+-----------+-----------+----------
|
||||
TIM1 | RC In 3 | RC In 6 | RC In 5 |
|
||||
TIM2 | --------------- PIOS_DELAY -----------------
|
||||
TIM3 | RC In 7 | RC In 8 | RC In 1 | RC In 2
|
||||
TIM4 | Servo 1 | Servo 2 | Servo 3 | Servo 4
|
||||
TIM5 | RC In 4 | | |
|
||||
TIM6 | ----------- PIOS_PWM (Supervisor) ----------
|
||||
TIM7 | | | |
|
||||
TIM8 | Servo 5 | Servo 6 | Servo 7 | Servo 8
|
||||
------+-----------+-----------+-----------+----------
|
||||
*/
|
||||
|
||||
//------------------------
|
||||
// DMA Channels Used
|
||||
//------------------------
|
||||
/* Channel 1 - ADC */
|
||||
/* Channel 2 - SPI1 RX */
|
||||
/* Channel 3 - SPI1 TX */
|
||||
/* Channel 4 - SPI2 RX */
|
||||
/* Channel 5 - SPI2 TX */
|
||||
/* Channel 6 - */
|
||||
/* Channel 7 - */
|
||||
/* Channel 8 - */
|
||||
/* Channel 9 - */
|
||||
/* Channel 10 - */
|
||||
/* Channel 11 - */
|
||||
/* Channel 12 - */
|
||||
|
||||
|
||||
|
||||
//------------------------
|
||||
// BOOTLOADER_SETTINGS
|
||||
//------------------------
|
||||
|
||||
#define HW_VERSION 01
|
||||
#define BOOTLOADER_VERSION 0
|
||||
#define MEM_SIZE 524288 //512K
|
||||
#define SIZE_OF_DESCRIPTION (uint8_t) 100
|
||||
#define SIZE_OF_CODE (uint32_t) (MEM_SIZE-(START_OF_USER_CODE-0x08000000)-SIZE_OF_DESCRIPTION)
|
||||
#define START_OF_USER_CODE 0x0800F000
|
||||
#ifdef STM32F10X_HD
|
||||
#define HW_TYPE 0 //0=high_density 1=medium_density;
|
||||
#elif STM32F10X_MD
|
||||
#define HW_TYPE 1 //0=high_density 1=medium_density;
|
||||
#endif
|
||||
#define BOARD_READABLE TRUE
|
||||
#define BOARD_WRITABLA TRUE
|
||||
#define MAX_DEL_RETRYS 3
|
||||
//------------------------
|
||||
// PIOS_LED
|
||||
//------------------------
|
||||
#define PIOS_LED_LED1_GPIO_PORT GPIOC
|
||||
#define PIOS_LED_LED1_GPIO_PIN GPIO_Pin_12
|
||||
#define PIOS_LED_LED1_GPIO_CLK RCC_APB2Periph_GPIOC
|
||||
#define PIOS_LED_LED2_GPIO_PORT GPIOC
|
||||
#define PIOS_LED_LED2_GPIO_PIN GPIO_Pin_13
|
||||
#define PIOS_LED_LED2_GPIO_CLK RCC_APB2Periph_GPIOC
|
||||
#define PIOS_LED_NUM 2
|
||||
#define PIOS_LED_PORTS { PIOS_LED_LED1_GPIO_PORT, PIOS_LED_LED2_GPIO_PORT }
|
||||
#define PIOS_LED_PINS { PIOS_LED_LED1_GPIO_PIN, PIOS_LED_LED2_GPIO_PIN }
|
||||
#define PIOS_LED_CLKS { PIOS_LED_LED1_GPIO_CLK, PIOS_LED_LED2_GPIO_CLK }
|
||||
|
||||
//------------------------
|
||||
// PIOS_I2C
|
||||
// See also pios_board.c
|
||||
//------------------------
|
||||
#define PIOS_I2C_MAIN_ADAPTER 0
|
||||
|
||||
//------------------------
|
||||
// PIOS_BMP085
|
||||
//------------------------
|
||||
#define PIOS_BMP085_EOC_GPIO_PORT GPIOC
|
||||
#define PIOS_BMP085_EOC_GPIO_PIN GPIO_Pin_15
|
||||
#define PIOS_BMP085_EOC_PORT_SOURCE GPIO_PortSourceGPIOG
|
||||
#define PIOS_BMP085_EOC_PIN_SOURCE GPIO_PinSource8
|
||||
#define PIOS_BMP085_EOC_CLK RCC_APB2Periph_GPIOC
|
||||
#define PIOS_BMP085_EOC_EXTI_LINE EXTI_Line15
|
||||
#define PIOS_BMP085_EOC_IRQn EXTI15_10_IRQn
|
||||
#define PIOS_BMP085_EOC_PRIO PIOS_IRQ_PRIO_HIGH
|
||||
#define PIOS_BMP085_OVERSAMPLING 2
|
||||
|
||||
//-------------------------
|
||||
// USART
|
||||
//
|
||||
// See also pios_board.c
|
||||
//-------------------------
|
||||
#define PIOS_USART_RX_BUFFER_SIZE 1024
|
||||
#define PIOS_USART_TX_BUFFER_SIZE 256
|
||||
|
||||
#define PIOS_COM_TELEM_RF 0
|
||||
#define PIOS_COM_GPS 1
|
||||
#define PIOS_COM_TELEM_USB 2
|
||||
|
||||
#ifdef PIOS_ENABLE_AUX_UART
|
||||
#define PIOS_COM_AUX 3
|
||||
#define PIOS_COM_DEBUG PIOS_COM_AUX
|
||||
#endif
|
||||
|
||||
#ifdef PIOS_INCLUDE_SPEKTRUM
|
||||
#define PIOS_COM_SPEKTRUM 3
|
||||
#endif
|
||||
|
||||
//-------------------------
|
||||
// SPI
|
||||
//
|
||||
// See also pios_board.c
|
||||
//-------------------------
|
||||
#define PIOS_SDCARD_SPI 0
|
||||
#define PIOS_OPAHRS_SPI 1
|
||||
|
||||
//-------------------------
|
||||
// Delay Timer
|
||||
//-------------------------
|
||||
#define PIOS_DELAY_TIMER TIM2
|
||||
#define PIOS_DELAY_TIMER_RCC_FUNC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE)
|
||||
|
||||
//-------------------------
|
||||
// System Settings
|
||||
//-------------------------
|
||||
#define PIOS_MASTER_CLOCK 72000000
|
||||
#define PIOS_PERIPHERAL_CLOCK (PIOS_MASTER_CLOCK / 2)
|
||||
#if defined(USE_BOOTLOADER)
|
||||
#define PIOS_NVIC_VECTTAB_FLASH ((uint32_t)0x08006000)
|
||||
#else
|
||||
#define PIOS_NVIC_VECTTAB_FLASH ((uint32_t)0x08000000)
|
||||
#endif
|
||||
|
||||
//-------------------------
|
||||
// Interrupt Priorities
|
||||
//-------------------------
|
||||
#define PIOS_IRQ_PRIO_LOW 12 // lower than RTOS
|
||||
#define PIOS_IRQ_PRIO_MID 8 // higher than RTOS
|
||||
#define PIOS_IRQ_PRIO_HIGH 5 // for SPI, ADC, I2C etc...
|
||||
#define PIOS_IRQ_PRIO_HIGHEST 4 // for USART etc...
|
||||
|
||||
//-------------------------
|
||||
// Receiver PWM inputs
|
||||
//-------------------------
|
||||
#define PIOS_PWM_CH1_GPIO_PORT GPIOA
|
||||
#define PIOS_PWM_CH1_PIN GPIO_Pin_9
|
||||
#define PIOS_PWM_CH1_TIM_PORT TIM1
|
||||
#define PIOS_PWM_CH1_CH TIM_Channel_2
|
||||
#define PIOS_PWM_CH1_CCR TIM_IT_CC2
|
||||
#define PIOS_PWM_CH2_GPIO_PORT GPIOA
|
||||
#define PIOS_PWM_CH2_PIN GPIO_Pin_10
|
||||
#define PIOS_PWM_CH2_TIM_PORT TIM1
|
||||
#define PIOS_PWM_CH2_CH TIM_Channel_3
|
||||
#define PIOS_PWM_CH2_CCR TIM_IT_CC3
|
||||
#define PIOS_PWM_CH3_GPIO_PORT GPIOA
|
||||
#define PIOS_PWM_CH3_PIN GPIO_Pin_0
|
||||
#define PIOS_PWM_CH3_TIM_PORT TIM5
|
||||
#define PIOS_PWM_CH3_CH TIM_Channel_1
|
||||
#define PIOS_PWM_CH3_CCR TIM_IT_CC1
|
||||
#define PIOS_PWM_CH4_GPIO_PORT GPIOA
|
||||
#define PIOS_PWM_CH4_PIN GPIO_Pin_8
|
||||
#define PIOS_PWM_CH4_TIM_PORT TIM1
|
||||
#define PIOS_PWM_CH4_CH TIM_Channel_1
|
||||
#define PIOS_PWM_CH4_CCR TIM_IT_CC1
|
||||
#define PIOS_PWM_CH5_GPIO_PORT GPIOB
|
||||
#define PIOS_PWM_CH5_PIN GPIO_Pin_1
|
||||
#define PIOS_PWM_CH5_TIM_PORT TIM3
|
||||
#define PIOS_PWM_CH5_CH TIM_Channel_4
|
||||
#define PIOS_PWM_CH5_CCR TIM_IT_CC4
|
||||
#define PIOS_PWM_CH6_GPIO_PORT GPIOB
|
||||
#define PIOS_PWM_CH6_PIN GPIO_Pin_0
|
||||
#define PIOS_PWM_CH6_TIM_PORT TIM3
|
||||
#define PIOS_PWM_CH6_CH TIM_Channel_3
|
||||
#define PIOS_PWM_CH6_CCR TIM_IT_CC3
|
||||
#define PIOS_PWM_CH7_GPIO_PORT GPIOB
|
||||
#define PIOS_PWM_CH7_PIN GPIO_Pin_4
|
||||
#define PIOS_PWM_CH7_TIM_PORT TIM3
|
||||
#define PIOS_PWM_CH7_CH TIM_Channel_1
|
||||
#define PIOS_PWM_CH7_CCR TIM_IT_CC1
|
||||
#define PIOS_PWM_CH8_GPIO_PORT GPIOB
|
||||
#define PIOS_PWM_CH8_PIN GPIO_Pin_5
|
||||
#define PIOS_PWM_CH8_TIM_PORT TIM3
|
||||
#define PIOS_PWM_CH8_CH TIM_Channel_2
|
||||
#define PIOS_PWM_CH8_CCR TIM_IT_CC2
|
||||
#define PIOS_PWM_GPIO_PORTS { PIOS_PWM_CH1_GPIO_PORT, PIOS_PWM_CH2_GPIO_PORT, PIOS_PWM_CH3_GPIO_PORT, PIOS_PWM_CH4_GPIO_PORT, PIOS_PWM_CH5_GPIO_PORT, PIOS_PWM_CH6_GPIO_PORT, PIOS_PWM_CH7_GPIO_PORT, PIOS_PWM_CH8_GPIO_PORT }
|
||||
#define PIOS_PWM_GPIO_PINS { PIOS_PWM_CH1_PIN, PIOS_PWM_CH2_PIN, PIOS_PWM_CH3_PIN, PIOS_PWM_CH4_PIN, PIOS_PWM_CH5_PIN, PIOS_PWM_CH6_PIN, PIOS_PWM_CH7_PIN, PIOS_PWM_CH8_PIN }
|
||||
#define PIOS_PWM_TIM_PORTS { PIOS_PWM_CH1_TIM_PORT, PIOS_PWM_CH2_TIM_PORT, PIOS_PWM_CH3_TIM_PORT, PIOS_PWM_CH4_TIM_PORT, PIOS_PWM_CH5_TIM_PORT, PIOS_PWM_CH6_TIM_PORT, PIOS_PWM_CH7_TIM_PORT, PIOS_PWM_CH8_TIM_PORT }
|
||||
#define PIOS_PWM_TIM_CHANNELS { PIOS_PWM_CH1_CH, PIOS_PWM_CH2_CH, PIOS_PWM_CH3_CH, PIOS_PWM_CH4_CH, PIOS_PWM_CH5_CH, PIOS_PWM_CH6_CH, PIOS_PWM_CH7_CH, PIOS_PWM_CH8_CH }
|
||||
#define PIOS_PWM_TIM_CCRS { PIOS_PWM_CH1_CCR, PIOS_PWM_CH2_CCR, PIOS_PWM_CH3_CCR, PIOS_PWM_CH4_CCR, PIOS_PWM_CH5_CCR, PIOS_PWM_CH6_CCR, PIOS_PWM_CH7_CCR, PIOS_PWM_CH8_CCR }
|
||||
#define PIOS_PWM_TIMS { TIM1, TIM3, TIM5 }
|
||||
#define PIOS_PWM_TIM_IRQS { TIM1_CC_IRQn, TIM3_IRQn, TIM5_IRQn }
|
||||
#define PIOS_PWM_NUM_INPUTS 8
|
||||
#define PIOS_PWM_NUM_TIMS 3
|
||||
#define PIOS_PWM_SUPV_ENABLED 1
|
||||
#define PIOS_PWM_SUPV_TIMER TIM6
|
||||
#define PIOS_PWM_SUPV_TIMER_RCC_FUNC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE)
|
||||
#define PIOS_PWM_SUPV_HZ 25
|
||||
#define PIOS_PWM_SUPV_IRQ_CHANNEL TIM6_IRQn
|
||||
#define PIOS_PWM_SUPV_IRQ_FUNC void TIM6_IRQHandler(void)
|
||||
|
||||
//-------------------------
|
||||
// Receiver PPM input
|
||||
//-------------------------
|
||||
#define PIOS_PPM_GPIO_PORT PIOS_PWM_CH1_GPIO_PORT
|
||||
#define PIOS_PPM_GPIO_PIN PIOS_PWM_CH1_PIN
|
||||
#define PIOS_PPM_TIM_PORT PIOS_PWM_CH1_TIM_PORT
|
||||
#define PIOS_PPM_TIM_CHANNEL PIOS_PWM_CH1_CH
|
||||
#define PIOS_PPM_TIM_CCR PIOS_PWM_CH1_CCR
|
||||
#define PIOS_PPM_TIM TIM1
|
||||
#define PIOS_PPM_TIM_IRQ TIM1_CC_IRQn
|
||||
#define PIOS_PPM_NUM_INPUTS 8 //Could be more if needed
|
||||
#define PIOS_PPM_SUPV_ENABLED 1
|
||||
#define PIOS_PPM_SUPV_TIMER TIM6
|
||||
#define PIOS_PPM_SUPV_TIMER_RCC_FUNC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE)
|
||||
#define PIOS_PPM_SUPV_HZ 25
|
||||
#define PIOS_PPM_SUPV_IRQ_CHANNEL TIM6_IRQn
|
||||
#define PIOS_PPM_SUPV_IRQ_FUNC void TIM6_IRQHandler(void)
|
||||
|
||||
|
||||
//-------------------------
|
||||
// Servo outputs
|
||||
//-------------------------
|
||||
#define PIOS_SERVO_GPIO_PORT_1TO4 GPIOB
|
||||
#define PIOS_SERVO_GPIO_PIN_1 GPIO_Pin_6
|
||||
#define PIOS_SERVO_GPIO_PIN_2 GPIO_Pin_7
|
||||
#define PIOS_SERVO_GPIO_PIN_3 GPIO_Pin_8
|
||||
#define PIOS_SERVO_GPIO_PIN_4 GPIO_Pin_9
|
||||
#define PIOS_SERVO_GPIO_PORT_5TO8 GPIOC
|
||||
#define PIOS_SERVO_GPIO_PIN_5 GPIO_Pin_6
|
||||
#define PIOS_SERVO_GPIO_PIN_6 GPIO_Pin_7
|
||||
#define PIOS_SERVO_GPIO_PIN_7 GPIO_Pin_8
|
||||
#define PIOS_SERVO_GPIO_PIN_8 GPIO_Pin_9
|
||||
#define PIOS_SERVO_NUM_OUTPUTS 8
|
||||
#define PIOS_SERVO_NUM_TIMERS PIOS_SERVO_NUM_OUTPUTS
|
||||
#define PIOS_SERVO_UPDATE_HZ 50
|
||||
#define PIOS_SERVOS_INITIAL_POSITION 1500
|
||||
|
||||
//-------------------------
|
||||
// ADC
|
||||
// PIOS_ADC_PinGet(0) = Temperature Sensor (On-board)
|
||||
// PIOS_ADC_PinGet(1) = Power Sensor (Current)
|
||||
// PIOS_ADC_PinGet(2) = Power Sensor (Voltage)
|
||||
// PIOS_ADC_PinGet(3) = On-board 5v Rail Sensor
|
||||
// PIOS_ADC_PinGet(4) = Auxiliary Input 1
|
||||
// PIOS_ADC_PinGet(5) = Auxiliary Input 2
|
||||
// PIOS_ADC_PinGet(6) = Auxiliary Input 3
|
||||
//-------------------------
|
||||
//#define PIOS_ADC_OVERSAMPLING_RATE 1
|
||||
#define PIOS_ADC_USE_TEMP_SENSOR 1
|
||||
#define PIOS_ADC_TEMP_SENSOR_ADC ADC1
|
||||
#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 1
|
||||
#define PIOS_ADC_PIN1_GPIO_PORT GPIOA // PA1 (Power Sense - Voltage)
|
||||
#define PIOS_ADC_PIN1_GPIO_PIN GPIO_Pin_1 // ADC123_IN1
|
||||
#define PIOS_ADC_PIN1_GPIO_CHANNEL ADC_Channel_1
|
||||
#define PIOS_ADC_PIN1_ADC ADC1
|
||||
#define PIOS_ADC_PIN1_ADC_NUMBER 2
|
||||
#define PIOS_ADC_PIN2_GPIO_PORT GPIOC // PC3 (Power Sense - Current)
|
||||
#define PIOS_ADC_PIN2_GPIO_PIN GPIO_Pin_3 // ADC123_IN13
|
||||
#define PIOS_ADC_PIN2_GPIO_CHANNEL ADC_Channel_13
|
||||
#define PIOS_ADC_PIN2_ADC ADC2
|
||||
#define PIOS_ADC_PIN2_ADC_NUMBER 1
|
||||
#define PIOS_ADC_PIN3_GPIO_PORT GPIOC // PC5 (Onboard 5v Sensor) PC5
|
||||
#define PIOS_ADC_PIN3_GPIO_PIN GPIO_Pin_5 // ADC12_IN15
|
||||
#define PIOS_ADC_PIN3_GPIO_CHANNEL ADC_Channel_15
|
||||
#define PIOS_ADC_PIN3_ADC ADC2
|
||||
#define PIOS_ADC_PIN3_ADC_NUMBER 2
|
||||
#define PIOS_ADC_PIN4_GPIO_PORT GPIOC // PC0 (AUX 1)
|
||||
#define PIOS_ADC_PIN4_GPIO_PIN GPIO_Pin_0 // ADC123_IN10
|
||||
#define PIOS_ADC_PIN4_GPIO_CHANNEL ADC_Channel_10
|
||||
#define PIOS_ADC_PIN4_ADC ADC1
|
||||
#define PIOS_ADC_PIN4_ADC_NUMBER 3
|
||||
#define PIOS_ADC_PIN5_GPIO_PORT GPIOC // PC1 (AUX 2)
|
||||
#define PIOS_ADC_PIN5_GPIO_PIN GPIO_Pin_1 // ADC123_IN11
|
||||
#define PIOS_ADC_PIN5_GPIO_CHANNEL ADC_Channel_11
|
||||
#define PIOS_ADC_PIN5_ADC ADC2
|
||||
#define PIOS_ADC_PIN5_ADC_NUMBER 3
|
||||
#define PIOS_ADC_PIN6_GPIO_PORT GPIOC // PC2 (AUX 3)
|
||||
#define PIOS_ADC_PIN6_GPIO_PIN GPIO_Pin_2 // ADC123_IN12
|
||||
#define PIOS_ADC_PIN6_GPIO_CHANNEL ADC_Channel_12
|
||||
#define PIOS_ADC_PIN6_ADC ADC1
|
||||
#define PIOS_ADC_PIN6_ADC_NUMBER 4
|
||||
#define PIOS_ADC_NUM_PINS 6
|
||||
#define PIOS_ADC_PORTS { PIOS_ADC_PIN1_GPIO_PORT, PIOS_ADC_PIN2_GPIO_PORT, PIOS_ADC_PIN3_GPIO_PORT, PIOS_ADC_PIN4_GPIO_PORT, PIOS_ADC_PIN5_GPIO_PORT, PIOS_ADC_PIN6_GPIO_PORT }
|
||||
#define PIOS_ADC_PINS { PIOS_ADC_PIN1_GPIO_PIN, PIOS_ADC_PIN2_GPIO_PIN, PIOS_ADC_PIN3_GPIO_PIN, PIOS_ADC_PIN4_GPIO_PIN, PIOS_ADC_PIN5_GPIO_PIN, PIOS_ADC_PIN6_GPIO_PIN }
|
||||
#define PIOS_ADC_CHANNELS { PIOS_ADC_PIN1_GPIO_CHANNEL, PIOS_ADC_PIN2_GPIO_CHANNEL, PIOS_ADC_PIN3_GPIO_CHANNEL, PIOS_ADC_PIN4_GPIO_CHANNEL, PIOS_ADC_PIN5_GPIO_CHANNEL, PIOS_ADC_PIN6_GPIO_CHANNEL }
|
||||
#define PIOS_ADC_MAPPING { PIOS_ADC_PIN1_ADC, PIOS_ADC_PIN2_ADC, PIOS_ADC_PIN3_ADC, PIOS_ADC_PIN4_ADC, PIOS_ADC_PIN5_ADC, PIOS_ADC_PIN6_ADC }
|
||||
#define PIOS_ADC_CHANNEL_MAPPING { PIOS_ADC_PIN1_ADC_NUMBER, PIOS_ADC_PIN2_ADC_NUMBER, PIOS_ADC_PIN3_ADC_NUMBER, PIOS_ADC_PIN4_ADC_NUMBER, PIOS_ADC_PIN5_ADC_NUMBER, PIOS_ADC_PIN6_ADC_NUMBER }
|
||||
#define PIOS_ADC_NUM_CHANNELS (PIOS_ADC_NUM_PINS + PIOS_ADC_USE_TEMP_SENSOR)
|
||||
#define PIOS_ADC_NUM_ADC_CHANNELS 2
|
||||
#define PIOS_ADC_USE_ADC2 1
|
||||
#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE)
|
||||
#define PIOS_ADC_ADCCLK RCC_PCLK2_Div8
|
||||
/* RCC_PCLK2_Div2: ADC clock = PCLK2/2 */
|
||||
/* RCC_PCLK2_Div4: ADC clock = PCLK2/4 */
|
||||
/* RCC_PCLK2_Div6: ADC clock = PCLK2/6 */
|
||||
/* RCC_PCLK2_Div8: ADC clock = PCLK2/8 */
|
||||
#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_239Cycles5
|
||||
/* Sample time: */
|
||||
/* With an ADCCLK = 14 MHz and a sampling time of 293.5 cycles: */
|
||||
/* Tconv = 239.5 + 12.5 = 252 cycles = 18<31>s */
|
||||
/* (1 / (ADCCLK / CYCLES)) = Sample Time (<28>S) */
|
||||
#define PIOS_ADC_IRQ_PRIO PIOS_IRQ_PRIO_HIGH
|
||||
|
||||
//-------------------------
|
||||
// GPIO
|
||||
//-------------------------
|
||||
#define PIOS_GPIO_1_PORT GPIOC
|
||||
#define PIOS_GPIO_1_PIN GPIO_Pin_0
|
||||
#define PIOS_GPIO_1_GPIO_CLK RCC_APB2Periph_GPIOC
|
||||
#define PIOS_GPIO_2_PORT GPIOC
|
||||
#define PIOS_GPIO_2_PIN GPIO_Pin_1
|
||||
#define PIOS_GPIO_2_GPIO_CLK RCC_APB2Periph_GPIOC
|
||||
#define PIOS_GPIO_3_PORT GPIOC
|
||||
#define PIOS_GPIO_3_PIN GPIO_Pin_2
|
||||
#define PIOS_GPIO_3_GPIO_CLK RCC_APB2Periph_GPIOC
|
||||
#define PIOS_GPIO_4_PORT GPIOD
|
||||
#define PIOS_GPIO_4_PIN GPIO_Pin_2
|
||||
#define PIOS_GPIO_4_GPIO_CLK RCC_APB2Periph_GPIOD
|
||||
#define PIOS_GPIO_PORTS { PIOS_GPIO_1_PORT, PIOS_GPIO_2_PORT, PIOS_GPIO_3_PORT, PIOS_GPIO_4_PORT }
|
||||
#define PIOS_GPIO_PINS { PIOS_GPIO_1_PIN, PIOS_GPIO_2_PIN, PIOS_GPIO_3_PIN, PIOS_GPIO_4_PIN }
|
||||
#define PIOS_GPIO_CLKS { PIOS_GPIO_1_GPIO_CLK, PIOS_GPIO_2_GPIO_CLK, PIOS_GPIO_3_GPIO_CLK, PIOS_GPIO_4_GPIO_CLK }
|
||||
#define PIOS_GPIO_NUM 4
|
||||
|
||||
//-------------------------
|
||||
// USB
|
||||
//-------------------------
|
||||
#define PIOS_USB_ENABLED 1
|
||||
#define PIOS_USB_DETECT_GPIO_PORT GPIOC
|
||||
#define PIOS_USB_DETECT_GPIO_PIN GPIO_Pin_4
|
||||
#define PIOS_USB_DETECT_EXTI_LINE EXTI_Line4
|
||||
#define PIOS_IRQ_USB_PRIORITY PIOS_IRQ_PRIO_MID
|
||||
|
||||
/**
|
||||
* glue macros for file IO
|
||||
* STM32 uses DOSFS for file IO
|
||||
*/
|
||||
#define PIOS_FOPEN_READ(filename,file) DFS_OpenFile(&PIOS_SDCARD_VolInfo, (uint8_t *)filename, DFS_READ, PIOS_SDCARD_Sector, &file) != DFS_OK
|
||||
|
||||
#define PIOS_FOPEN_WRITE(filename,file) DFS_OpenFile(&PIOS_SDCARD_VolInfo, (uint8_t *)filename, DFS_WRITE, PIOS_SDCARD_Sector, &file) != DFS_OK
|
||||
|
||||
#define PIOS_FREAD(file,bufferadr,length,resultadr) DFS_ReadFile(file, PIOS_SDCARD_Sector, (uint8_t*)bufferadr, resultadr, length) != DFS_OK
|
||||
|
||||
#define PIOS_FWRITE(file,bufferadr,length,resultadr) DFS_WriteFile(file, PIOS_SDCARD_Sector, (uint8_t*)bufferadr, resultadr, length)
|
||||
|
||||
#define PIOS_FCLOSE(file) DFS_Close(&file)
|
||||
|
||||
#define PIOS_FUNLINK(filename) DFS_UnlinkFile(&PIOS_SDCARD_VolInfo, (uint8_t *)filename, PIOS_SDCARD_Sector)
|
||||
|
||||
|
||||
|
||||
#endif /* PIOS_BOARD_H */
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
||||
81
flight/Bootloaders/OpenPilot/inc/pios_config.h
Normal file
81
flight/Bootloaders/OpenPilot/inc/pios_config.h
Normal file
@ -0,0 +1,81 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @addtogroup OpenPilotSystem OpenPilot System
|
||||
* @{
|
||||
* @addtogroup OpenPilotCore OpenPilot Core
|
||||
* @{
|
||||
*
|
||||
* @file pios_config.h
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief PiOS configuration header.
|
||||
* Central compile time config for the project.
|
||||
* In particular, pios_config.h is where you define which PiOS libraries
|
||||
* and features are included in the firmware.
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PIOS_CONFIG_H
|
||||
#define PIOS_CONFIG_H
|
||||
#define PIOS_INCLUDE_BL_HELPER
|
||||
#define USB_HID
|
||||
/* Enable/Disable PiOS Modules */
|
||||
//#define PIOS_INCLUDE_ADC
|
||||
#define PIOS_INCLUDE_DELAY
|
||||
//#define PIOS_INCLUDE_I2C
|
||||
#define PIOS_INCLUDE_IRQ
|
||||
#define PIOS_INCLUDE_LED
|
||||
//#define PIOS_INCLUDE_SPEKTRUM
|
||||
//#define PIOS_INCLUDE_PPM
|
||||
//#define PIOS_INCLUDE_PWM
|
||||
//#define PIOS_INCLUDE_SERVO
|
||||
#define PIOS_INCLUDE_SPI
|
||||
#define PIOS_INCLUDE_SYS
|
||||
#define PIOS_INCLUDE_USART
|
||||
#define PIOS_INCLUDE_USB_HID
|
||||
//#define PIOS_INCLUDE_BMP085
|
||||
#define PIOS_INCLUDE_OPAHRS
|
||||
#define PIOS_INCLUDE_COM
|
||||
//#define PIOS_INCLUDE_SDCARD
|
||||
#define PIOS_INCLUDE_SETTINGS
|
||||
//#define PIOS_INCLUDE_FREERTOS
|
||||
#define PIOS_INCLUDE_GPIO
|
||||
//#define PIOS_INCLUDE_EXTI
|
||||
|
||||
|
||||
/* Defaults for Logging */
|
||||
#define LOG_FILENAME "PIOS.LOG"
|
||||
#define STARTUP_LOG_ENABLED 1
|
||||
|
||||
/* COM Module */
|
||||
#define GPS_BAUDRATE 19200
|
||||
#define TELEM_BAUDRATE 19200
|
||||
#define AUXUART_ENABLED 0
|
||||
#define AUXUART_BAUDRATE 19200
|
||||
|
||||
/* Servos */
|
||||
#define SERVOS_POSITION_MIN 800
|
||||
#define SERVOS_POSITION_MAX 2200
|
||||
|
||||
|
||||
#endif /* PIOS_CONFIG_H */
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
||||
29
flight/Bootloaders/OpenPilot/inc/stopwatch.h
Normal file
29
flight/Bootloaders/OpenPilot/inc/stopwatch.h
Normal file
@ -0,0 +1,29 @@
|
||||
|
||||
#ifndef _STOPWATCH_H
|
||||
#define _STOPWATCH_H
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
// Global definitions
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
// Global Types
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
// Prototypes
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
extern s32 STOPWATCH_Init(u32 resolution);
|
||||
extern s32 STOPWATCH_Reset(void);
|
||||
extern u32 STOPWATCH_ValueGet(void);
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
// Export global variables
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
|
||||
#endif /* _STOPWATCH_H */
|
||||
209
flight/Bootloaders/OpenPilot/main.c
Normal file
209
flight/Bootloaders/OpenPilot/main.c
Normal file
@ -0,0 +1,209 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @addtogroup OpenPilotSystem OpenPilot System
|
||||
* @brief These files are the core system files of OpenPilot.
|
||||
* They are the ground layer just above PiOS. In practice, OpenPilot actually starts
|
||||
* in the main() function of openpilot.c
|
||||
* @{
|
||||
* @addtogroup OpenPilotCore OpenPilot Core
|
||||
* @brief This is where the OP firmware starts. Those files also define the compile-time
|
||||
* options of the firmware.
|
||||
* @{
|
||||
* @file openpilot.c
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief Sets up and runs main OpenPilot tasks.
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/* OpenPilot Includes */
|
||||
//#include "openpilot.h"
|
||||
#include <pios.h>
|
||||
#include "pios_opahrs.h"
|
||||
#include "stopwatch.h"
|
||||
#include "op_dfu.h"
|
||||
#include "usb_lib.h"
|
||||
/* Prototype of PIOS_Board_Init() function */
|
||||
extern void PIOS_Board_Init(void);
|
||||
extern void FLASH_Download();
|
||||
#define BSL_HOLD_STATE ((PIOS_USB_DETECT_GPIO_PORT->IDR & PIOS_USB_DETECT_GPIO_PIN) ? 0 : 1)
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
typedef void (*pFunction)(void);
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
pFunction Jump_To_Application;
|
||||
uint32_t JumpAddress;
|
||||
|
||||
/// LEDs PWM
|
||||
uint32_t period1 = 50; // *100 uS -> 5 mS
|
||||
uint32_t sweep_steps1 = 100; // * 5 mS -> 500 mS
|
||||
uint32_t period2 = 50; // *100 uS -> 5 mS
|
||||
uint32_t sweep_steps2 = 100; // * 5 mS -> 500 mS
|
||||
|
||||
/* Extern variables ----------------------------------------------------------*/
|
||||
DFUStates DeviceState;
|
||||
uint8_t JumpToApp = FALSE;
|
||||
uint8_t GO_dfu = false;
|
||||
uint8_t USB_connected = false;
|
||||
uint8_t User_DFU_request = false;
|
||||
uint8_t Receive_Buffer[64];
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
uint32_t LedPWM(uint32_t pwm_period, uint32_t pwm_sweep_steps, uint32_t count);
|
||||
uint8_t processRX();
|
||||
void jump_to_app();
|
||||
|
||||
#define BLUE LED1
|
||||
#define RED LED2
|
||||
|
||||
int main() {
|
||||
/* NOTE: Do NOT modify the following start-up sequence */
|
||||
/* Any new initialization functions should be added in OpenPilotInit() */
|
||||
|
||||
/* Brings up System using CMSIS functions, enables the LEDs. */
|
||||
PIOS_SYS_Init();
|
||||
if (BSL_HOLD_STATE == 0)
|
||||
USB_connected = TRUE;
|
||||
|
||||
GO_dfu = USB_connected | User_DFU_request;
|
||||
if (GO_dfu == TRUE) {
|
||||
PIOS_Board_Init();
|
||||
PIOS_OPAHRS_Init();
|
||||
DeviceState = BLidle;
|
||||
STOPWATCH_Init(100);
|
||||
USB_connected = TRUE;
|
||||
PIOS_SPI_RC_PinSet(PIOS_OPAHRS_SPI, 0);
|
||||
OPDfuIni(false);
|
||||
|
||||
} else
|
||||
JumpToApp = TRUE;
|
||||
STOPWATCH_Reset();
|
||||
|
||||
while (TRUE) {
|
||||
|
||||
if (JumpToApp == TRUE)
|
||||
jump_to_app();
|
||||
//pwm_period = 50; // *100 uS -> 5 mS
|
||||
//pwm_sweep_steps =100; // * 5 mS -> 500 mS
|
||||
|
||||
switch (DeviceState) {
|
||||
case Last_operation_Success:
|
||||
case uploadingStarting:
|
||||
case DFUidle:
|
||||
period1 = 50;
|
||||
sweep_steps1 = 100;
|
||||
PIOS_LED_Off(RED);
|
||||
period2 = 0;
|
||||
break;
|
||||
case uploading:
|
||||
period1 = 50;
|
||||
sweep_steps1 = 100;
|
||||
period2 = 25;
|
||||
sweep_steps2 = 50;
|
||||
break;
|
||||
case downloading:
|
||||
period1 = 25;
|
||||
sweep_steps1 = 50;
|
||||
PIOS_LED_Off(RED);
|
||||
period2 = 0;
|
||||
break;
|
||||
case BLidle:
|
||||
period1 = 0;
|
||||
PIOS_LED_On(BLUE);
|
||||
period2 = 0;
|
||||
break;
|
||||
default://error
|
||||
period1 = 50;
|
||||
sweep_steps1 = 100;
|
||||
period2 = 50;
|
||||
sweep_steps2 = 100;
|
||||
}
|
||||
|
||||
if (period1 != 0) {
|
||||
if (LedPWM(period1, sweep_steps1, STOPWATCH_ValueGet()))
|
||||
PIOS_LED_On(BLUE);
|
||||
else
|
||||
PIOS_LED_Off(BLUE);
|
||||
} else
|
||||
PIOS_LED_On(BLUE);
|
||||
|
||||
if (period2 != 0) {
|
||||
if (LedPWM(period2, sweep_steps2, STOPWATCH_ValueGet()))
|
||||
PIOS_LED_On(RED);
|
||||
else
|
||||
PIOS_LED_Off(RED);
|
||||
} else
|
||||
PIOS_LED_Off(RED);
|
||||
|
||||
if (STOPWATCH_ValueGet() > 100 * 50 * 100)
|
||||
STOPWATCH_Reset();
|
||||
if ((STOPWATCH_ValueGet() > 70000) && (DeviceState == BLidle))
|
||||
JumpToApp = TRUE;
|
||||
|
||||
processRX();
|
||||
DataDownload(start);
|
||||
//DelayWithDown(10);//1000000);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void jump_to_app() {
|
||||
if (((*(__IO uint32_t*) START_OF_USER_CODE) & 0x2FFE0000) == 0x20000000) { /* Jump to user application */
|
||||
FLASH_Lock();
|
||||
RCC_APB2PeriphResetCmd(0xffffffff, ENABLE);
|
||||
RCC_APB1PeriphResetCmd(0xffffffff, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(0xffffffff, DISABLE);
|
||||
RCC_APB1PeriphResetCmd(0xffffffff, DISABLE);
|
||||
_SetCNTR(0); // clear interrupt mask
|
||||
_SetISTR(0); // clear all requests
|
||||
|
||||
JumpAddress = *(__IO uint32_t*) (START_OF_USER_CODE + 4);
|
||||
Jump_To_Application = (pFunction) JumpAddress;
|
||||
/* Initialize user application's Stack Pointer */
|
||||
__set_MSP(*(__IO uint32_t*) START_OF_USER_CODE);
|
||||
Jump_To_Application();
|
||||
} else {
|
||||
DeviceState = failed_jump;
|
||||
return;
|
||||
}
|
||||
}
|
||||
uint32_t LedPWM(uint32_t pwm_period, uint32_t pwm_sweep_steps, uint32_t count) {
|
||||
uint32_t pwm_duty = ((count / pwm_period) % pwm_sweep_steps)
|
||||
/ (pwm_sweep_steps / pwm_period);
|
||||
if ((count % (2 * pwm_period * pwm_sweep_steps)) > pwm_period
|
||||
* pwm_sweep_steps)
|
||||
pwm_duty = pwm_period - pwm_duty; // negative direction each 50*100 ticks
|
||||
return ((count % pwm_period) > pwm_duty) ? 1 : 0;
|
||||
}
|
||||
|
||||
uint8_t processRX() {
|
||||
uint32_t n = 0;
|
||||
|
||||
n = PIOS_COM_ReceiveBufferUsed(PIOS_COM_TELEM_USB);
|
||||
if (n != 0) {
|
||||
n = (n > 63) ? 63 : n;
|
||||
|
||||
for (int32_t x = 0; x < n; ++x) {
|
||||
Receive_Buffer[x] = PIOS_COM_ReceiveBuffer(PIOS_COM_TELEM_USB);
|
||||
}
|
||||
processComand(Receive_Buffer);
|
||||
return TRUE;
|
||||
}
|
||||
return FALSE;
|
||||
}
|
||||
518
flight/Bootloaders/OpenPilot/op_dfu.c
Normal file
518
flight/Bootloaders/OpenPilot/op_dfu.c
Normal file
@ -0,0 +1,518 @@
|
||||
/******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
|
||||
* File Name : usb_endp.c
|
||||
* Author : MCD Application Team
|
||||
* Version : V3.2.1
|
||||
* Date : 07/05/2010
|
||||
* Description : Endpoint routines
|
||||
********************************************************************************
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
//#include "platform_config.h"
|
||||
#include "pios.h"
|
||||
//#include "stm32f10x.h"
|
||||
//#include "usb_lib.h"
|
||||
//#include "usb_istr.h"
|
||||
//#include "stm32_eval.h"
|
||||
//#include "stm32f10x_flash.h"
|
||||
//#include "stm32f10x_crc.h"
|
||||
//#include "hw_config.h"
|
||||
//#include <string.h>
|
||||
#include "op_dfu.h"
|
||||
#include "pios_bl_helper.h"
|
||||
#include "pios_opahrs.h"
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
//programmable devices
|
||||
Device devicesTable[10];
|
||||
uint8_t numberOfDevices = 0;
|
||||
|
||||
DFUProgType currentProgrammingDestination; //flash, flash_trough spi
|
||||
uint8_t currentDeviceCanRead;
|
||||
uint8_t currentDeviceCanWrite;
|
||||
Device currentDevice;
|
||||
|
||||
uint8_t Buffer[64];
|
||||
uint8_t echoBuffer[64];
|
||||
uint8_t SendBuffer[64];
|
||||
uint8_t Command = 0;
|
||||
uint8_t EchoReqFlag = 0;
|
||||
uint8_t EchoAnsFlag = 0;
|
||||
uint8_t StartFlag = 0;
|
||||
uint32_t Aditionals = 0;
|
||||
uint32_t SizeOfTransfer = 0;
|
||||
uint32_t Expected_CRC = 0;
|
||||
uint8_t SizeOfLastPacket = 0;
|
||||
uint32_t Next_Packet = 0;
|
||||
uint8_t TransferType;
|
||||
uint32_t Count = 0;
|
||||
uint32_t Data;
|
||||
uint8_t Data0;
|
||||
uint8_t Data1;
|
||||
uint8_t Data2;
|
||||
uint8_t Data3;
|
||||
uint8_t offset = 0;
|
||||
uint32_t aux;
|
||||
uint8_t spi_dev_desc[200];
|
||||
//Download vars
|
||||
uint32_t downSizeOfLastPacket = 0;
|
||||
uint32_t downPacketTotal = 0;
|
||||
uint32_t downPacketCurrent = 0;
|
||||
DFUTransfer downType = 0;
|
||||
/* Extern variables ----------------------------------------------------------*/
|
||||
extern DFUStates DeviceState;
|
||||
extern uint8_t JumpToApp;
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
uint32_t CalcFirmCRC(void);
|
||||
|
||||
void DataDownload(DownloadAction action) {
|
||||
if ((DeviceState == downloading)) {
|
||||
|
||||
uint8_t packetSize;
|
||||
uint32_t offset;
|
||||
SendBuffer[0] = 0x01;
|
||||
SendBuffer[1] = Download;
|
||||
SendBuffer[2] = downPacketCurrent >> 24;
|
||||
SendBuffer[3] = downPacketCurrent >> 16;
|
||||
SendBuffer[4] = downPacketCurrent >> 8;
|
||||
SendBuffer[5] = downPacketCurrent;
|
||||
if (downPacketCurrent == downPacketTotal - 1) {
|
||||
packetSize = downSizeOfLastPacket;
|
||||
} else {
|
||||
packetSize = 14;
|
||||
}
|
||||
for (uint8_t x = 0; x < packetSize; ++x) {
|
||||
offset = baseOfAdressType(downType) + (downPacketCurrent * 14 * 4)
|
||||
+ (x * 4);
|
||||
switch (currentProgrammingDestination) {
|
||||
case Self_flash:
|
||||
SendBuffer[6 + (x * 4)] = spi_dev_desc[offset];
|
||||
SendBuffer[7 + (x * 4)] = spi_dev_desc[offset + 1];
|
||||
SendBuffer[8 + (x * 4)] = spi_dev_desc[offset + 2];
|
||||
SendBuffer[9 + (x * 4)] = spi_dev_desc[offset + 3];
|
||||
break;
|
||||
case Remote_flash_via_spi:
|
||||
if (downType == Descript) {
|
||||
SendBuffer[6 + (x * 4)] = *FLASH_If_Read(offset);
|
||||
SendBuffer[7 + (x * 4)] = *FLASH_If_Read(offset + 1);
|
||||
SendBuffer[8 + (x * 4)] = *FLASH_If_Read(offset + 2);
|
||||
SendBuffer[9 + (x * 4)] = *FLASH_If_Read(offset + 3);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
//PIOS USB_SIL_Write(EP1_IN, (uint8_t*) SendBuffer, 64);
|
||||
downPacketCurrent = downPacketCurrent + 1;
|
||||
if (downPacketCurrent > downPacketTotal - 1) {
|
||||
// STM_EVAL_LEDOn(LED2);
|
||||
DeviceState = Last_operation_Success;
|
||||
Aditionals = (uint32_t) Download;
|
||||
}
|
||||
PIOS_COM_SendBuffer(PIOS_COM_TELEM_USB, SendBuffer + 1, 63);//FIX+1
|
||||
//PIOS SetEPTxValid(ENDP1);
|
||||
}
|
||||
}
|
||||
|
||||
void processComand(uint8_t *Receive_Buffer) {
|
||||
|
||||
Command = Receive_Buffer[COMMAND];
|
||||
EchoReqFlag = (Command >> 7);
|
||||
EchoAnsFlag = (Command >> 6) & 0x01;
|
||||
StartFlag = (Command >> 5) & 0x01;
|
||||
Count = Receive_Buffer[COUNT] << 24;
|
||||
Count += Receive_Buffer[COUNT + 1] << 16;
|
||||
Count += Receive_Buffer[COUNT + 2] << 8;
|
||||
Count += Receive_Buffer[COUNT + 3];
|
||||
Data = Receive_Buffer[DATA] << 24;
|
||||
Data += Receive_Buffer[DATA + 1] << 16;
|
||||
Data += Receive_Buffer[DATA + 2] << 8;
|
||||
Data += Receive_Buffer[DATA + 3];
|
||||
Data0 = Receive_Buffer[DATA];
|
||||
Data1 = Receive_Buffer[DATA + 1];
|
||||
Data2 = Receive_Buffer[DATA + 2];
|
||||
Data3 = Receive_Buffer[DATA + 3];
|
||||
Command = Command & 0b00011111;
|
||||
|
||||
if (EchoReqFlag == 1) {
|
||||
memcpy(echoBuffer, Buffer, 64);
|
||||
}
|
||||
switch (Command) {
|
||||
case EnterDFU:
|
||||
if (((DeviceState == BLidle) && (Data0 < numberOfDevices))
|
||||
|| (DeviceState == DFUidle)) {
|
||||
if(Data0>0)
|
||||
OPDfuIni(TRUE);
|
||||
DeviceState = DFUidle;
|
||||
currentProgrammingDestination = devicesTable[Data0].programmingType;
|
||||
currentDeviceCanRead = devicesTable[Data0].readWriteFlags & 0x01;
|
||||
currentDeviceCanWrite = devicesTable[Data0].readWriteFlags >> 1
|
||||
& 0x01;
|
||||
currentDevice = devicesTable[Data0];
|
||||
uint8_t result = 0;
|
||||
switch (currentProgrammingDestination) {
|
||||
case Self_flash:
|
||||
result = FLASH_Ini();
|
||||
break;
|
||||
case Remote_flash_via_spi:
|
||||
//TODO result=SPI_FLASH();
|
||||
break;
|
||||
default:
|
||||
DeviceState = Last_operation_failed;
|
||||
Aditionals = (uint16_t) Command;
|
||||
}
|
||||
if (result != 1) {
|
||||
DeviceState = Last_operation_failed;
|
||||
Aditionals = (uint32_t) Command;
|
||||
}
|
||||
} else {
|
||||
DeviceState = outsideDevCapabilities;
|
||||
Aditionals = (uint32_t) Command;
|
||||
}
|
||||
break;
|
||||
case Upload:
|
||||
if ((DeviceState == DFUidle) || (DeviceState == uploading)) {
|
||||
if ((StartFlag == 1) && (Next_Packet == 0)) {
|
||||
TransferType = Data0;
|
||||
SizeOfTransfer = Count;
|
||||
Next_Packet = 1;
|
||||
Expected_CRC = Data2 << 24;
|
||||
Expected_CRC += Data3 << 16;
|
||||
Expected_CRC += Receive_Buffer[DATA + 4] << 8;
|
||||
Expected_CRC += Receive_Buffer[DATA + 5];
|
||||
SizeOfLastPacket = Data1;
|
||||
|
||||
if (isBiggerThanAvailable(TransferType, (SizeOfTransfer - 1)
|
||||
* 14 * 4 + SizeOfLastPacket * 4) == TRUE) {
|
||||
DeviceState = outsideDevCapabilities;
|
||||
Aditionals = (uint32_t) Command;
|
||||
} else {
|
||||
uint8_t result = 1;
|
||||
struct opahrs_msg_v0 rsp;
|
||||
if (TransferType == FW) {
|
||||
switch (currentProgrammingDestination) {
|
||||
case Self_flash:
|
||||
result = FLASH_Start();
|
||||
break;
|
||||
case Remote_flash_via_spi:
|
||||
if (PIOS_OPAHRS_bl_FwupVerify(&rsp)
|
||||
== OPAHRS_RESULT_OK) {
|
||||
if (rsp.payload.user.v.rsp.fwup_status.status
|
||||
== started) {
|
||||
result = TRUE;
|
||||
} else
|
||||
result = FALSE;
|
||||
} else
|
||||
result = FALSE;
|
||||
break;
|
||||
default:
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (result != 1) {
|
||||
DeviceState = Last_operation_failed;//ok
|
||||
Aditionals = (uint32_t) Command;
|
||||
} else {
|
||||
|
||||
DeviceState = uploading;
|
||||
}
|
||||
}
|
||||
} else if ((StartFlag != 1) && (Next_Packet != 0)) {
|
||||
if (Count > SizeOfTransfer) {
|
||||
DeviceState = too_many_packets;
|
||||
Aditionals = Count;
|
||||
} else if (Count == Next_Packet - 1) {
|
||||
uint8_t numberOfWords = 14;
|
||||
if (Count == SizeOfTransfer - 1)//is this the last packet?
|
||||
{
|
||||
numberOfWords = SizeOfLastPacket;
|
||||
}
|
||||
for (uint8_t x = 0; x < numberOfWords; ++x) {
|
||||
offset = 4 * x;
|
||||
Data = Receive_Buffer[DATA + offset] << 24;
|
||||
Data += Receive_Buffer[DATA + 1 + offset] << 16;
|
||||
Data += Receive_Buffer[DATA + 2 + offset] << 8;
|
||||
Data += Receive_Buffer[DATA + 3 + offset];
|
||||
aux = baseOfAdressType(TransferType) + (uint32_t)(Count
|
||||
* 14 * 4 + x * 4);
|
||||
uint8_t result = 0;
|
||||
struct opahrs_msg_v0 rsp;
|
||||
struct opahrs_msg_v0 req;
|
||||
switch (currentProgrammingDestination) {
|
||||
case Self_flash:
|
||||
for (int retry = 0; retry < MAX_WRI_RETRYS; ++retry) {
|
||||
if (result == 0) {
|
||||
result = (FLASH_ProgramWord(aux, Data)
|
||||
== FLASH_COMPLETE) ? 1 : 0;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case Remote_flash_via_spi:
|
||||
req.payload.user.v.req.fwup_data.adress = aux;
|
||||
req.payload.user.v.req.fwup_data.data = Data;
|
||||
if (PIOS_OPAHRS_bl_FwupData(&req, &rsp)
|
||||
== OPAHRS_RESULT_OK) {
|
||||
if (rsp.payload.user.v.rsp.fwup_status.status
|
||||
== started) {
|
||||
result = TRUE;
|
||||
} else if (rsp.payload.user.v.rsp.fwup_status.status
|
||||
== outside_dev_capabilities) {
|
||||
result = TRUE;
|
||||
DeviceState = outsideDevCapabilities;
|
||||
} else
|
||||
result = FALSE;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
result = 0;
|
||||
break;
|
||||
}
|
||||
if (result != 1) {
|
||||
DeviceState = Last_operation_failed;
|
||||
Aditionals = (uint32_t) Command;
|
||||
}
|
||||
}
|
||||
++Next_Packet;
|
||||
} else {
|
||||
|
||||
DeviceState = wrong_packet_received;
|
||||
Aditionals = Count;
|
||||
}
|
||||
// FLASH_ProgramWord(MemLocations[TransferType]+4,++Next_Packet);//+Count,Data);
|
||||
} else {
|
||||
DeviceState = Last_operation_failed;
|
||||
Aditionals = (uint32_t) Command;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case Req_Capabilities:
|
||||
OPDfuIni(TRUE);
|
||||
Buffer[0] = 0x01;
|
||||
Buffer[1] = Rep_Capabilities;
|
||||
if (Data0 == 0) {
|
||||
Buffer[2] = 0;
|
||||
Buffer[3] = 0;
|
||||
Buffer[4] = 0;
|
||||
Buffer[5] = 0;
|
||||
Buffer[6] = 0;
|
||||
Buffer[7] = numberOfDevices;
|
||||
uint16_t WRFlags = 0;
|
||||
for (int x = 0; x < numberOfDevices; ++x) {
|
||||
WRFlags = ((devicesTable[x].readWriteFlags << (x * 2))
|
||||
| WRFlags);
|
||||
}
|
||||
Buffer[8] = WRFlags >> 8;
|
||||
Buffer[9] = WRFlags;
|
||||
} else {
|
||||
Buffer[2] = devicesTable[Data0 - 1].sizeOfCode >> 24;
|
||||
Buffer[3] = devicesTable[Data0 - 1].sizeOfCode >> 16;
|
||||
Buffer[4] = devicesTable[Data0 - 1].sizeOfCode >> 8;
|
||||
Buffer[5] = devicesTable[Data0 - 1].sizeOfCode;
|
||||
Buffer[6] = Data0;
|
||||
Buffer[7] = devicesTable[Data0 - 1].BL_Version;
|
||||
Buffer[8] = devicesTable[Data0 - 1].sizeOfDescription;
|
||||
Buffer[9] = devicesTable[Data0 - 1].devID;
|
||||
Buffer[10] = devicesTable[Data0 - 1].FW_Crc >> 24;
|
||||
Buffer[11] = devicesTable[Data0 - 1].FW_Crc >> 16;
|
||||
Buffer[12] = devicesTable[Data0 - 1].FW_Crc >> 8;
|
||||
Buffer[13] = devicesTable[Data0 - 1].FW_Crc;
|
||||
}
|
||||
//PIOS USB_SIL_Write(EP1_IN, (uint8_t*) Buffer, 64);
|
||||
PIOS_COM_SendBuffer(PIOS_COM_TELEM_USB, Buffer + 1, 63);//FIX+1
|
||||
break;
|
||||
case JumpFW:
|
||||
FLASH_Lock();
|
||||
PIOS_OPAHRS_bl_boot();
|
||||
JumpToApp = 1;
|
||||
break;
|
||||
case Reset:
|
||||
//PIOS Reset_Device();
|
||||
break;
|
||||
case Abort_Operation:
|
||||
Next_Packet = 0;
|
||||
DeviceState = DFUidle;
|
||||
break;
|
||||
|
||||
case Op_END:
|
||||
if (DeviceState == uploading) {
|
||||
if (Next_Packet - 1 == SizeOfTransfer) {
|
||||
Next_Packet = 0;
|
||||
if ((TransferType != FW) || (Expected_CRC == CalcFirmCRC())) {
|
||||
DeviceState = Last_operation_Success;
|
||||
} else {
|
||||
DeviceState = CRC_Fail;
|
||||
}
|
||||
}
|
||||
if (Next_Packet - 1 < SizeOfTransfer) {
|
||||
Next_Packet = 0;
|
||||
DeviceState = too_few_packets;
|
||||
}
|
||||
}
|
||||
|
||||
break;
|
||||
case Download_Req:
|
||||
if (DeviceState == DFUidle) {
|
||||
downType = Data0;
|
||||
downPacketTotal = Count;
|
||||
downSizeOfLastPacket = Data1;
|
||||
if (isBiggerThanAvailable(downType, (downPacketTotal - 1) * 14
|
||||
+ downSizeOfLastPacket) == 1) {
|
||||
DeviceState = outsideDevCapabilities;
|
||||
Aditionals = (uint32_t) Command;
|
||||
|
||||
} else
|
||||
downPacketCurrent = 0;
|
||||
DeviceState = downloading;
|
||||
} else {
|
||||
DeviceState = Last_operation_failed;
|
||||
Aditionals = (uint32_t) Command;
|
||||
}
|
||||
break;
|
||||
|
||||
case Status_Request:
|
||||
Buffer[0] = 0x01;
|
||||
Buffer[1] = Status_Rep;
|
||||
if (DeviceState == wrong_packet_received) {
|
||||
Buffer[2] = Aditionals >> 24;
|
||||
Buffer[3] = Aditionals >> 16;
|
||||
Buffer[4] = Aditionals >> 8;
|
||||
Buffer[5] = Aditionals;
|
||||
} else {
|
||||
Buffer[2] = 0;
|
||||
Buffer[3] = ((uint16_t) Aditionals) >> 8;
|
||||
Buffer[4] = ((uint16_t) Aditionals);
|
||||
Buffer[5] = 0;
|
||||
}
|
||||
Buffer[6] = DeviceState;
|
||||
Buffer[7] = 0;
|
||||
Buffer[8] = 0;
|
||||
Buffer[9] = 0;
|
||||
PIOS_COM_SendBuffer(PIOS_COM_TELEM_USB, Buffer + 1, 63);//FIX+1
|
||||
//PIOS USB_SIL_Write(EP1_IN, (uint8_t*) Buffer, 64);
|
||||
//PIOS SetEPTxValid(ENDP1);
|
||||
if (DeviceState == Last_operation_Success) {
|
||||
DeviceState = DFUidle;
|
||||
}
|
||||
break;
|
||||
case Status_Rep:
|
||||
|
||||
break;
|
||||
|
||||
}
|
||||
if (EchoReqFlag == 1) {
|
||||
echoBuffer[1] = echoBuffer[1] | EchoAnsFlag;
|
||||
PIOS_COM_SendBuffer(PIOS_COM_TELEM_USB, echoBuffer, 63);
|
||||
//PIOS USB_SIL_Write(EP1_IN, (uint8_t*) echoBuffer, 64);
|
||||
//PIOS SetEPTxValid(ENDP1);
|
||||
}
|
||||
return;
|
||||
}
|
||||
void OPDfuIni(uint8_t discover) {
|
||||
Device dev;
|
||||
dev.programmingType = Self_flash;
|
||||
dev.readWriteFlags = (BOARD_READABLE | (BOARD_WRITABLA << 1));
|
||||
dev.startOfUserCode = START_OF_USER_CODE;
|
||||
dev.sizeOfCode = SIZE_OF_CODE;
|
||||
dev.sizeOfDescription = SIZE_OF_DESCRIPTION;
|
||||
dev.BL_Version = BOOTLOADER_VERSION;
|
||||
dev.FW_Crc = CalcFirmCRC();
|
||||
dev.devID = HW_VERSION;
|
||||
dev.devType = HW_TYPE;
|
||||
numberOfDevices = 1;
|
||||
devicesTable[0] = dev;
|
||||
if (discover) {
|
||||
uint8_t found_spi_device = FALSE;
|
||||
|
||||
for (int t = 0; t < 10; ++t) {
|
||||
if (PIOS_OPAHRS_bl_resync() == OPAHRS_RESULT_OK) {
|
||||
found_spi_device = TRUE;
|
||||
dev.FW_Crc = 0;
|
||||
break;
|
||||
}
|
||||
PIOS_DELAY_WaitmS(500);
|
||||
}
|
||||
if (found_spi_device == TRUE) {
|
||||
struct opahrs_msg_v0 rsp;
|
||||
if (PIOS_OPAHRS_bl_GetVersions(&rsp) == OPAHRS_RESULT_OK) {
|
||||
dev.programmingType = Remote_flash_via_spi;
|
||||
dev.BL_Version = rsp.payload.user.v.rsp.versions.bl_version;
|
||||
dev.FW_Crc = rsp.payload.user.v.rsp.versions.fw_version;
|
||||
dev.devID = rsp.payload.user.v.rsp.versions.hw_version;
|
||||
memcpy(spi_dev_desc,
|
||||
rsp.payload.user.v.rsp.versions.description,
|
||||
sizeof(rsp.payload.user.v.rsp.versions.description));
|
||||
if (PIOS_OPAHRS_bl_GetMemMap(&rsp) == OPAHRS_RESULT_OK) {
|
||||
dev.readWriteFlags
|
||||
= rsp.payload.user.v.rsp.mem_map.rw_flags;
|
||||
dev.startOfUserCode
|
||||
= rsp.payload.user.v.rsp.mem_map.start_of_user_code;
|
||||
dev.sizeOfCode
|
||||
= rsp.payload.user.v.rsp.mem_map.size_of_code_memory;
|
||||
dev.sizeOfDescription
|
||||
= rsp.payload.user.v.rsp.mem_map.size_of_description;
|
||||
dev.devType = rsp.payload.user.v.rsp.mem_map.density;
|
||||
numberOfDevices = 2;
|
||||
devicesTable[1] = dev;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
//TODO check other devices trough spi or whatever
|
||||
}
|
||||
uint32_t baseOfAdressType(DFUTransfer type) {
|
||||
switch (type) {
|
||||
case FW:
|
||||
return currentDevice.startOfUserCode;
|
||||
break;
|
||||
case Descript:
|
||||
return currentDevice.startOfUserCode + currentDevice.sizeOfCode;
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
uint8_t isBiggerThanAvailable(DFUTransfer type, uint32_t size) {
|
||||
switch (type) {
|
||||
case FW:
|
||||
return (size > currentDevice.sizeOfCode) ? 1 : 0;
|
||||
break;
|
||||
case Descript:
|
||||
return (size > currentDevice.sizeOfDescription) ? 1 : 0;
|
||||
break;
|
||||
default:
|
||||
return TRUE;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t CalcFirmCRC() {
|
||||
struct opahrs_msg_v0 rsp;
|
||||
switch (currentProgrammingDestination) {
|
||||
case Self_flash:
|
||||
return crc_memory_calc();
|
||||
break;
|
||||
case Remote_flash_via_spi:
|
||||
if (PIOS_OPAHRS_bl_FwupVerify(&rsp) == OPAHRS_RESULT_OK) {
|
||||
if (PIOS_OPAHRS_bl_GetVersions(&rsp) == OPAHRS_RESULT_OK) {
|
||||
return rsp.payload.user.v.rsp.versions.fw_version;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
665
flight/Bootloaders/OpenPilot/pios_board.c
Normal file
665
flight/Bootloaders/OpenPilot/pios_board.c
Normal file
@ -0,0 +1,665 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @addtogroup OpenPilotSystem OpenPilot System
|
||||
* @{
|
||||
* @addtogroup OpenPilotCore OpenPilot Core
|
||||
* @{
|
||||
*
|
||||
* @file pios_board.c
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
|
||||
* @brief Defines board specific static initializers for hardware for the OpenPilot board.
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <pios.h>
|
||||
#include <pios_spi_priv.h>
|
||||
#include <pios_usart_priv.h>
|
||||
#include <pios_com_priv.h>
|
||||
#include <pios_i2c_priv.h>
|
||||
//#include <openpilot.h>
|
||||
//#include <uavobjectsinit.h>
|
||||
|
||||
/**
|
||||
* PIOS_Board_Init()
|
||||
* initializes all the core subsystems on this specific hardware
|
||||
* called from System/openpilot.c
|
||||
*/
|
||||
void PIOS_Board_Init(void) {
|
||||
|
||||
|
||||
/* Enable Prefetch Buffer */
|
||||
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
|
||||
|
||||
/* Flash 2 wait state */
|
||||
FLASH_SetLatency(FLASH_Latency_2);
|
||||
|
||||
/* Delay system */
|
||||
PIOS_DELAY_Init();
|
||||
|
||||
/* SPI Init */
|
||||
PIOS_SPI_Init();
|
||||
|
||||
/* Enable and mount the SDCard */
|
||||
// PIOS_SDCARD_Init();
|
||||
// PIOS_SDCARD_MountFS(0);
|
||||
#if defined(PIOS_INCLUDE_SPEKTRUM)
|
||||
/* SPEKTRUM init must come before comms */
|
||||
PIOS_SPEKTRUM_Init();
|
||||
#endif
|
||||
/* Initialize UAVObject libraries */
|
||||
// EventDispatcherInitialize();
|
||||
// UAVObjInitialize();
|
||||
// UAVObjectsInitializeAll();
|
||||
|
||||
/* Initialize the alarms library */
|
||||
// AlarmsInitialize();
|
||||
|
||||
/* Initialize the PiOS library */
|
||||
PIOS_COM_Init();
|
||||
//PIOS_Servo_Init();
|
||||
//PIOS_ADC_Init();
|
||||
PIOS_GPIO_Init();
|
||||
|
||||
#if defined(PIOS_INCLUDE_PWM)
|
||||
PIOS_PWM_Init();
|
||||
#endif
|
||||
#if defined(PIOS_INCLUDE_PPM)
|
||||
PIOS_PPM_Init();
|
||||
#endif
|
||||
#if defined(PIOS_INCLUDE_USB_HID)
|
||||
PIOS_USB_HID_Init(0);
|
||||
#endif
|
||||
//PIOS_I2C_Init();
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE);
|
||||
}
|
||||
|
||||
/* MicroSD Interface
|
||||
*
|
||||
* NOTE: Leave this declared as const data so that it ends up in the
|
||||
* .rodata section (ie. Flash) rather than in the .bss section (RAM).
|
||||
*/
|
||||
void PIOS_SPI_sdcard_irq_handler(void);
|
||||
void DMA1_Channel2_IRQHandler() __attribute__ ((alias ("PIOS_SPI_sdcard_irq_handler")));
|
||||
void DMA1_Channel3_IRQHandler() __attribute__ ((alias ("PIOS_SPI_sdcard_irq_handler")));
|
||||
const struct pios_spi_cfg pios_spi_sdcard_cfg = {
|
||||
.regs = SPI1,
|
||||
.init = {
|
||||
.SPI_Mode = SPI_Mode_Master,
|
||||
.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
|
||||
.SPI_DataSize = SPI_DataSize_8b,
|
||||
.SPI_NSS = SPI_NSS_Soft,
|
||||
.SPI_FirstBit = SPI_FirstBit_MSB,
|
||||
.SPI_CRCPolynomial = 7,
|
||||
.SPI_CPOL = SPI_CPOL_High,
|
||||
.SPI_CPHA = SPI_CPHA_2Edge,
|
||||
.SPI_BaudRatePrescaler = 7 << 3, /* Maximum divider (ie. slowest clock rate) */
|
||||
},
|
||||
.dma = {
|
||||
.ahb_clk = RCC_AHBPeriph_DMA1,
|
||||
|
||||
.irq = {
|
||||
.handler = PIOS_SPI_sdcard_irq_handler,
|
||||
.flags = (DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_HT2 | DMA1_FLAG_GL2),
|
||||
.init = {
|
||||
.NVIC_IRQChannel = DMA1_Channel2_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
|
||||
.rx = {
|
||||
.channel = DMA1_Channel2,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralSRC,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.channel = DMA1_Channel3,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralDST,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
},
|
||||
.ssel = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_4,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_Out_PP,
|
||||
},
|
||||
},
|
||||
.sclk = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_5,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
.miso = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_6,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IPU,
|
||||
},
|
||||
},
|
||||
.mosi = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_7,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/* AHRS Interface
|
||||
*
|
||||
* NOTE: Leave this declared as const data so that it ends up in the
|
||||
* .rodata section (ie. Flash) rather than in the .bss section (RAM).
|
||||
*/
|
||||
void PIOS_SPI_ahrs_irq_handler(void);
|
||||
void DMA1_Channel4_IRQHandler() __attribute__ ((alias ("PIOS_SPI_ahrs_irq_handler")));
|
||||
void DMA1_Channel5_IRQHandler() __attribute__ ((alias ("PIOS_SPI_ahrs_irq_handler")));
|
||||
const struct pios_spi_cfg pios_spi_ahrs_cfg = {
|
||||
.regs = SPI2,
|
||||
.init = {
|
||||
.SPI_Mode = SPI_Mode_Master,
|
||||
.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
|
||||
.SPI_DataSize = SPI_DataSize_8b,
|
||||
.SPI_NSS = SPI_NSS_Soft,
|
||||
.SPI_FirstBit = SPI_FirstBit_MSB,
|
||||
.SPI_CRCPolynomial = 7,
|
||||
.SPI_CPOL = SPI_CPOL_High,
|
||||
.SPI_CPHA = SPI_CPHA_2Edge,
|
||||
.SPI_BaudRatePrescaler = 7 << 3, /* Maximum divider (ie. slowest clock rate) */
|
||||
},
|
||||
.use_crc = TRUE,
|
||||
.dma = {
|
||||
.ahb_clk = RCC_AHBPeriph_DMA1,
|
||||
|
||||
.irq = {
|
||||
.handler = PIOS_SPI_ahrs_irq_handler,
|
||||
.flags = (DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 | DMA1_FLAG_GL4),
|
||||
.init = {
|
||||
.NVIC_IRQChannel = DMA1_Channel4_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
|
||||
.rx = {
|
||||
.channel = DMA1_Channel4,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralSRC,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.channel = DMA1_Channel5,
|
||||
.init = {
|
||||
.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
|
||||
.DMA_DIR = DMA_DIR_PeripheralDST,
|
||||
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
|
||||
.DMA_MemoryInc = DMA_MemoryInc_Enable,
|
||||
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
|
||||
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
|
||||
.DMA_Mode = DMA_Mode_Normal,
|
||||
.DMA_Priority = DMA_Priority_Medium,
|
||||
.DMA_M2M = DMA_M2M_Disable,
|
||||
},
|
||||
},
|
||||
},
|
||||
.ssel = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_12,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_Out_PP,
|
||||
},
|
||||
},
|
||||
.sclk = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_13,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
.miso = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_14,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
},
|
||||
.mosi = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_15,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Board specific number of devices.
|
||||
*/
|
||||
struct pios_spi_dev pios_spi_devs[] = {
|
||||
{
|
||||
.cfg = &pios_spi_sdcard_cfg,
|
||||
},
|
||||
{
|
||||
.cfg = &pios_spi_ahrs_cfg,
|
||||
},
|
||||
};
|
||||
|
||||
uint8_t pios_spi_num_devices = NELEMENTS(pios_spi_devs);
|
||||
|
||||
void PIOS_SPI_sdcard_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
PIOS_SPI_IRQ_Handler(PIOS_SDCARD_SPI);
|
||||
}
|
||||
|
||||
void PIOS_SPI_ahrs_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
PIOS_SPI_IRQ_Handler(PIOS_OPAHRS_SPI);
|
||||
}
|
||||
|
||||
/*
|
||||
* Telemetry USART
|
||||
*/
|
||||
void PIOS_USART_telem_irq_handler(void);
|
||||
void USART2_IRQHandler() __attribute__ ((alias ("PIOS_USART_telem_irq_handler")));
|
||||
const struct pios_usart_cfg pios_usart_telem_cfg = {
|
||||
.regs = USART2,
|
||||
.init = {
|
||||
.USART_BaudRate = 57600,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx,
|
||||
},
|
||||
.irq = {
|
||||
.handler = PIOS_USART_telem_irq_handler,
|
||||
.init = {
|
||||
.NVIC_IRQChannel = USART2_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.rx = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_3,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IPU,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_2,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* GPS USART
|
||||
*/
|
||||
void PIOS_USART_gps_irq_handler(void);
|
||||
void USART3_IRQHandler() __attribute__ ((alias ("PIOS_USART_gps_irq_handler")));
|
||||
const struct pios_usart_cfg pios_usart_gps_cfg = {
|
||||
.regs = USART3,
|
||||
.remap = GPIO_PartialRemap_USART3,
|
||||
.init = {
|
||||
.USART_BaudRate = 57600,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx,
|
||||
},
|
||||
.irq = {
|
||||
.handler = PIOS_USART_gps_irq_handler,
|
||||
.init = {
|
||||
.NVIC_IRQChannel = USART3_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.rx = {
|
||||
.gpio = GPIOC,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_11,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IPU,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.gpio = GPIOC,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
#ifdef PIOS_COM_AUX
|
||||
/*
|
||||
* AUX USART
|
||||
*/
|
||||
void PIOS_USART_aux_irq_handler(void);
|
||||
void USART1_IRQHandler() __attribute__ ((alias ("PIOS_USART_aux_irq_handler")));
|
||||
const struct pios_usart_cfg pios_usart_aux_cfg = {
|
||||
.regs = USART1,
|
||||
.init = {
|
||||
.USART_BaudRate = 57600,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx,
|
||||
},
|
||||
.irq = {
|
||||
.handler = PIOS_USART_aux_irq_handler,
|
||||
.init = {
|
||||
.NVIC_IRQChannel = USART1_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.remap = GPIO_Remap_USART1,
|
||||
.rx = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_7,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IPU,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_6,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
},
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef PIOS_COM_SPEKTRUM
|
||||
/*
|
||||
* SPEKTRUM USART
|
||||
*/
|
||||
void PIOS_USART_spektrum_irq_handler(void);
|
||||
void USART1_IRQHandler() __attribute__ ((alias ("PIOS_USART_spektrum_irq_handler")));
|
||||
const struct pios_usart_cfg pios_usart_spektrum_cfg = {
|
||||
.regs = USART1,
|
||||
.init = {
|
||||
.USART_BaudRate = 115200,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
|
||||
.USART_Mode = USART_Mode_Rx,
|
||||
},
|
||||
.irq = {
|
||||
.handler = PIOS_USART_spektrum_irq_handler,
|
||||
.init = {
|
||||
.NVIC_IRQChannel = USART1_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.rx = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IPU,
|
||||
},
|
||||
},
|
||||
.tx = {
|
||||
.gpio = GPIOA,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_9,
|
||||
.GPIO_Speed = GPIO_Speed_2MHz,
|
||||
.GPIO_Mode = GPIO_Mode_IN_FLOATING,
|
||||
},
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Board specific number of devices.
|
||||
*/
|
||||
struct pios_usart_dev pios_usart_devs[] = {
|
||||
#define PIOS_USART_TELEM 0
|
||||
{
|
||||
.cfg = &pios_usart_telem_cfg,
|
||||
},
|
||||
#define PIOS_USART_GPS 1
|
||||
{
|
||||
.cfg = &pios_usart_gps_cfg,
|
||||
},
|
||||
#ifdef PIOS_COM_AUX
|
||||
#define PIOS_USART_AUX 2
|
||||
{
|
||||
.cfg = &pios_usart_aux_cfg,
|
||||
},
|
||||
#endif
|
||||
#ifdef PIOS_COM_SPEKTRUM
|
||||
#define PIOS_USART_AUX 2
|
||||
{
|
||||
.cfg = &pios_usart_spektrum_cfg,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
uint8_t pios_usart_num_devices = NELEMENTS(pios_usart_devs);
|
||||
|
||||
void PIOS_USART_telem_irq_handler(void)
|
||||
{
|
||||
PIOS_USART_IRQ_Handler(PIOS_USART_TELEM);
|
||||
}
|
||||
|
||||
void PIOS_USART_gps_irq_handler(void)
|
||||
{
|
||||
PIOS_USART_IRQ_Handler(PIOS_USART_GPS);
|
||||
}
|
||||
|
||||
#ifdef PIOS_COM_AUX
|
||||
void PIOS_USART_aux_irq_handler(void)
|
||||
{
|
||||
PIOS_USART_IRQ_Handler(PIOS_USART_AUX);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PIOS_COM_SPEKTRUM
|
||||
void PIOS_USART_spektrum_irq_handler(void)
|
||||
{
|
||||
SPEKTRUM_IRQHandler();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* COM devices
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board specific number of devices.
|
||||
*/
|
||||
extern const struct pios_com_driver pios_usart_com_driver;
|
||||
extern const struct pios_com_driver pios_usb_com_driver;
|
||||
|
||||
struct pios_com_dev pios_com_devs[] = {
|
||||
{
|
||||
.id = PIOS_USART_TELEM,
|
||||
.driver = &pios_usart_com_driver,
|
||||
},
|
||||
{
|
||||
.id = PIOS_USART_GPS,
|
||||
.driver = &pios_usart_com_driver,
|
||||
},
|
||||
#if defined(PIOS_INCLUDE_USB_HID)
|
||||
{
|
||||
.id = 0,
|
||||
.driver = &pios_usb_com_driver,
|
||||
},
|
||||
#endif
|
||||
#ifdef PIOS_COM_AUX
|
||||
{
|
||||
.id = PIOS_USART_AUX,
|
||||
.driver = &pios_usart_com_driver,
|
||||
},
|
||||
#endif
|
||||
#ifdef PIOS_COM_SPEKTRUM
|
||||
{
|
||||
.id = PIOS_USART_AUX,
|
||||
.driver = &pios_usart_com_driver,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
const uint8_t pios_com_num_devices = NELEMENTS(pios_com_devs);
|
||||
|
||||
/*
|
||||
* I2C Adapters
|
||||
*/
|
||||
|
||||
void PIOS_I2C_main_adapter_ev_irq_handler(void);
|
||||
void PIOS_I2C_main_adapter_er_irq_handler(void);
|
||||
void I2C2_EV_IRQHandler() __attribute__ ((alias ("PIOS_I2C_main_adapter_ev_irq_handler")));
|
||||
void I2C2_ER_IRQHandler() __attribute__ ((alias ("PIOS_I2C_main_adapter_er_irq_handler")));
|
||||
|
||||
const struct pios_i2c_adapter_cfg pios_i2c_main_adapter_cfg = {
|
||||
.regs = I2C2,
|
||||
.init = {
|
||||
.I2C_Mode = I2C_Mode_I2C,
|
||||
.I2C_OwnAddress1 = 0,
|
||||
.I2C_Ack = I2C_Ack_Enable,
|
||||
.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit,
|
||||
.I2C_DutyCycle = I2C_DutyCycle_2,
|
||||
.I2C_ClockSpeed = 400000, /* bits/s */
|
||||
},
|
||||
.transfer_timeout_ms = 50,
|
||||
.scl = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_10,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_OD,
|
||||
},
|
||||
},
|
||||
.sda = {
|
||||
.gpio = GPIOB,
|
||||
.init = {
|
||||
.GPIO_Pin = GPIO_Pin_11,
|
||||
.GPIO_Speed = GPIO_Speed_10MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_OD,
|
||||
},
|
||||
},
|
||||
.event = {
|
||||
.handler = PIOS_I2C_main_adapter_ev_irq_handler,
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C2_EV_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
.error = {
|
||||
.handler = PIOS_I2C_main_adapter_er_irq_handler,
|
||||
.flags = 0, /* FIXME: check this */
|
||||
.init = {
|
||||
.NVIC_IRQChannel = I2C2_ER_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
|
||||
.NVIC_IRQChannelSubPriority = 0,
|
||||
.NVIC_IRQChannelCmd = ENABLE,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Board specific number of devices.
|
||||
*/
|
||||
struct pios_i2c_adapter pios_i2c_adapters[] = {
|
||||
{
|
||||
.cfg = &pios_i2c_main_adapter_cfg,
|
||||
},
|
||||
};
|
||||
|
||||
uint8_t pios_i2c_num_adapters = NELEMENTS(pios_i2c_adapters);
|
||||
|
||||
void PIOS_I2C_main_adapter_ev_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
// PIOS_I2C_EV_IRQ_Handler(PIOS_I2C_MAIN_ADAPTER);
|
||||
}
|
||||
|
||||
void PIOS_I2C_main_adapter_er_irq_handler(void)
|
||||
{
|
||||
/* Call into the generic code to handle the IRQ for this specific device */
|
||||
// PIOS_I2C_ER_IRQ_Handler(PIOS_I2C_MAIN_ADAPTER);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
74
flight/Bootloaders/OpenPilot/stopwatch.c
Normal file
74
flight/Bootloaders/OpenPilot/stopwatch.c
Normal file
@ -0,0 +1,74 @@
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
// Include files
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#include "stm32f10x_tim.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
// Local definitions
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#define STOPWATCH_TIMER_BASE TIM6
|
||||
#define STOPWATCH_TIMER_RCC RCC_APB1Periph_TIM6
|
||||
|
||||
uint32_t STOPWATCH_Init(u32 resolution)
|
||||
{
|
||||
// enable timer clock
|
||||
if( STOPWATCH_TIMER_RCC == RCC_APB2Periph_TIM1 || STOPWATCH_TIMER_RCC == RCC_APB2Periph_TIM8 )
|
||||
RCC_APB2PeriphClockCmd(STOPWATCH_TIMER_RCC, ENABLE);
|
||||
else
|
||||
RCC_APB1PeriphClockCmd(STOPWATCH_TIMER_RCC, ENABLE);
|
||||
|
||||
// time base configuration
|
||||
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
||||
TIM_TimeBaseStructure.TIM_Period = 0xffff; // max period
|
||||
TIM_TimeBaseStructure.TIM_Prescaler = (72 * resolution)-1; // <resolution> uS accuracy @ 72 MHz
|
||||
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
|
||||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
TIM_TimeBaseInit(STOPWATCH_TIMER_BASE, &TIM_TimeBaseStructure);
|
||||
|
||||
// enable interrupt request
|
||||
TIM_ITConfig(STOPWATCH_TIMER_BASE, TIM_IT_Update, ENABLE);
|
||||
|
||||
// start counter
|
||||
TIM_Cmd(STOPWATCH_TIMER_BASE, ENABLE);
|
||||
|
||||
return 0; // no error
|
||||
}
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
//! Resets the stopwatch
|
||||
//! \return < 0 on errors
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
uint32_t STOPWATCH_Reset(void)
|
||||
{
|
||||
// reset counter
|
||||
STOPWATCH_TIMER_BASE->CNT = 1; // set to 1 instead of 0 to avoid new IRQ request
|
||||
TIM_ClearITPendingBit(STOPWATCH_TIMER_BASE, TIM_IT_Update);
|
||||
|
||||
return 0; // no error
|
||||
}
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
//! Returns current value of stopwatch
|
||||
//! \return 1..65535: valid stopwatch value
|
||||
//! \return 0xffffffff: counter overrun
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
uint32_t STOPWATCH_ValueGet(void)
|
||||
{
|
||||
uint32_t value = STOPWATCH_TIMER_BASE->CNT;
|
||||
|
||||
if( TIM_GetITStatus(STOPWATCH_TIMER_BASE, TIM_IT_Update) != RESET )
|
||||
value = 0xffffffff;
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user