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For PIOS_SPI F4 do not enable the TX irq. Also do not wait for the
transmission to finish either.
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@ -184,7 +184,6 @@ int32_t PIOS_SPI_Init(uint32_t * spi_id, const struct pios_spi_cfg * cfg)
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/* Configure DMA interrupt */
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NVIC_Init((NVIC_InitTypeDef*)&(spi_dev->cfg->dma.irq.init));
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// DMA_ITConfig(spi_dev->cfg->dma.tx.channel, spi_dev->cfg->dma.irq.flags, ENABLE); /* XXX is this correct? */
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return(0);
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@ -630,12 +629,6 @@ void PIOS_SPI_IRQ_Handler(uint32_t spi_id)
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/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
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while (!(SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_TXE))) ;
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/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
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while (SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_BSY)) ;
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} else {
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/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
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while (!(SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_TXE))) ;
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/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
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while (SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_BSY)) ;
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}
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