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build: add support for EE bank on pipx boards

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The pipxtreme boards use a sector of the on-board flash
for configuration storage.  Adjust the memory maps to
reflect this.

The board_info_blob is also extended to include the EE
bank definitions.  This should be used by the pipxtreme
firmware rather than determining it based on chip size.
This commit is contained in:
Stacey Sheldon 2011-05-24 00:25:34 -04:00
parent 91cb294730
commit 8bd08e381a
4 changed files with 10 additions and 1 deletions
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2
flight/Bootloaders/PipXtreme/Makefile
View File

@ -259,6 +259,8 @@ BLONLY_CDEFS += -DBOOTLOADER_VERSION=$(BOOTLOADER_VERSION)
BLONLY_CDEFS += -DFW_BANK_BASE=$(FW_BANK_BASE)
BLONLY_CDEFS += -DFW_BANK_SIZE=$(FW_BANK_SIZE)
BLONLY_CDEFS += -DFW_DESC_SIZE=$(FW_DESC_SIZE)
BLONLY_CDEFS += -DEE_BANK_BASE=$(EE_BANK_BASE)
BLONLY_CDEFS += -DEE_BANK_SIZE=$(EE_BANK_SIZE)
# Place project-specific -D and/or -U options for
# Assembler with preprocessor here.

4
flight/PiOS/Common/pios_board_info.c
View File

@ -13,4 +13,8 @@ const struct pios_board_info __attribute__((__used__)) __attribute__((__section_
.fw_size = FW_BANK_SIZE - FW_DESC_SIZE,
.desc_base = FW_BANK_BASE + FW_BANK_SIZE - FW_DESC_SIZE,
.desc_size = FW_DESC_SIZE,
#ifdef EE_BANK_BASE
.ee_base = EE_BANK_BASE,
.ee_size = EE_BANK_SIZE,
#endif
};

3
flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld
View File

@ -2,6 +2,7 @@ MEMORY
{
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x03000 - 0x00080
BD_INFO (r) : ORIGIN = 0x08003000 - 0x80, LENGTH = 0x00080
FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 0x20000 - 0x03000
FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 0x20000 - 0x03000 - 0x00400
EE_FLASH (rw) : ORIGIN = 0x0801FC00, LENGTH = 0x00400
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x05000
}

2
flight/PiOS/inc/pios_board_info.h
View File

@ -10,6 +10,8 @@ struct pios_board_info {
uint32_t fw_size;
uint32_t desc_base;
uint32_t desc_size;
uint32_t ee_base;
uint32_t ee_size;
} __attribute__((packed));
extern const struct pios_board_info pios_board_info_blob;