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Code Issues Releases Activity

OP-269 PIOS/ADC: Previous ADC driver update changed the PCLK2 divider for all

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projects which messed up a timer on OP and serial on PipX.  Now this is only
changed for AHRS.  Ideally wouldn't even change for that but then ADC runs too
fast and we get a lot more CRC errors for dealing with all that data.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2459 ebee16cc-31ac-478f-84a7-5cbb03baadba
This commit is contained in:
peabody124 2011-01-16 23:00:48 +00:00 committed by peabody124
parent b3ca037308
commit c2bdf624e8
6 changed files with 18 additions and 22 deletions
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4
flight/OpenPilot/System/pios_board.c
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@ -324,7 +324,7 @@ const struct pios_adc_cfg pios_adc_cfg = {
.flags = (DMA1_FLAG_TC1 | DMA1_FLAG_TE1 | DMA1_FLAG_HT1 | DMA1_FLAG_GL1),
.init = {
.NVIC_IRQChannel = DMA1_Channel1_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_LOW,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
@ -339,7 +339,7 @@ const struct pios_adc_cfg pios_adc_cfg = {
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Word,
.DMA_Mode = DMA_Mode_Circular,
.DMA_Priority = DMA_Priority_High,
.DMA_Priority = DMA_Priority_Low,
.DMA_M2M = DMA_M2M_Disable,
},
}

2
flight/PiOS/Boards/STM32103CB_AHRS.h
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@ -217,9 +217,9 @@ TIM8 | | | |
#define PIOS_ADC_NUM_CHANNELS (PIOS_ADC_NUM_PINS + PIOS_ADC_USE_TEMP_SENSOR)
#define PIOS_ADC_NUM_ADC_CHANNELS 2
#define PIOS_ADC_USE_ADC2 1
#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE)
#define PIOS_ADC_ADCCLK RCC_PCLK2_Div2
#define PIOS_ADC_PCLK2 RCC_HCLK_Div16
#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE); RCC_PCLK2Config(PIOS_ADC_PCLK2);
/* RCC_PCLK2_Div2: ADC clock = PCLK2/2 */
/* RCC_PCLK2_Div4: ADC clock = PCLK2/4 */
/* RCC_PCLK2_Div6: ADC clock = PCLK2/6 */

5
flight/PiOS/Boards/STM32103CB_CC_Rev1.h
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@ -195,8 +195,7 @@ TIM4 | RC In 1 | Servo 3 | Servo 2 | Servo 1
#define PIOS_ADC_NUM_ADC_CHANNELS 2
#define PIOS_ADC_USE_ADC2 1
#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE)
#define PIOS_ADC_ADCCLK RCC_PCLK2_Div2
#define PIOS_ADC_PCLK2 RCC_HCLK_Div16
#define PIOS_ADC_ADCCLK RCC_PCLK2_Div8
/* RCC_PCLK2_Div2: ADC clock = PCLK2/2 */
/* RCC_PCLK2_Div4: ADC clock = PCLK2/4 */
/* RCC_PCLK2_Div6: ADC clock = PCLK2/6 */
@ -211,7 +210,7 @@ TIM4 | RC In 1 | Servo 3 | Servo 2 | Servo 1
// Currently analog acquistion hard coded at 480 Hz
// PCKL2 = HCLK / 16
// ADCCLK = PCLK2 / 2
#define PIOS_ADC_RATE (72.0e6 / 16 / 2 / 252 / (PIOS_ADC_NUM_PINS / 2))
#define PIOS_ADC_RATE (72.0e6 / 1 / 8 / 252 / (PIOS_ADC_NUM_ADC_CHANNELS >> PIOS_ADC_USE_ADC2))
#define EKF_RATE (PIOS_ADC_RATE / adc_oversampling / 2)
#define PIOS_ADC_MAX_OVERSAMPLING 1

4
flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h
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@ -222,7 +222,6 @@ TIM8 | | | |
//#define PIOS_ADC_ADCCLK RCC_PCLK2_Div4 // ADC clock = PCLK2/4
//#define PIOS_ADC_ADCCLK RCC_PCLK2_Div6 // ADC clock = PCLK2/6
#define PIOS_ADC_ADCCLK RCC_PCLK2_Div8 // ADC clock = PCLK2/8
#define PIOS_ADC_PCLK2 RCC_HCLK_Div16
//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_1Cycles5
//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_7Cycles5
//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_13Cycles5
@ -235,8 +234,9 @@ TIM8 | | | |
/* With an ADCCLK = 14 MHz and a sampling time of 293.5 cycles: */
/* Tconv = 239.5 + 12.5 = 252 cycles = 18<31>s */
/* (1 / (ADCCLK / CYCLES)) = Sample Time (<28>S) */
#define PIOS_ADC_IRQ_PRIO 3
#define PIOS_ADC_IRQ_PRIO 3
#define PIOS_ADC_MAX_OVERSAMPLING 1
#define PIOS_ADC_RATE (72.0e6 / 1 / 8 / 252 / (PIOS_ADC_NUM_ADC_CHANNELS >> PIOS_ADC_USE_ADC2))
// *****************************************************************
// GPIO output pins

4
flight/PiOS/Boards/STM3210E_OP.h
View File

@ -359,7 +359,6 @@ TIM8 | Servo 5 | Servo 6 | Servo 7 | Servo 8
#define PIOS_ADC_USE_ADC2 1
#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE)
#define PIOS_ADC_ADCCLK RCC_PCLK2_Div8
#define PIOS_ADC_PCLK2 RCC_HCLK_Div16
/* RCC_PCLK2_Div2: ADC clock = PCLK2/2 */
/* RCC_PCLK2_Div4: ADC clock = PCLK2/4 */
/* RCC_PCLK2_Div6: ADC clock = PCLK2/6 */
@ -370,7 +369,8 @@ TIM8 | Servo 5 | Servo 6 | Servo 7 | Servo 8
/* Tconv = 239.5 + 12.5 = 252 cycles = 18?s */
/* (1 / (ADCCLK / CYCLES)) = Sample Time (?S) */
#define PIOS_ADC_IRQ_PRIO PIOS_IRQ_PRIO_LOW
#define PIOS_ADC_MAX_OVERSAMPLING 1
#define PIOS_ADC_MAX_OVERSAMPLING 10
#define PIOS_ADC_RATE (72.0e6 / 1 / 8 / 252 / (PIOS_ADC_NUM_ADC_CHANNELS >> PIOS_ADC_USE_ADC2))
//-------------------------
// GPIO

21
flight/PiOS/STM32F10x/pios_adc.c
View File

@ -70,12 +70,14 @@ void PIOS_ADC_Init()
*/
void PIOS_ADC_Config(uint32_t oversampling)
{
oversampling = (oversampling > PIOS_ADC_MAX_OVERSAMPLING) ? PIOS_ADC_MAX_OVERSAMPLING : oversampling;
pios_adc_devs[0].adc_oversample = oversampling;
pios_adc_devs[0].adc_oversample = (oversampling > PIOS_ADC_MAX_OVERSAMPLING) ? PIOS_ADC_MAX_OVERSAMPLING : oversampling;
ADC_DeInit(ADC1);
ADC_DeInit(ADC2);
/* Disable interrupts */
DMA_ITConfig(pios_adc_devs[0].cfg->dma.rx.channel, pios_adc_devs[0].cfg->dma.irq.flags, DISABLE);
/* Enable ADC clocks */
PIOS_ADC_CLOCK_FUNCTION;
@ -92,7 +94,7 @@ void PIOS_ADC_Config(uint32_t oversampling)
PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL,
PIOS_ADC_SAMPLE_TIME);
#endif
// return
/* Configure ADCs */
ADC_InitTypeDef ADC_InitStructure;
ADC_StructInit(&ADC_InitStructure);
@ -101,8 +103,7 @@ void PIOS_ADC_Config(uint32_t oversampling)
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfChannel =
((PIOS_ADC_NUM_CHANNELS + 1) >> 1);
ADC_InitStructure.ADC_NbrOfChannel = ((PIOS_ADC_NUM_CHANNELS + 1) >> 1);
ADC_Init(ADC1, &ADC_InitStructure);
#if (PIOS_ADC_USE_ADC2)
@ -113,8 +114,7 @@ void PIOS_ADC_Config(uint32_t oversampling)
#endif
RCC_ADCCLKConfig(PIOS_ADC_ADCCLK);
RCC_PCLK2Config(PIOS_ADC_PCLK2);
/* Enable ADC1->DMA request */
ADC_DMACmd(ADC1, ENABLE);
@ -133,10 +133,7 @@ void PIOS_ADC_Config(uint32_t oversampling)
ADC_StartCalibration(ADC2);
while (ADC_GetCalibrationStatus(ADC2)) ;
#endif
/* Disable interrupts */
DMA_ITConfig(pios_adc_devs[0].cfg->dma.rx.channel, pios_adc_devs[0].cfg->dma.irq.flags, DISABLE);
/* Configure DMA channel */
DMA_InitTypeDef dma_init = pios_adc_devs[0].cfg->dma.rx.init;
dma_init.DMA_MemoryBaseAddr = (uint32_t) &pios_adc_devs[0].raw_data_buffer[0];