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F4 PiOS: Must use a different remap command on F4 for timer module to command

pin.  Include the remap source in the config structure now.
This commit is contained in:
James Cotton 2011-11-26 03:35:26 -06:00
parent 57b381235e
commit c57acf6459
3 changed files with 40 additions and 4 deletions

View File

@ -87,6 +87,15 @@ int32_t PIOS_TIM_InitClock(const struct pios_tim_clock_cfg * cfg)
case (uint32_t)TIM8:
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
break;
case (uint32_t)TIM9:
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM9, ENABLE);
break;
case (uint32_t)TIM10:
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM10, ENABLE);
break;
case (uint32_t)TIM11:
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM11, ENABLE);
break;
#endif
}
@ -142,10 +151,10 @@ int32_t PIOS_TIM_InitChannels(uint32_t * tim_id, const struct pios_tim_channel *
*/ // commented out for now as f4 starts all clocks
GPIO_Init(chan->pin.gpio, &chan->pin.init);
// F4 remaps pins differently
/* if (chan->remap) {
GPIO_PinRemapConfig(chan->remap, ENABLE);
} */
PIOS_DEBUG_Assert(chan->remaP);
// Second parameter should technically be PinSource but they are numerically the same
GPIO_PinAFConfig(chan->pin.gpio, chan->pin.pin_source,chan->remap);
}
*tim_id = (uint32_t)tim_dev;
@ -427,3 +436,25 @@ static void PIOS_TIM_8_CC_irq_handler (void)
PIOS_TIM_generic_irq_handler (TIM8);
}
void TIM1_BRK_TIM9_IRQHandler(void) __attribute__ ((alias ("PIOS_TIM_9_CC_irq_handler")));
static void PIOS_TIM_9_CC_irq_handler (void)
{
// TODO: Check for TIM1_BRK
PIOS_TIM_generic_irq_handler (TIM9);
}
void TIM1_UP_TIM10_IRQHandler(void) __attribute__ ((alias ("PIOS_TIM_10_CC_irq_handler")));
static void PIOS_TIM_10_CC_irq_handler (void)
{
// TODO: Check for TIM1_UP
PIOS_TIM_generic_irq_handler (TIM10);
}
void TIM1_TRG_COM_TIM11_IRQHandler(void) __attribute__ ((alias ("PIOS_TIM_11_CC_irq_handler")));
static void PIOS_TIM_11_CC_irq_handler (void)
{
// TODO: Check for TIM1_TRG
PIOS_TIM_generic_irq_handler (TIM11);
}

View File

@ -56,6 +56,7 @@ struct stm32_dma {
struct stm32_gpio {
GPIO_TypeDef *gpio;
GPIO_InitTypeDef init;
uint8_t pin_source;
};
struct stm32_exti {

View File

@ -3338,6 +3338,8 @@
65FA9B8414709E9F0019A260 /* pios_tim.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_tim.h; sourceTree = "<group>"; };
65FA9B8514709E9F0019A260 /* pios_usb_hid_priv.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_usb_hid_priv.h; sourceTree = "<group>"; };
65FAA03F133B669400F6F5CD /* GTOP_BIN.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = GTOP_BIN.c; sourceTree = "<group>"; };
65FAB8FC1480DA19000FF8B2 /* pios_dsm.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = pios_dsm.c; sourceTree = "<group>"; };
65FAB8FD1480DA19000FF8B2 /* pios_pwm.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = pios_pwm.c; sourceTree = "<group>"; };
65FBE14412E7C98100176B5A /* pios_servo_priv.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_servo_priv.h; sourceTree = "<group>"; };
65FC66AA123F30F100B04F74 /* ahrs_timer.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = ahrs_timer.c; path = ../../AHRS/ahrs_timer.c; sourceTree = SOURCE_ROOT; };
65FC66AB123F312A00B04F74 /* ahrs_timer.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ahrs_timer.h; sourceTree = "<group>"; };
@ -3860,6 +3862,8 @@
65904E5D14613B6100FD9482 /* STM32F4xx */ = {
isa = PBXGroup;
children = (
65FAB8FC1480DA19000FF8B2 /* pios_dsm.c */,
65FAB8FD1480DA19000FF8B2 /* pios_pwm.c */,
65904E5E14613B6100FD9482 /* inc */,
65904E6214613B6100FD9482 /* Libraries */,
65904EC114613B6100FD9482 /* library.mk */,