peabody124 00a3e82c70 CC-6 PIOS/SPI: Add semaphore to SPI device structure that can be used to ensure ... only one CS line is asserted. No checks are enforced on this by the SPI code as I cant see a clean way of it being aware of the CS lines. We could add another CS mode those which is driver managed per transfer and has a GPIO i line for each device. git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2579 ebee16cc-31ac-478f-84a7-5cbb03baadba		2011-01-24 07:52:17 +00:00
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Boards	CC-6 Initial code for the flash chip on CC	2011-01-24 07:52:14 +00:00
Common	CC-6 PIOS/SPI: Add semaphore to SPI device structure that can be used to ensure	2011-01-24 07:52:17 +00:00
inc	CC-6 PIOS/SPI: Add semaphore to SPI device structure that can be used to ensure	2011-01-24 07:52:17 +00:00
STM32F10x	CC-6 PIOS/SPI: Add semaphore to SPI device structure that can be used to ensure	2011-01-24 07:52:17 +00:00
pios.h	CC-6 PIOS/ADXL345: Helper functions for the ADXL345 chip. Need to add	2011-01-17 08:45:37 +00:00