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290 lines
8.9 KiB
C
290 lines
8.9 KiB
C
/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_OVERO OVERO Functions
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* @brief PIOS interface to read and write to overo
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* @{
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*
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* @file pios_overo.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
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* @brief Hardware Abstraction Layer for Overo communications
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* @see The GNU Public License (GPL) Version 3
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* @notes
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <pios.h>
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/**
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* Configures the SPI device to use a double buffered DMA for transferring
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* data. At the end of each transfer (NSS goes high) it makes sure to reset
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* the DMA counter to the beginning of each packet and swap to the next
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* buffer
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*/
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#if defined(PIOS_INCLUDE_SPI)
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#include <pios_overo.h>
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#define PACKET_SIZE 1024
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static void PIOS_OVERO_NSS_IRQHandler();
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static const struct pios_exti_cfg pios_exti_overo_cfg __exti_config = {
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.vector = PIOS_OVERO_NSS_IRQHandler,
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.line = EXTI_Line15,
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.pin = {
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.gpio = GPIOA,
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.init = {
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.GPIO_Pin = GPIO_Pin_15,
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.GPIO_Speed = GPIO_Speed_100MHz,
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.GPIO_Mode = GPIO_Mode_IN,
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.GPIO_OType = GPIO_OType_OD,
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.GPIO_PuPd = GPIO_PuPd_NOPULL,
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},
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},
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.irq = {
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.init = {
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.NVIC_IRQChannel = EXTI15_10_IRQn,
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.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID,
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.NVIC_IRQChannelSubPriority = 0,
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.NVIC_IRQChannelCmd = ENABLE,
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},
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},
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.exti = {
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.init = {
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.EXTI_Line = EXTI_Line15, // matches above GPIO pin
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.EXTI_Mode = EXTI_Mode_Interrupt,
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.EXTI_Trigger = EXTI_Trigger_Rising,
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.EXTI_LineCmd = ENABLE,
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},
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},
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};
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static bool PIOS_OVERO_validate(struct pios_overo_dev * com_dev)
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{
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/* Should check device magic here */
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return(true);
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}
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#if defined(PIOS_INCLUDE_FREERTOS)
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static struct pios_overo_dev * PIOS_OVERO_alloc(void)
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{
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return (malloc(sizeof(struct pios_overo_dev)));
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}
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#else
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#error Unsupported
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#endif
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//! Global variable
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struct pios_overo_dev * overo_dev;
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/**
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* Initialises Overo pins
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* \param[in] mode currently only mode 0 supported
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* \return < 0 if initialisation failed
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*/
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int32_t PIOS_Overo_Init(const struct pios_overo_cfg * cfg)
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{
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PIOS_Assert(cfg);
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overo_dev = (struct pios_overo_dev *) PIOS_OVERO_alloc();
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if (!overo_dev) goto out_fail;
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/* Bind the configuration to the device instance */
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overo_dev->cfg = cfg;
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/* Disable callback function */
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overo_dev->callback = NULL;
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/* Set a null buffer initially */
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overo_dev->new_tx_buffer = 0;
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overo_dev->new_rx_buffer = 0;
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/* only legal for single-slave config */
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PIOS_Assert(overo_dev->cfg->slave_count == 1);
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SPI_SSOutputCmd(overo_dev->cfg->regs, (overo_dev->cfg->init.SPI_Mode == SPI_Mode_Master) ? ENABLE : DISABLE);
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/* Initialize the GPIO pins */
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/* note __builtin_ctz() due to the difference between GPIO_PinX and GPIO_PinSourceX */
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GPIO_PinAFConfig(overo_dev->cfg->sclk.gpio,
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__builtin_ctz(overo_dev->cfg->sclk.init.GPIO_Pin),
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overo_dev->cfg->remap);
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GPIO_PinAFConfig(overo_dev->cfg->mosi.gpio,
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__builtin_ctz(overo_dev->cfg->mosi.init.GPIO_Pin),
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overo_dev->cfg->remap);
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GPIO_PinAFConfig(overo_dev->cfg->miso.gpio,
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__builtin_ctz(overo_dev->cfg->miso.init.GPIO_Pin),
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overo_dev->cfg->remap);
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GPIO_PinAFConfig(overo_dev->cfg->ssel[0].gpio,
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__builtin_ctz(overo_dev->cfg->ssel[0].init.GPIO_Pin),
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overo_dev->cfg->remap);
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GPIO_Init(overo_dev->cfg->sclk.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->sclk.init));
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GPIO_Init(overo_dev->cfg->mosi.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->mosi.init));
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GPIO_Init(overo_dev->cfg->miso.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->miso.init));
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/* Configure DMA for SPI Rx */
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DMA_DeInit(overo_dev->cfg->dma.rx.channel);
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DMA_Cmd(overo_dev->cfg->dma.rx.channel, DISABLE);
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DMA_Init(overo_dev->cfg->dma.rx.channel, (DMA_InitTypeDef*)&(overo_dev->cfg->dma.rx.init));
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/* Configure DMA for SPI Tx */
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DMA_DeInit(overo_dev->cfg->dma.tx.channel);
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DMA_Cmd(overo_dev->cfg->dma.tx.channel, DISABLE);
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DMA_Init(overo_dev->cfg->dma.tx.channel, (DMA_InitTypeDef*)&(overo_dev->cfg->dma.tx.init));
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/* Initialize the SPI block */
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SPI_DeInit(overo_dev->cfg->regs);
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SPI_Init(overo_dev->cfg->regs, (SPI_InitTypeDef*)&(overo_dev->cfg->init));
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/* Configure CRC calculation */
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if (overo_dev->cfg->use_crc) {
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SPI_CalculateCRC(overo_dev->cfg->regs, ENABLE);
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} else {
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SPI_CalculateCRC(overo_dev->cfg->regs, DISABLE);
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}
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/* Enable SPI */
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SPI_Cmd(overo_dev->cfg->regs, ENABLE);
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/* Enable SPI interrupts to DMA */
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SPI_I2S_DMACmd(overo_dev->cfg->regs, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE);
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/* Configure DMA interrupt */
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NVIC_Init((NVIC_InitTypeDef*)&(overo_dev->cfg->dma.irq.init));
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/* Configure the interrupt for rising edge of NSS */
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PIOS_EXTI_Init(&pios_exti_overo_cfg);
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return(0);
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out_fail:
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return(-1);
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}
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/**
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* Transfers a block of bytes via DMA.
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* \param[in] overo_id SPI device handle
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* \param[in] send_buffer pointer to buffer which should be sent.<BR>
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* If NULL, 0xff (all-one) will be sent.
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* \param[in] receive_buffer pointer to buffer which should get the received values.<BR>
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* If NULL, received bytes will be discarded.
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* \param[in] len number of bytes which should be transfered
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* \param[in] callback pointer to callback function which will be executed
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* from DMA channel interrupt once the transfer is finished.
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* If NULL, no callback function will be used, and PIOS_SPI_TransferBlock() will
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* block until the transfer is finished.
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* \return >= 0 if no error during transfer
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* \return -1 if disabled SPI port selected
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* \return -3 if function has been called during an ongoing DMA transfer
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*/
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int32_t PIOS_Overo_SetNewBuffer(const uint8_t *send_buffer, uint8_t *receive_buffer, uint16_t len)
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{
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bool valid = PIOS_OVERO_validate(overo_dev);
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PIOS_Assert(valid)
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bool overrun = overo_dev->new_tx_buffer || overo_dev->new_rx_buffer;
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/* Cache next buffer */
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overo_dev->new_tx_buffer = (uint32_t) send_buffer;
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overo_dev->new_rx_buffer = (uint32_t) receive_buffer;
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/* No error */
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return overrun ? -1 : 0;
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}
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/**
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* Set the callback function
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*/
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int32_t PIOS_Overo_SetCallback(void *callback)
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{
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overo_dev->callback = callback;
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return 0;
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}
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/**
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* On the rising edge of NSS schedule a new transaction. This cannot be
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* done by the DMA complete because there is 150 us between that and the
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* Overo deasserting the CS line. We don't want to spin that long in an
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* isr.
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*
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* 1. Disable the DMA channel
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* 2. Check that the DMA counter is at the end of the buffer (increase an
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* error counter if not)
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* 3. Reset the DMA counter to the end of the beginning of the buffer
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* 4. Swap the buffer
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* 5. Enable the DMA channel
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*/
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void PIOS_OVERO_NSS_IRQHandler()
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{
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static uint32_t error_counter = 0;
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bool valid = PIOS_OVERO_validate(overo_dev);
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PIOS_Assert(valid)
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/* Disable the SPI peripheral */
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SPI_Cmd(overo_dev->cfg->regs, DISABLE);
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/* Disable the DMA commands */
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DMA_Cmd(overo_dev->cfg->dma.tx.channel, DISABLE);
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DMA_Cmd(overo_dev->cfg->dma.rx.channel, DISABLE);
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/* Check that the previous DMA transfer completed */
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if(DMA_GetCurrDataCounter(overo_dev->cfg->dma.tx.channel) ||
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DMA_GetCurrDataCounter(overo_dev->cfg->dma.rx.channel))
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error_counter++;
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// Activate the new buffer
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DMA_MemoryTargetConfig(overo_dev->cfg->dma.tx.channel, overo_dev->new_tx_buffer, DMA_Memory_0);
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DMA_MemoryTargetConfig(overo_dev->cfg->dma.rx.channel, overo_dev->new_rx_buffer, DMA_Memory_0);
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// Enable DMA, Slave first
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DMA_SetCurrDataCounter(overo_dev->cfg->dma.tx.channel, PACKET_SIZE);
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DMA_SetCurrDataCounter(overo_dev->cfg->dma.rx.channel, PACKET_SIZE);
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/* Reenable the SPI peripheral */
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SPI_Cmd(overo_dev->cfg->regs, ENABLE);
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/* Enable SPI interrupts to DMA */
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SPI_I2S_DMACmd(overo_dev->cfg->regs, SPI_I2S_DMAReq_Tx, ENABLE);
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SPI_I2S_DMACmd(overo_dev->cfg->regs, SPI_I2S_DMAReq_Rx, ENABLE);
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/* Enable the DMA endpoints for valid buffers */
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if(overo_dev->new_rx_buffer)
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DMA_Cmd(overo_dev->cfg->dma.rx.channel, ENABLE);
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if(overo_dev->new_tx_buffer)
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DMA_Cmd(overo_dev->cfg->dma.tx.channel, ENABLE);
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/* Indicate these buffers have been used */
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overo_dev->new_tx_buffer = 0;
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overo_dev->new_rx_buffer = 0;
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if (overo_dev->callback != NULL)
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overo_dev->callback(true, true);
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}
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#endif
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/**
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* @}
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* @}
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*/
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