mirror of
https://github.com/doitsujin/dxvk.git
synced 2024-12-01 16:24:12 +01:00
Merge branch 'dxbc-correct-derivs'
This commit is contained in:
commit
de9ffdcfa3
@ -34,7 +34,17 @@ namespace dxvk {
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m_analysis->uavInfos[registerId].accessAtomicOp = true;
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}
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} break;
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case DxbcInstClass::TextureSample:
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case DxbcInstClass::VectorDeriv: {
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m_analysis->usesDerivatives = true;
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} break;
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case DxbcInstClass::ControlFlow: {
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if (ins.op == DxbcOpcode::Discard)
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m_analysis->usesKill = true;
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} break;
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case DxbcInstClass::TypedUavLoad: {
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const uint32_t registerId = ins.src[1].idx[0].offset;
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m_analysis->uavInfos[registerId].accessTypedLoad = true;
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@ -37,6 +37,9 @@ namespace dxvk {
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DxbcClipCullInfo clipCullIn;
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DxbcClipCullInfo clipCullOut;
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bool usesDerivatives = false;
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bool usesKill = false;
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};
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/**
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@ -2003,9 +2003,27 @@ namespace dxvk {
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// (dst0) Register that receives the result
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// (dst1) Destination u# or g# register
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// (srcX) As above
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const DxbcBufferInfo bufferInfo = getBufferInfo(ins.dst[ins.dstCount - 1]);
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const bool isImm = ins.dstCount == 2;
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const bool isUav = ins.dst[ins.dstCount - 1].type == DxbcOperandType::UnorderedAccessView;
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// Perform atomic operations on UAVs only if the UAV
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// is bound and if there is nothing else stopping us.
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DxbcConditional cond;
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if (isUav) {
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uint32_t writeTest = emitUavWriteTest(bufferInfo);
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cond.labelIf = m_module.allocateId();
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cond.labelEnd = m_module.allocateId();
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m_module.opSelectionMerge(cond.labelEnd, spv::SelectionControlMaskNone);
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m_module.opBranchConditional(writeTest, cond.labelIf, cond.labelEnd);
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m_module.opLabel(cond.labelIf);
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}
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// Retrieve destination pointer for the atomic operation>
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const DxbcRegisterPointer pointer = emitGetAtomicPointer(
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ins.dst[ins.dstCount - 1], ins.src[0]);
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@ -2126,6 +2144,12 @@ namespace dxvk {
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// register if this is an imm_atomic_* opcode.
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if (isImm)
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emitRegisterStore(ins.dst[0], value);
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// End conditional block
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if (isUav) {
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m_module.opBranch(cond.labelEnd);
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m_module.opLabel (cond.labelEnd);
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}
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}
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@ -2133,12 +2157,25 @@ namespace dxvk {
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// imm_atomic_alloc and imm_atomic_consume have the following operands:
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// (dst0) The register that will hold the old counter value
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// (dst1) The UAV whose counter is going to be modified
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// TODO check if the corresponding UAV is bound
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const DxbcBufferInfo bufferInfo = getBufferInfo(ins.dst[1]);
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const uint32_t registerId = ins.dst[1].idx[0].offset;
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if (m_uavs.at(registerId).ctrId == 0)
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m_uavs.at(registerId).ctrId = emitDclUavCounter(registerId);
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// Only perform the operation if the UAV is bound
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uint32_t writeTest = emitUavWriteTest(bufferInfo);
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DxbcConditional cond;
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cond.labelIf = m_module.allocateId();
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cond.labelEnd = m_module.allocateId();
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m_module.opSelectionMerge(cond.labelEnd, spv::SelectionControlMaskNone);
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m_module.opBranchConditional(writeTest, cond.labelIf, cond.labelEnd);
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m_module.opLabel(cond.labelIf);
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// Get a pointer to the atomic counter in question
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DxbcRegisterInfo ptrType;
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ptrType.type.ctype = DxbcScalarType::Uint32;
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@ -2187,6 +2224,10 @@ namespace dxvk {
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// Store the result
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emitRegisterStore(ins.dst[0], value);
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// End conditional block
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m_module.opBranch(cond.labelEnd);
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m_module.opLabel (cond.labelEnd);
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}
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@ -3254,23 +3295,37 @@ namespace dxvk {
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// (dst0) The destination UAV
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// (src0) The texture or buffer coordinates
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// (src1) The value to store
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const uint32_t registerId = ins.dst[0].idx[0].offset;
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const DxbcUav uavInfo = m_uavs.at(registerId);
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const DxbcBufferInfo uavInfo = getBufferInfo(ins.dst[0]);
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// Execute write op only if the UAV is bound
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uint32_t writeTest = emitUavWriteTest(uavInfo);
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DxbcConditional cond;
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cond.labelIf = m_module.allocateId();
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cond.labelEnd = m_module.allocateId();
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m_module.opSelectionMerge (cond.labelEnd, spv::SelectionControlMaskNone);
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m_module.opBranchConditional(writeTest, cond.labelIf, cond.labelEnd);
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m_module.opLabel(cond.labelIf);
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// Load texture coordinates
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DxbcRegisterValue texCoord = emitLoadTexCoord(
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ins.src[0], uavInfo.imageInfo);
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DxbcRegisterValue texCoord = emitLoadTexCoord(ins.src[0], uavInfo.image);
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// Load the value that will be written to the image. We'll
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// have to cast it to the component type of the image.
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const DxbcRegisterValue texValue = emitRegisterBitcast(
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emitRegisterLoad(ins.src[1], DxbcRegMask(true, true, true, true)),
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uavInfo.sampledType);
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uavInfo.stype);
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// Write the given value to the image
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m_module.opImageWrite(
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m_module.opLoad(uavInfo.imageTypeId, uavInfo.varId),
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m_module.opLoad(uavInfo.typeId, uavInfo.varId),
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texCoord.id, texValue.id, SpirvImageOperands());
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// End conditional block
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m_module.opBranch(cond.labelEnd);
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m_module.opLabel (cond.labelEnd);
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}
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@ -3610,21 +3665,26 @@ namespace dxvk {
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const DxbcRegisterValue zeroTest = emitRegisterZeroTest(
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condition, ins.controls.zeroTest());
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// Insert a Pseudo-'If' block
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const uint32_t discardBlock = m_module.allocateId();
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const uint32_t mergeBlock = m_module.allocateId();
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m_module.opSelectionMerge(mergeBlock,
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spv::SelectionControlMaskNone);
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m_module.opBranchConditional(
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zeroTest.id, discardBlock, mergeBlock);
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// OpKill terminates the block
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m_module.opLabel(discardBlock);
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m_module.opKill();
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m_module.opLabel(mergeBlock);
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if (m_ps.killState == 0) {
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DxbcConditional cond;
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cond.labelIf = m_module.allocateId();
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cond.labelEnd = m_module.allocateId();
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m_module.opSelectionMerge(cond.labelIf, spv::SelectionControlMaskNone);
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m_module.opBranchConditional(zeroTest.id, cond.labelIf, cond.labelEnd);
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// OpKill terminates the block
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m_module.opLabel(cond.labelIf);
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m_module.opKill();
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m_module.opLabel(cond.labelEnd);
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} else {
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uint32_t typeId = m_module.defBoolType();
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uint32_t killState = m_module.opLoad (typeId, m_ps.killState);
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killState = m_module.opLogicalOr(typeId, killState, zeroTest.id);
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m_module.opStore(m_ps.killState, killState);
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}
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}
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@ -4467,11 +4527,27 @@ namespace dxvk {
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// Cast source value to the expected data type
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value = emitRegisterBitcast(value, DxbcScalarType::Uint32);
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// Shared memory is not accessed through a texel buffer view
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const bool isTgsm = operand.type == DxbcOperandType::ThreadGroupSharedMemory;
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// Thread Group Shared Memory is not accessed through a texel buffer view
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const bool isUav = operand.type == DxbcOperandType::UnorderedAccessView;
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const uint32_t bufferId = isTgsm
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? 0 : m_module.opLoad(bufferInfo.typeId, bufferInfo.varId);
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// Perform UAV writes only if the UAV is bound and if there
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// is nothing else preventing us from writing to it.
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DxbcConditional cond;
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if (isUav) {
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uint32_t writeTest = emitUavWriteTest(bufferInfo);
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cond.labelIf = m_module.allocateId();
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cond.labelEnd = m_module.allocateId();
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m_module.opSelectionMerge(cond.labelEnd, spv::SelectionControlMaskNone);
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m_module.opBranchConditional(writeTest, cond.labelIf, cond.labelEnd);
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m_module.opLabel(cond.labelIf);
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}
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// Perform the actual write operation
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const uint32_t bufferId = isUav ? m_module.opLoad(bufferInfo.typeId, bufferInfo.varId) : 0;
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const uint32_t scalarTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 1 });
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const uint32_t vectorTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 4 });
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@ -4520,6 +4596,12 @@ namespace dxvk {
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srcComponentIndex += 1;
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}
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}
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// End conditional block
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if (isUav) {
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m_module.opBranch(cond.labelEnd);
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m_module.opLabel (cond.labelEnd);
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}
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}
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@ -5473,6 +5555,21 @@ namespace dxvk {
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}
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uint32_t DxbcCompiler::emitUavWriteTest(const DxbcBufferInfo& uav) {
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uint32_t typeId = m_module.defBoolType();
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uint32_t testId = uav.specId;
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if (m_ps.killState != 0) {
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uint32_t killState = m_module.opLoad(typeId, m_ps.killState);
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testId = m_module.opLogicalAnd(typeId, testId,
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m_module.opLogicalNot(typeId, killState));
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}
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return testId;
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}
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void DxbcCompiler::emitInit() {
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// Set up common capabilities for all shaders
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m_module.enableCapability(spv::CapabilityShader);
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@ -5677,6 +5774,16 @@ namespace dxvk {
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spv::BuiltInCullDistance,
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spv::StorageClassInput);
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// We may have to defer kill operations to the end of
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// the shader in order to keep derivatives correct.
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if (m_analysis->usesKill && m_analysis->usesDerivatives && m_options.test(DxbcOption::DeferKill)) {
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m_ps.killState = m_module.newVarInit(
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m_module.defPointerType(m_module.defBoolType(), spv::StorageClassPrivate),
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spv::StorageClassPrivate, m_module.constBool(false));
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m_module.setDebugName(m_ps.killState, "ps_kill");
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}
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// Main function of the pixel shader
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m_ps.functionId = m_module.allocateId();
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m_module.setDebugName(m_ps.functionId, "ps_main");
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@ -5774,9 +5881,27 @@ namespace dxvk {
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this->emitInputSetup();
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this->emitClipCullLoad(DxbcSystemValue::ClipDistance, m_clipDistances);
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this->emitClipCullLoad(DxbcSystemValue::CullDistance, m_cullDistances);
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m_module.opFunctionCall(
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m_module.defVoidType(),
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m_ps.functionId, 0, nullptr);
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if (m_ps.killState != 0) {
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DxbcConditional cond;
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cond.labelIf = m_module.allocateId();
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cond.labelEnd = m_module.allocateId();
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uint32_t killTest = m_module.opLoad(m_module.defBoolType(), m_ps.killState);
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m_module.opSelectionMerge(cond.labelEnd, spv::SelectionControlMaskNone);
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m_module.opBranchConditional(killTest, cond.labelIf, cond.labelEnd);
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m_module.opLabel(cond.labelIf);
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m_module.opKill();
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m_module.opLabel(cond.labelEnd);
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}
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this->emitOutputSetup();
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this->emitMainFunctionEnd();
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}
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@ -110,6 +110,20 @@ namespace dxvk {
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};
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/**
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* \brief Helper struct for conditional execution
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*
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* Stores a set of labels required to implement either
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* an if-then block or an if-then-else block. This is
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* not used to implement control flow instructions.
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*/
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struct DxbcConditional {
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uint32_t labelIf = 0;
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uint32_t labelElse = 0;
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uint32_t labelEnd = 0;
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};
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/**
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* \brief Vertex shader-specific structure
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*/
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@ -151,6 +165,8 @@ namespace dxvk {
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uint32_t builtinSampleMaskIn = 0;
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uint32_t builtinSampleMaskOut = 0;
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uint32_t builtinLayer = 0;
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uint32_t killState = 0;
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};
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@ -940,6 +956,11 @@ namespace dxvk {
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DxbcSystemValue sv,
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uint32_t srcArray);
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///////////////////////////////
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// Some state checking methods
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uint32_t emitUavWriteTest(
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const DxbcBufferInfo& uav);
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//////////////////////////////////////
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// Common function definition methods
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void emitInit();
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@ -54,13 +54,14 @@ namespace dxvk {
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m_isgnChunk, m_osgnChunk,
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analysisInfo);
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this->runAnalyzer(analyzer, m_shexChunk->slice());
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DxbcCompiler compiler(
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fileName, options,
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m_shexChunk->version(),
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m_isgnChunk, m_osgnChunk,
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analysisInfo);
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this->runAnalyzer(analyzer, m_shexChunk->slice());
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this->runCompiler(compiler, m_shexChunk->slice());
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return compiler.finalize();
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@ -35,6 +35,7 @@ namespace dxvk {
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if (devFeatures.shaderStorageImageReadWithoutFormat)
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flags.set(DxbcOption::UseStorageImageReadWithoutFormat);
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flags.set(DxbcOption::DeferKill);
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return flags;
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}
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@ -17,6 +17,11 @@ namespace dxvk {
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/// Use FMin/FMax/FClamp instead of NMin/NMax/NClamp.
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/// Workaround for bugs in older Nvidia drivers.
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UseSimpleMinMaxClamp,
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/// Defer kill operation to the end of the shader.
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/// Fixes derivatives that are undefined due to
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/// non-uniform control flow in fragment shaders.
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DeferKill,
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};
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using DxbcOptions = Flags<DxbcOption>;
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