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Merge remote-tracking branch 'origin/stac_add-bootloader-info-blob'

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This commit is contained in:
James Cotton 2011-05-19 16:08:58 -05:00
commit 460cc1adc9
21 changed files with 110 additions and 24 deletions
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1
flight/Bootloaders/AHRS/Makefile
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@ -100,6 +100,7 @@ SRC += $(PIOSSTM32F10X)/pios_spi.c
## PIOS Hardware (Common)
#SRC += $(PIOSCOMMON)/pios_com.c
#SRC += $(PIOSCOMMON)/pios_hmc5843.c
SRC += $(PIOSCOMMON)/pios_board_info.c
SRC += $(PIOSCOMMON)/pios_opahrs_proto.c
SRC += $(PIOSCOMMON)/printf-stdarg.c
SRC += $(PIOSCOMMON)/pios_bl_helper.c

1
flight/Bootloaders/CopterControl/Makefile
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@ -123,6 +123,7 @@ SRC += $(PIOSSTM32F10X)/pios_usb_hid_prop.c
SRC += $(PIOSSTM32F10X)/pios_usb_hid_pwr.c
## PIOS Hardware (Common)
SRC += $(PIOSCOMMON)/pios_board_info.c
SRC += $(PIOSCOMMON)/pios_com.c
SRC += $(PIOSCOMMON)/pios_bl_helper.c
SRC += $(PIOSCOMMON)/pios_iap.c

1
flight/Bootloaders/OpenPilot/Makefile
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@ -124,6 +124,7 @@ SRC += $(PIOSSTM32F10X)/pios_usb_hid_prop.c
SRC += $(PIOSSTM32F10X)/pios_usb_hid_pwr.c
## PIOS Hardware (Common)
SRC += $(PIOSCOMMON)/pios_board_info.c
SRC += $(PIOSCOMMON)/pios_com.c
SRC += $(PIOSCOMMON)/pios_opahrs_v0.c
SRC += $(PIOSCOMMON)/pios_bl_helper.c

1
flight/Bootloaders/PipXtreme/Makefile
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@ -122,6 +122,7 @@ SRC += $(PIOSSTM32F10X)/pios_usb_hid_prop.c
SRC += $(PIOSSTM32F10X)/pios_usb_hid_pwr.c
## PIOS Hardware (Common)
SRC += $(PIOSCOMMON)/pios_board_info.c
SRC += $(PIOSCOMMON)/pios_com.c
SRC += $(PIOSCOMMON)/pios_bl_helper.c
SRC += $(PIOSCOMMON)/pios_iap.c

3
flight/CopterControl/Makefile
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@ -420,9 +420,10 @@ CSTANDARD = -std=gnu99
# Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
ifeq ($(DEBUG),YES)
CFLAGS = -g$(DEBUGF) -DDEBUG
CFLAGS = -DDEBUG
endif
CFLAGS += -g$(DEBUGF)
CFLAGS += -O$(OPT)
CFLAGS += -mcpu=$(MCU)
CFLAGS += $(CDEFS)

2
flight/PiOS/Boards/STM32103CB_CC_Rev1.h
View File

@ -66,8 +66,6 @@ TIM4 | RC In 1 | Servo 3 | Servo 2 | Servo 1
#define BOOTLOADER_VERSION 0
#define BOARD_TYPE 0x04
#define BOARD_REVISION 0x01
//#define HW_VERSION (BOARD_TYPE << 8) | BOARD_REVISION
#define MEM_SIZE 0x20000 //128K
#define SIZE_OF_DESCRIPTION 100
#define START_OF_USER_CODE (uint32_t)0x08003000

2
flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h
View File

@ -61,7 +61,7 @@ TIM4 | STOPWATCH |
#define BOOTLOADER_VERSION 0
#define BOARD_TYPE 0x03
#define BOARD_REVISION 0x01
#define MEM_SIZE ((uint32_t)(*((volatile uint16_t *)(0x1FFFF7E0))) * 1024 - 1024) //128K
#define MEM_SIZE (0x20000 - 0x00400) // 128K - 1K (reserved for config data)
#define SIZE_OF_DESCRIPTION 100
#define START_OF_USER_CODE (uint32_t)0x08003000
#define SIZE_OF_CODE (uint32_t)(MEM_SIZE-(START_OF_USER_CODE-0x08000000)-SIZE_OF_DESCRIPTION)

16
flight/PiOS/Common/pios_board_info.c Normal file
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@ -0,0 +1,16 @@
#include <pios.h>
#include <pios_board.h>
#include "pios_board_info.h"
const struct pios_board_info __attribute__((__used__)) __attribute__((__section__(".boardinfo"))) pios_board_info_blob = {
.magic = PIOS_BOARD_INFO_BLOB_MAGIC,
.board_type = BOARD_TYPE,
.board_rev = BOARD_REVISION,
.bl_rev = BOOTLOADER_VERSION,
.hw_type = HW_TYPE,
.fw_base = START_OF_USER_CODE,
.fw_size = SIZE_OF_CODE,
.desc_base = START_OF_USER_CODE + SIZE_OF_CODE,
.desc_size = SIZE_OF_DESCRIPTION,
};

7
flight/PiOS/STM32F10x/link_STM32103CB_AHRS_BL_sections.ld
View File

@ -45,4 +45,11 @@ SECTIONS
. = ALIGN(4);
_end = . ;
.boardinfo :
{
. = ALIGN(4);
KEEP(*(.boardinfo))
. = ALIGN(4);
} > BD_INFO
}

7
flight/PiOS/STM32F10x/link_STM32103CB_AHRS_memory.ld
View File

@ -1,6 +1,7 @@
MEMORY
{
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 8K
FLASH (rx) : ORIGIN = 0x08000000 + 8K, LENGTH = 128K - 8K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x02000 - 0x00080
BD_INFO (r) : ORIGIN = 0x08002000 - 0x80, LENGTH = 0x00080
FLASH (rx) : ORIGIN = 0x08002000, LENGTH = 0x20000 - 0x02000
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x05000
}

6
flight/PiOS/STM32F10x/link_STM32103CB_AHRS_sections.ld
View File

@ -3,6 +3,12 @@ _estack = 0x20004FF0;
/* Section Definitions */
SECTIONS
{
.boardinfo :
{
. = ALIGN(4);
PROVIDE(pios_board_info_blob = .);
} > BD_INFO
.text :
{
KEEP(*(.isr_vector .isr_vector.*))

6
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_BL_sections.ld
View File

@ -61,6 +61,12 @@ SECTIONS
. = ALIGN(4);
_end = . ;
.boardinfo :
{
. = ALIGN(4);
KEEP(*(.boardinfo))
} > BD_INFO
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }

7
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_memory.ld
View File

@ -1,6 +1,7 @@
MEMORY
{
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 12K
FLASH (rx) : ORIGIN = 0x08000000 + 12K, LENGTH = 128K - 12K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x03000 - 0x00080
BD_INFO (r) : ORIGIN = 0x08003000 - 0x80, LENGTH = 0x00080
FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 0x20000 - 0x03000
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x05000
}

6
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld
View File

@ -8,6 +8,12 @@ _estack = 0x20004FF0;
/* Section Definitions */
SECTIONS
{
.boardinfo :
{
. = ALIGN(4);
PROVIDE(pios_board_info_blob = .);
} > BD_INFO
.text :
{
KEEP(*(.isr_vector .isr_vector.*))

7
flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_BL_sections.ld
View File

@ -50,4 +50,11 @@ SECTIONS
. = ALIGN(4);
_end = . ;
.boardinfo :
{
. = ALIGN(4);
KEEP(*(.boardinfo))
. = ALIGN(4);
} > BD_INFO
}

7
flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld
View File

@ -1,6 +1,7 @@
MEMORY
{
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 12K
FLASH (rx) : ORIGIN = 0x08000000 + 12K, LENGTH = 128K - 12K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x03000 - 0x00080
BD_INFO (r) : ORIGIN = 0x08003000 - 0x80, LENGTH = 0x00080
FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 0x20000 - 0x03000
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x05000
}

6
flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld
View File

@ -8,6 +8,12 @@ _estack = 0x20004FF0;
/* Section Definitions */
SECTIONS
{
.boardinfo :
{
. = ALIGN(4);
PROVIDE(pios_board_info_blob = .);
} > BD_INFO
.text :
{
KEEP(*(.isr_vector .isr_vector.*))

8
flight/PiOS/STM32F10x/link_STM3210E_OP_BL_sections.ld
View File

@ -163,7 +163,6 @@ PROVIDE ( SCB = (SCS_BASE + 0x0D00) ) ;
SECTIONS
{
/* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
.isr_vector :
{
@ -313,6 +312,13 @@ SECTIONS
__exidx_start = .;
__exidx_end = .;
.boardinfo :
{
. = ALIGN(4);
KEEP(*(.boardinfo))
. = ALIGN(4);
} > BD_INFO
/* after that it's only debugging information. */
/* remove the debugging information from the standard libraries */

17
flight/PiOS/STM32F10x/link_STM3210E_OP_memory.ld
View File

@ -1,11 +1,12 @@
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 20K
FLASH (rx) : ORIGIN = 0x08000000 + 20K, LENGTH = 512K - 20K
FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x10000
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x05000 - 0x00080
BD_INFO (r) : ORIGIN = 0x08005000 - 0x80, LENGTH = 0x00080
FLASH (rx) : ORIGIN = 0x08005000, LENGTH = 0x80000 - 0x05000
FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
}

8
flight/PiOS/STM32F10x/link_STM3210E_OP_sections.ld
View File

@ -163,7 +163,12 @@ PROVIDE ( SCB = (SCS_BASE + 0x0D00) ) ;
SECTIONS
{
.boardinfo :
{
. = ALIGN(4);
PROVIDE(pios_board_info_blob = .);
} > BD_INFO
/* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
.isr_vector :
{
@ -208,7 +213,6 @@ SECTIONS
_sidata = _etext;
} >FLASH
/*
* This stack is used both as the initial sp during early init as well as ultimately
* being used as the STM32's MSP (Main Stack Pointer) which is the same stack that

15
flight/PiOS/inc/pios_board_info.h Normal file
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@ -0,0 +1,15 @@
#define PIOS_BOARD_INFO_BLOB_MAGIC 0xBDBDBDBD
struct pios_board_info {
uint32_t magic;
uint8_t board_type;
uint8_t board_rev;
uint8_t bl_rev;
uint8_t hw_type;
uint32_t fw_base;
uint32_t fw_size;
uint32_t desc_base;
uint32_t desc_size;
} __attribute__((packed));
extern const struct pios_board_info pios_board_info_blob;