This allows the spektrum and sbus receiver drivers to bind
directly to the usart layer using a properly exported API
rather than overriding the interrupt handler.
Bytes are now pushed directly from the usart layer into the
com layer without any buffering. The com layer performs all
of the buffering.
A further benefit from this approach is that we can put all
blocking/non-blocking behaviour into the COM layer and not
in the underlying drivers.
Misc related changes:
- Remove obsolete .handler field from irq configs
- Adapt all users of PIOS_COM_* functions to new API
- Fixup callers of PIOS_USB_HID_Init()
The initial baud rates of each interface are now forced in the
board init code.
Any modules using USARTs should have fields added to
their settings object to allow the user to change the
baud rate from the default by using the COM layer APIs.
Developers requiring custom baud rates before the settings
objects are in place should locally edit the cfg structs
to specify the desired baud rates.
This should mark an end to the compile-time selection of HW
configurations.
Minor changes in board initialization for all platforms:
- Most config structs are marked static to prevent badly written
drivers from directly referring to config data.
- Adapt to changes in .irq fields in config data.
- Adapt to changes in USART IRQ handling.
Major changes in board initialization for CC:
- Use HwSettings UAVObj to decide which drivers to attach to
the "main" port and the flexi port, and select the appropriate
device configuration data.
- HwSettings allows choosing between Disabled, Telemetry, SBUS,
Spektrum,GPS, and I2C for each of the two ports.
- Use ManualControlSettings.InputMode to init/configure the
appropriate receiver module, and register its available rx channels
with the PIOS_RCVR layer. Can choose between PWM, Spektrum and PPM
at board init time. PPM driver is broken, and SBUS will work once
it is added to this UAVObj as an option.
- CC build now includes code for SBUS, Spektrum and PWM receivers in
every firmware image.
PIOS_USART driver:
- Now handles its own low-level IRQs internally
- If NULL upper-level IRQ handler is bound in at board init time
then rx/tx is satisfied by internal PIOS_USART buffered IO routines
which are (typically) attached to the COM layer.
- If an alternate upper-level IRQ handler is bound in at board init
then that handler is called and expected to clear down the USART
IRQ sources. This is used by Spektrum and SBUS drivers.
PIOS_SBUS and PIOS_SPEKTRUM drivers:
- Improved data/API hiding
- No longer assume they know where their config data is stored which
allows for boot-time alternate configurations for the driver.
- Now registers an upper-level IRQ handlerwith the USART layer to
decouple the driver from which USART it is actually attached to.
Not yet used anywhere but will eventually allow
debug pins to be assigned during runtime init based
on configuration found in a new uavobject.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2741 ebee16cc-31ac-478f-84a7-5cbb03baadba
priority preempts) and adjusting the priorities around to be more sensible.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2355 ebee16cc-31ac-478f-84a7-5cbb03baadba
Squashed commit of the following:
commit 897e3365ab6c762584c34238efd12dc144e72af0
Author: James Cotton <peabody124@gmail.com>
Date: Mon Sep 13 22:15:21 2010 -0500
AHRS: Getting it running nice and quickly.
commit 53d72fb849164730c89873cab81c9e09be0b112b
Author: James Cotton <peabody124@gmail.com>
Date: Mon Sep 13 15:57:46 2010 -0500
AHRS: Make more variables volatile for -Os.
commit 4fa90821b5d3d8c2ea5e67756313a8a63c0eeb8c
Author: James Cotton <peabody124@gmail.com>
Date: Mon Sep 13 15:11:31 2010 -0500
AHRS/Makefile: -O0 not added to allow me to try various space flags that don't break code.
commit 5bd17a304dc28dc271c2f3e8c6cb8ad4a830404f
Author: James Cotton <peabody124@gmail.com>
Date: Mon Sep 13 14:44:05 2010 -0500
AHRS: Make debuggign USART easy to disable
commit 5453f2a7939492769fe9e9cc822e69c107320670
Author: James Cotton <peabody124@gmail.com>
Date: Mon Sep 13 14:38:37 2010 -0500
AHRS: Explicitly expand covariance prediction. Brings computations from 160 to 90. Makes it not fit in AHRS though.
commit b6712da7eece2a464a2073d24b77be22bfa47094
Author: James Cotton <peabody124@gmail.com>
Date: Sun Sep 12 22:59:42 2010 -0500
AHRS: Make it easy to comment out the I2C/Magnetometers.
commit 8c84d0091f3d6f6bedc7a0224a4ed9cb099b022b
Author: James Cotton <peabody124@gmail.com>
Date: Thu Sep 9 00:49:50 2010 -0500
AHRS: Small change to INSGPS analysis tools
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1613 ebee16cc-31ac-478f-84a7-5cbb03baadba
The STM32 I2C block has a number of errata associated with it.
These errata are primarily related to timing sensitivities between
the peripheral and the interrupt handler. In particular, the
correct generation of the stop bit relies on the I2C IRQ running
immediately and not being held off for any reason.
NOTE: The I2C interrupts must be the highest priority IRQs in the
system to ensure correct operation.
I2C protocol is now implemented as a formal state machine.
See: stm32_i2c_fsm.{dot,jpg} for FSM description.
I2C init is now expressed by const initializers in pios_board.c
for both OP and AHRS boards.
I2C device drivers (ie. bmp085/hmc5843) now pass in const arrays
of an unlimited number of bus transfers to be done atomically.
The I2C adapter driver now handles all bus-level locking across the
list of transactions. Generation of start/restart/stop conditions
are handled automatically over the list of transactions.
Timeouts have been removed from the API for now. May be added
back later.
This driver has run error free on both the OP and AHRS boards for
up to 48hrs but it still sometimes fails earlier than that on the OP
board. There is another possible set of improvements to the driver
that could employ the DMA engine for transfers of >= 2bytes. This
change would reduce the timing sensitivities between the peripheral
and the driver but unfortunately, both the SPI and I2C interfaces
share the DMA1 engine. That means only one of these two peripherals
can use the DMA engine and right now, SPI between OP and AHRS is
already using it.
Failures are currently fatal and will lock up the CPU. This allows
useful information to be obtained in the failure cases.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1241 ebee16cc-31ac-478f-84a7-5cbb03baadba
PIOS SPI devices may now make use of automatic CRC generation
and checking on block transfers. Only supports CRC8 for now.
Since the SPI interface CRC calculation continues across message
boundaries (ie. not reset on every transfer), we must manually reset
the CRC registers for every transfer to allow the two sides of the
link to resynchronize.
Unfortunately, resetting the CRC registers requires disabling the
SPI peripheral which must now be done on every block transfer.
Note: The last byte of the tx buffer is never sent and is assumed to
be a place holder for the tx CRC8.
Note: The last byte of the rx buffer is expected to hold the rx CRC8.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1011 ebee16cc-31ac-478f-84a7-5cbb03baadba
The input data lines between the OP and AHRS boards had internal
pull-ups enabled. This seemed to be causing issues early on
during development of the inter-board comms. Not sure if this
is still necessary but this is how the current code was tested.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1006 ebee16cc-31ac-478f-84a7-5cbb03baadba
To the outside world, the AHRS can be in one of only a few
primary states:
Not present - AHRS is absent or non-responsive via SPI
Inactive - Only link-level status messages are processed
Ready - Ready to receive the next application level message
Busy - Application level message is being processed
Internal to the AHRS, there are many more states that need to be
managed. This FSM provides the necessary decoupling between the
ISR (which is being driven by the SPI link) and the AHRS main
processing loop which must continue to run its filters independently
of the SPI messaging rate.
With this structure, SPI messages can be received at any time but
processed at only specific points within the filter chains.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1005 ebee16cc-31ac-478f-84a7-5cbb03baadba
Mark the device specific DMA IRQ handlers as strongly linked
aliases for the genericly named interrupt vector symbol.
Here's how this works...
* The address of the symbol DMA1_Channel2_IRQHandler is written
into the DMA1/Channel2 interrupt vector by the linker script.
* The startup_*.S file specifies Default_Handler() as a weakly
linked alias for DMA1_Channel2_IRQHandler.
* We now override the weakly linked alias with the strongly linked
PIOS_SPI_sdcard_irq_handler().
* This results in the address of PIOS_SPI_sdcard_irq_handler() being
written to the vector table for the DMA1/Channel2 interrupt.
* The PIOS_SPI_sdcard_irq_handler() function is now called whenever
the DMA1/Channel2 interrupt fires.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1003 ebee16cc-31ac-478f-84a7-5cbb03baadba
- Created a pluggable COM layer
- Converted COM + USART init into static initializers
rather than typedefs
- Generalized the USB HID COM API to match the USART
API.
- Changed USART and COM layers to be data driven rather
than #ifdef'ing/switching on the specifics of each port
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@760 ebee16cc-31ac-478f-84a7-5cbb03baadba
Added support for SPI slave configurations to the pios SPI layer.
Converted the board specific configuration for the PIOS SPI layer to
use const static initializers rather than #defines (see pios_board.c).
SPI interface between the OP board and the AHRS is now operational at
a basic level, capable of moving simple single byte messages between
boards. Multi-byte, CRC protected messages will be added on top of this.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@759 ebee16cc-31ac-478f-84a7-5cbb03baadba
