Moves the CMSIS system_stm3210x.c from library.mk to the individual Makefiles for the F1 targets. This allows for custom SystemInit functions where necessary.
USB CDC uses BULK endpoints to send/receive data. Typically,
a USB host will enqueue large buffers on its IN (device-to-host)
URBs. These buffers are larger than the max packet size for the
bulk endpoint.
The USB standard requires that an IN transfer ends when one of
these is true:
* a short packet (ie. less than max packet size) is sent by the
device
* a zero length packet (ZLP)
* enough packets that the entire host buffer is filled
Our device implementation never sends ZLPs. We sometimes send
packets that are exactly max-packet-size bytes long. This would
result in partially filling a host buffer without signalling (via
ZLP) that the transmission had finished. The host would then wait
until the next transfer had taken place before processing the first
data, thus delaying the first data.
This change simply forces all of our transfers to be short packets
and avoids the need to worry about zero length packets. This is
at the cost of some efficiency on the host side since its large
buffers will only ever be partially filled.
Conflicts:
flight/PiOS/STM32F30x/pios_usb_cdc.c
CDC and USART device drivers were not all clearing their
device structs before using them.
This specifically caused crashes in the case where the upper
COM layer was binding only a Tx path. The Rx path callback
in the lower driver was uninitialized random data and would
result in the lower driver faulting when it tried to call the
callback.
Conflicts:
flight/PiOS/STM32F30x/pios_usart.c
flight/PiOS/STM32F30x/pios_usb_cdc.c
flight/PiOS/STM32F30x/pios_usb_hid.c
The CDC layer on F1, F3 and F4 now always acts like an
infinte data sink whenever *either* there is no DTE present
(ie. no terminal program listening) *or* the USB cable is
disconnected.
F1 and F4 were previously checking the cable but not the DTE.
F3 didn't check anything. The COM layer didn't even ask the
lower layers.
All of this used to mean that any time a caller did a blocking
send to a CDC device without a DTE, it would eventually block
for up to a 5s timeout waiting for space in the Tx buffer.
Conflicts:
flight/PiOS/STM32F30x/pios_usb_cdc.c
Previously, the IN stage on the CTRL interface would write (and
send) its data via the buffer owned by the DATA endpoint. This
would probably have overwritten any data being sent at that
moment. This may have caused data corruption from FC -> GCS.
***** PLEASE NOTE ***** From this revision all F4 based boards (Revolution/OSD) needs bootloader version 5 to boot properly
Conflicts:
flight/pios/stm32f4xx/libraries/CMSIS2/Device/ST/STM32F4xx/Source/osd/system_stm32f4xx.c
flight/targets/boards/osd/board-info.mk
make/boot-defs.mk
make/common-defs.mk
Also fixes warnings (and bugs) in F4 STM32_USB_OTG_Driver code, allowing -Werror to be enabled for all flight code.
Fixes all other compiler warnings that would otherwise cause the flight code to not compile with -Werror enabled.
Along the way, this also adds some uses of isnan() to various places rather than questionable tests for x != x and
x == x to check for NaNs.
+review OPReview
-Fixed casing for PIOS_BL_HELPER_FLASH_ERASE_BOOTLOADER
-fixed wrong condition in f1 bl_helper
-other cosmetic changes and use of stdbool in f1 pios_bl_helper
-remove now unused macros
+review OPReview-456
