There shouldn't be any reason to need 8-byte alignment on the
F1 platform. This allows better packing of all malloc'd data.
Reducing this below 4-byte alignment is not recommended and will
likely result in misaligned pointers being passed to peripherals.
RAM savings is another 300 bytes.
Tested this heap2 at runtime with CC and new compiler since old one (current) triggers strict alliasing error.
That's ok since strict aliasing is disabled on OP, and CC only use heap1.
I managed to test CC with heap2 changes and the init stack claimed back to heap once scheduler starts.
the changes of this commit are OP related (just cleanup on CC side):
Arch specific stuff (in reset vector) to hide this from portable code:
- switch back to MSP stack before starting the scheduler so that the sheduler can use the IRQ stack (when/if needed).
- call the C portable function in heap2 to claim some stack back (the number to claim is taken from linker file).
- start the scheduler from reset vector (I move this here from main because it make sense to not go back to C (so that I don't need to copy the rolled stack in case the sheduler returns). This make it more clean.
- Also I have added the call to the mem manager if sheduler return. that way, we don't reset indefinitely if memory runs out. We will go to this handler and figure things out (right now, it's just looping but at least not rebooting. Probably trap NMI would be better (later improvement).
- switch back to MSP stack before starting the scheduler so that the sheduler can use the IRQ stack (when/if needed).
- call the C portable function in heap1 to claim some stack back (the number to claim is taken from linker file).
- start the scheduler from reset vector (I move this here from main because it make sense to not go back to C (so that I don't need to copy the rolled stack in case the sheduler returns). This make it more clean.
- Also I have added the call to the mem manager if sheduler return. that way, we don't reset indefinitely if memory runs out. We will go to this handler and figure things out (right now, it's just looping but at least not rebooting. Probably trap NMI would be better (later improvement).
The part missing for this part is the weak attribute for the function in heap1.c so that we don't have to update everything with empty stub.
I think the weak atrribute for C function called in assembly is arch dependent so I am not sure if this is possible (will look into it, maybe somebody outthere nows).
Right now, it's heap1 dependent and won't work with heap2. I will clean that up the next couple of days.
I did some test and it looks good.
this is without init code re-organization so we don't free as much as we will be it's good starts.
This compile with sim_posix (since it does not affect portable code) so this is really clean.
I only tested this with CC. I will port it for OP when I will work on heap2.
- use IRQStack for ISRs (at begening of SRAM) (let's call it the irq stack)
- use end of heap for stack needed during initialization (let's call it the init stack).
- the systemStats in GCS indicate the remaining bytes in the IRQ stack (this is realy usefull to monitor our (nested) IRQs.
This is the base ground to provide as much memory as possible available at task creation time.
Next step is to re-organize the initialization in order to move all the init out of the thread's stacks onto the init stack.
This will provide as much memory as possible available at task creation time.
Basically the stack during initialization will be destroyed once the scheduler starts and dynamic alloc are made (since the init stack is at the end of the heap). We will need to make sure we don't clobber the heap during initialization otherwise this will lead to stack corruption.
- only affect flight/PiOS (no change for posix and win32)
- tested on recent master (some runtime on CC with GCS)
- the new timer feature is not compiled-in since we don't use it yet.
- NO TEST FLIGHT
