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Since the i2c bus is bidirectional, there are certain states (eg. part way through a read) where the slave device is in control of driving the SDA line. On a cold start (power on), the slave devices are all quiescent and will not drive the bus. However, on a warm start (eg. watchdog or jtag restart), it is possible that as the CPU boots, the slave device may be holding the SDA line low. This is a bus busy condition and will prevent the I2C bus master in the CPU from being able to seize the bus during init. The fix for this is to clock the i2c bus sufficiently to ensure that the the slave device finishes its transaction and releases the bus. Once the slave has released the bus, the bus master can properly initialize and assert a STOP condition on the bus. git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1349 ebee16cc-31ac-478f-84a7-5cbb03baadba |
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Bootloaders | ||
Doc | ||
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PiOS.posix | ||
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README.txt |
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