Each channel was previously tracking a separate driver.
Now, channels are grouped within a channel group to save
RAM used for tracking and to better reflect how channels
are actually mapped.
The initial baud rates of each interface are now forced in the
board init code.
Any modules using USARTs should have fields added to
their settings object to allow the user to change the
baud rate from the default by using the COM layer APIs.
Developers requiring custom baud rates before the settings
objects are in place should locally edit the cfg structs
to specify the desired baud rates.
This should mark an end to the compile-time selection of HW
configurations.
Minor changes in board initialization for all platforms:
- Most config structs are marked static to prevent badly written
drivers from directly referring to config data.
- Adapt to changes in .irq fields in config data.
- Adapt to changes in USART IRQ handling.
Major changes in board initialization for CC:
- Use HwSettings UAVObj to decide which drivers to attach to
the "main" port and the flexi port, and select the appropriate
device configuration data.
- HwSettings allows choosing between Disabled, Telemetry, SBUS,
Spektrum,GPS, and I2C for each of the two ports.
- Use ManualControlSettings.InputMode to init/configure the
appropriate receiver module, and register its available rx channels
with the PIOS_RCVR layer. Can choose between PWM, Spektrum and PPM
at board init time. PPM driver is broken, and SBUS will work once
it is added to this UAVObj as an option.
- CC build now includes code for SBUS, Spektrum and PWM receivers in
every firmware image.
PIOS_USART driver:
- Now handles its own low-level IRQs internally
- If NULL upper-level IRQ handler is bound in at board init time
then rx/tx is satisfied by internal PIOS_USART buffered IO routines
which are (typically) attached to the COM layer.
- If an alternate upper-level IRQ handler is bound in at board init
then that handler is called and expected to clear down the USART
IRQ sources. This is used by Spektrum and SBUS drivers.
PIOS_SBUS and PIOS_SPEKTRUM drivers:
- Improved data/API hiding
- No longer assume they know where their config data is stored which
allows for boot-time alternate configurations for the driver.
- Now registers an upper-level IRQ handlerwith the USART layer to
decouple the driver from which USART it is actually attached to.
This separates the RTC device and interrupt handling
from the devices that rely on the tick notifications.
Drivers can now register tick notification functions
that will be called on each RTC tick event.
All receivers now fall under the same driver API provided
by pios_rcvr.c.
This is part of a larger sequence of commits that will
switch the receiver selection over to boot time dynamic
configuration via UAVObjects.
Not yet used anywhere but will eventually allow
debug pins to be assigned during runtime init based
on configuration found in a new uavobject.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2741 ebee16cc-31ac-478f-84a7-5cbb03baadba
Also keep the priority of actuator at idle+4, dropping it down slipped through
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2580 ebee16cc-31ac-478f-84a7-5cbb03baadba
Beginning of unifying the input types into PIOS_RECEIVER.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2568 ebee16cc-31ac-478f-84a7-5cbb03baadba
projects which messed up a timer on OP and serial on PipX. Now this is only
changed for AHRS. Ideally wouldn't even change for that but then ADC runs too
fast and we get a lot more CRC errors for dealing with all that data.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2459 ebee16cc-31ac-478f-84a7-5cbb03baadba
tasks directly update a flag for each module (which they register) and when all
flags set clear the watchdog then.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2365 ebee16cc-31ac-478f-84a7-5cbb03baadba
priority preempts) and adjusting the priorities around to be more sensible.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2355 ebee16cc-31ac-478f-84a7-5cbb03baadba
to only transmitting one object per transmission too to keep size down.
Also move to using the driver structure so the paramter is in a clear place.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2333 ebee16cc-31ac-478f-84a7-5cbb03baadba
No functional changes.
The closing comment on some of the USB_HID related
ifdefs was outdated. Fixed.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1541 ebee16cc-31ac-478f-84a7-5cbb03baadba
The STM32 I2C block has a number of errata associated with it.
These errata are primarily related to timing sensitivities between
the peripheral and the interrupt handler. In particular, the
correct generation of the stop bit relies on the I2C IRQ running
immediately and not being held off for any reason.
NOTE: The I2C interrupts must be the highest priority IRQs in the
system to ensure correct operation.
I2C protocol is now implemented as a formal state machine.
See: stm32_i2c_fsm.{dot,jpg} for FSM description.
I2C init is now expressed by const initializers in pios_board.c
for both OP and AHRS boards.
I2C device drivers (ie. bmp085/hmc5843) now pass in const arrays
of an unlimited number of bus transfers to be done atomically.
The I2C adapter driver now handles all bus-level locking across the
list of transactions. Generation of start/restart/stop conditions
are handled automatically over the list of transactions.
Timeouts have been removed from the API for now. May be added
back later.
This driver has run error free on both the OP and AHRS boards for
up to 48hrs but it still sometimes fails earlier than that on the OP
board. There is another possible set of improvements to the driver
that could employ the DMA engine for transfers of >= 2bytes. This
change would reduce the timing sensitivities between the peripheral
and the driver but unfortunately, both the SPI and I2C interfaces
share the DMA1 engine. That means only one of these two peripherals
can use the DMA engine and right now, SPI between OP and AHRS is
already using it.
Failures are currently fatal and will lock up the CPU. This allows
useful information to be obtained in the failure cases.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1241 ebee16cc-31ac-478f-84a7-5cbb03baadba
- syntax error in pios_board_posix.c introduced with Doxygen comment blocks
- platform dependant code had been added to openpilot.c instead of pios_board.c
- redundant header inclusion (stm32... already included by PiOS)
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1171 ebee16cc-31ac-478f-84a7-5cbb03baadba
PIOS SPI devices may now make use of automatic CRC generation
and checking on block transfers. Only supports CRC8 for now.
Since the SPI interface CRC calculation continues across message
boundaries (ie. not reset on every transfer), we must manually reset
the CRC registers for every transfer to allow the two sides of the
link to resynchronize.
Unfortunately, resetting the CRC registers requires disabling the
SPI peripheral which must now be done on every block transfer.
Note: The last byte of the tx buffer is never sent and is assumed to
be a place holder for the tx CRC8.
Note: The last byte of the rx buffer is expected to hold the rx CRC8.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1011 ebee16cc-31ac-478f-84a7-5cbb03baadba
