- both CC serial ports are now disabled by default (no telemetry);
- serial ports now have DSM2, DSMX (10bit) and DSMX (11bit) options;
- ReceiverGroups now have DSM (MainPort) and DSM (FlexiPort) options.
For DSM2 protocol there is an explicit resolution bit in the stream, so
the DSM2 should be selected. For DSMX there is no such bit, and user
should choose the resolution from the list configuring the spektrum port.
ReceiverGroups have single DSM option which is handled by the same driver.
Downside: this implementation saves received frame first, unrolls by the
end of frame. This should be ok, but may be improved by unrolling channels
on the fly in the rx callback.
Another minor difference is that a ChannelGroup is now bound to port:
DSM (MainPort) or DSM (FlexiPort). This was considered as acceptable
solution in order to not have 6 DSM options for each ChannelGroup and
even more in case of new DSM protocol variations.
Known problem: it is not possible to choose same protocols like
DSM2/DSM2 for two ports. It can be enabled by adding an exception to
common rule, though.
The DSMX throttle channel misbehavior (zero value) is not treated
specially yet. It should trigger the failsafe being out of bounds.
More info and data dumps are required to handle this properly.
In the previous version the decoder could in rare cases get synced from
the middle of data stream in case of data byte equal to the S.Bus start
of frame (SOF) byte (wrong data will be rejected but it was not perfect).
Now it waits for the real start of frame and then checks the SOF byte.
- does not glitch when used in 2-frame mode (DM9, 9503, etc)
- does NOT provides yet DSMX stream decoding - do NOT merge
- uses a bit more time in the interrupt, but frees 16 bytes of RAM.
This is done to help decoding the weird DSMX stream which does not
contain explicit resolution/frame/lost frames info and needs special
processing (to be done yet).
TIM5-8. Also TIM1 was not handled probably (for CC either) as the name of the
IRQ is TIM1_CC and TIM1_UP for the capture compare versus update. I haven't
checked the downstream code that the registers it uses to map from a context to
event is invariant under timer channel.
TIM5-8. Also TIM1 was not handled probably (for CC either) as the name of the
IRQ is TIM1_CC and TIM1_UP for the capture compare versus update. I haven't
checked the downstream code that the registers it uses to map from a context to
event is invariant under timer channel.
them symbolic constants.
- A timeout is 0
- A missing driver is 65534
- An invalid channel is 65535
ManualControl: Make it deal with the values explicitly. A timed out value
should not be treated like a minimum duration signal. Instead it does not
updated the scaled value but marks the data window as invalid to trigger the
failsafe.
Move the configuration files for INS from AHRS* to INS*. Strip out unused
fields in settings and merge calibration and settings since settings has
basically no information.
Allocate per-instance data for drivers from the heap
rather than as static variables from the .data segment.
This converts > 800 bytes of RAM from being always consumed
as static data into being allocated from the heap only when
a particular feature is enabled in the hwsettings object.
A minimal config (no receivers, flexi port disabled, main port
disabled) leaves 2448 bytes of free heap. That's our new baseline.
Approximate RAM (heap) costs of enabling various features:
+ 632 Serial Telemetry (includes 400 bytes of Rx/Tx buffers)
+ 108 PWM Rcvr
+ 152 PPM Rcvr
+ 112 Spektrum Rcvr
+ 24 S.Bus (Should be closer to 68 since driver is still using
static memory)
There are still some drivers that pre-allocate all of their memory
as static data. It'll take some work to convert those over to
dynamically allocating their instance data.
PWM and PPM can now coexist in the same load and be
selected at boot time via the hwsettings UAVObject.
This is basically a complete restructuring of the
way the drivers interact with the TIM peripheral in
the STM32.
As a side effect, the PWM and PPM drivers are now
ready to support multiple instances of each.
This also provides the first step toward being able
to reassign some of the PWM input pins to be servo
output pins. Still more work required, but this is
a good start.
transfers from IRQ. Also catch the double 0x70084 event which was locking up
the FSM with -Os enabled. I did this in a cheating way (filtering the event
based on state) but it's the cleanest I can see. Hopefully a DMA version of
I2C will fix this.
CRC. This wasn't the case on F1. With CRC the last byte of the buffer passed
to PIOS_SPI_TransferBlock is NOT USED. This is the case on both F1 and F2.
Also need to DeInit DMA before enabling or it doesn't enable successfully.
Finally added a timeout which sets a fail on the pios spi transfer in the case
that either of the dma channels fails to enable.
needed by users because if too much changes I change the FS magic and trigger a
wipe.
Possibly the erase should require a particular "magic" object id value to
execute? This would make it harder to do manually through UAVOs though.
